uboot-lantiq: update to v2013.10
[openwrt/svn-archive/archive.git] / package / boot / uboot-lantiq / patches / 0030-MIPS-add-board-support-for-Gigaset-SX76X.patch
1 From 9e9dec563e4d061e7b34d2d59a89eb05c60f43a7 Mon Sep 17 00:00:00 2001
2 From: Luka Perkov <luka@openwrt.org>
3 Date: Sat, 2 Mar 2013 23:34:00 +0100
4 Subject: MIPS: add board support for Gigaset SX76X
5
6 Signed-off-by: Luka Perkov <luka@openwrt.org>
7 Signed-off-by: Daniel Schwierzeck <daniel.schwierzeck@gmail.com>
8
9 diff --git a/board/gigaset/sx76x/Makefile b/board/gigaset/sx76x/Makefile
10 new file mode 100644
11 index 0000000..3a547c2
12 --- /dev/null
13 +++ b/board/gigaset/sx76x/Makefile
14 @@ -0,0 +1,27 @@
15 +#
16 +# Copyright (C) 2000-2011 Wolfgang Denk, DENX Software Engineering, wd@denx.de
17 +#
18 +# SPDX-License-Identifier: GPL-2.0+
19 +#
20 +
21 +include $(TOPDIR)/config.mk
22 +
23 +LIB = $(obj)lib$(BOARD).o
24 +
25 +COBJS = $(BOARD).o
26 +
27 +SRCS := $(SOBJS:.o=.S) $(COBJS:.o=.c)
28 +OBJS := $(addprefix $(obj),$(COBJS))
29 +SOBJS := $(addprefix $(obj),$(SOBJS))
30 +
31 +$(LIB): $(obj).depend $(OBJS) $(SOBJS)
32 + $(call cmd_link_o_target, $(OBJS) $(SOBJS))
33 +
34 +#########################################################################
35 +
36 +# defines $(obj).depend target
37 +include $(SRCTREE)/rules.mk
38 +
39 +sinclude $(obj).depend
40 +
41 +#########################################################################
42 diff --git a/board/gigaset/sx76x/config.mk b/board/gigaset/sx76x/config.mk
43 new file mode 100644
44 index 0000000..9d8953b
45 --- /dev/null
46 +++ b/board/gigaset/sx76x/config.mk
47 @@ -0,0 +1,7 @@
48 +#
49 +# Copyright (C) 2011-2013 Daniel Schwierzeck, daniel.schwierzeck@gmail.com
50 +#
51 +# SPDX-License-Identifier: GPL-2.0+
52 +#
53 +
54 +PLATFORM_CPPFLAGS += -I$(TOPDIR)/board/$(BOARDDIR)
55 diff --git a/board/gigaset/sx76x/ddr_settings.h b/board/gigaset/sx76x/ddr_settings.h
56 new file mode 100644
57 index 0000000..13cd81b
58 --- /dev/null
59 +++ b/board/gigaset/sx76x/ddr_settings.h
60 @@ -0,0 +1,55 @@
61 +/*
62 + * Copyright (C) 2011-2013 Luka Perkov <luka@openwrt.org>
63 + *
64 + * This file has been generated with lantiq_ram_extract_magic.awk script.
65 + *
66 + * SPDX-License-Identifier: GPL-2.0+
67 + */
68 +
69 +#define MC_DC00_VALUE 0x1B1B
70 +#define MC_DC01_VALUE 0x0
71 +#define MC_DC02_VALUE 0x0
72 +#define MC_DC03_VALUE 0x0
73 +#define MC_DC04_VALUE 0x0
74 +#define MC_DC05_VALUE 0x200
75 +#define MC_DC06_VALUE 0x605
76 +#define MC_DC07_VALUE 0x303
77 +#define MC_DC08_VALUE 0x202
78 +#define MC_DC09_VALUE 0x70A
79 +#define MC_DC10_VALUE 0x203
80 +#define MC_DC11_VALUE 0xC02
81 +#define MC_DC12_VALUE 0x1C8
82 +#define MC_DC13_VALUE 0x1
83 +#define MC_DC14_VALUE 0x0
84 +#define MC_DC15_VALUE 0xF3E
85 +#define MC_DC16_VALUE 0xC800
86 +#define MC_DC17_VALUE 0xD
87 +#define MC_DC18_VALUE 0x300
88 +#define MC_DC19_VALUE 0x200
89 +#define MC_DC20_VALUE 0xA04
90 +#define MC_DC21_VALUE 0xF00
91 +#define MC_DC22_VALUE 0xF0F
92 +#define MC_DC23_VALUE 0x0
93 +#define MC_DC24_VALUE 0x63
94 +#define MC_DC25_VALUE 0x0
95 +#define MC_DC26_VALUE 0x100
96 +#define MC_DC27_VALUE 0x0
97 +#define MC_DC28_VALUE 0x514
98 +#define MC_DC29_VALUE 0x2D89
99 +#define MC_DC30_VALUE 0x8300
100 +#define MC_DC31_VALUE 0x2002
101 +#define MC_DC32_VALUE 0x0
102 +#define MC_DC33_VALUE 0x0
103 +#define MC_DC34_VALUE 0x0
104 +#define MC_DC35_VALUE 0x0
105 +#define MC_DC36_VALUE 0x0
106 +#define MC_DC37_VALUE 0x0
107 +#define MC_DC38_VALUE 0x0
108 +#define MC_DC39_VALUE 0x0
109 +#define MC_DC40_VALUE 0x0
110 +#define MC_DC41_VALUE 0x0
111 +#define MC_DC42_VALUE 0x0
112 +#define MC_DC43_VALUE 0x0
113 +#define MC_DC44_VALUE 0x0
114 +#define MC_DC45_VALUE 0x500
115 +#define MC_DC46_VALUE 0x0
116 diff --git a/board/gigaset/sx76x/sx76x.c b/board/gigaset/sx76x/sx76x.c
117 new file mode 100644
118 index 0000000..71996a1
119 --- /dev/null
120 +++ b/board/gigaset/sx76x/sx76x.c
121 @@ -0,0 +1,65 @@
122 +/*
123 + * Copyright (C) 2011 Luka Perkov <luka@openwrt.org>
124 + *
125 + * SPDX-License-Identifier: GPL-2.0+
126 + */
127 +
128 +#include <common.h>
129 +#include <switch.h>
130 +#include <asm/gpio.h>
131 +#include <asm/lantiq/eth.h>
132 +#include <asm/lantiq/reset.h>
133 +#include <asm/lantiq/chipid.h>
134 +
135 +static void gpio_init(void)
136 +{
137 + /* Activate reset line of ADM6996I switch */
138 + gpio_direction_output(19, 0);
139 +}
140 +
141 +int board_early_init_f(void)
142 +{
143 + gpio_init();
144 +
145 + return 0;
146 +}
147 +
148 +int checkboard(void)
149 +{
150 + puts("Board: " CONFIG_BOARD_NAME "\n");
151 + ltq_chip_print_info();
152 +
153 + return 0;
154 +}
155 +
156 +static const struct ltq_eth_port_config eth_port_config[] = {
157 + /* MAC0: Lantiq ADM6996I switch */
158 + { 0, 0x0, LTQ_ETH_PORT_SWITCH, PHY_INTERFACE_MODE_RMII },
159 +};
160 +
161 +static const struct ltq_eth_board_config eth_board_config = {
162 + .ports = eth_port_config,
163 + .num_ports = ARRAY_SIZE(eth_port_config),
164 +};
165 +
166 +int board_eth_init(bd_t *bis)
167 +{
168 + return ltq_eth_initialize(&eth_board_config);
169 +}
170 +
171 +static struct switch_device adm6996i_dev = {
172 + .name = "adm6996i",
173 + .cpu_port = 5,
174 + .port_mask = 0xF,
175 +};
176 +
177 +int board_switch_init(void)
178 +{
179 + /* Deactivate reset line of ADM6996I switch */
180 + gpio_set_value(19, 1);
181 +
182 + /* ADM6996I needs some time to come out of reset */
183 + __udelay(50000);
184 +
185 + return switch_device_register(&adm6996i_dev);
186 +}
187 diff --git a/boards.cfg b/boards.cfg
188 index ea5c4f9..2163cdb 100644
189 --- a/boards.cfg
190 +++ b/boards.cfg
191 @@ -510,6 +510,8 @@ Active mips mips32 danube arcadyan arv7518pw
192 Active mips mips32 danube arcadyan arv7518pw arv7518pw_ram arv7518pw:SYS_BOOT_RAM Luka Perkov <luka@openwrt.org>
193 Active mips mips32 danube audiocodes acmp252 acmp252_nor acmp252:SYS_BOOT_NOR Daniel Golle <daniel.golle@gmail.com>
194 Active mips mips32 danube audiocodes acmp252 acmp252_ram acmp252:SYS_BOOT_RAM Daniel Golle <daniel.golle@gmail.com>
195 +Active mips mips32 danube gigaset sx76x gigasx76x_nor sx76x:SYS_BOOT_NOR Luka Perkov <luka@openwrt.org>
196 +Active mips mips32 danube gigaset sx76x gigasx76x_ram sx76x:SYS_BOOT_RAM Luka Perkov <luka@openwrt.org>
197 Active mips mips32 danube lantiq easy50712 easy50712_nor easy50712:SYS_BOOT_NOR Daniel Schwierzeck <daniel.schwierzeck@gmail.com>
198 Active mips mips32 danube lantiq easy50712 easy50712_norspl easy50712:SYS_BOOT_NORSPL Daniel Schwierzeck <daniel.schwierzeck@gmail.com>
199 Active mips mips32 danube lantiq easy50712 easy50712_ram easy50712:SYS_BOOT_RAM Daniel Schwierzeck <daniel.schwierzeck@gmail.com>
200 diff --git a/include/configs/sx76x.h b/include/configs/sx76x.h
201 new file mode 100644
202 index 0000000..236851e
203 --- /dev/null
204 +++ b/include/configs/sx76x.h
205 @@ -0,0 +1,59 @@
206 +/*
207 + * Copyright (C) 2011-2013 Luka Perkov <luka@openwrt.org>
208 + *
209 + * SPDX-License-Identifier: GPL-2.0+
210 + */
211 +
212 +#ifndef __CONFIG_H
213 +#define __CONFIG_H
214 +
215 +#define CONFIG_MACH_TYPE "GIGASX76X"
216 +#define CONFIG_IDENT_STRING " "CONFIG_MACH_TYPE
217 +#define CONFIG_BOARD_NAME "Gigaset sx76x"
218 +
219 +/* Configure SoC */
220 +#define CONFIG_LTQ_SUPPORT_UART /* Enable ASC and UART */
221 +
222 +#define CONFIG_LTQ_SUPPORT_ETHERNET /* Enable ethernet */
223 +
224 +#define CONFIG_LTQ_SUPPORT_NOR_FLASH /* Have a parallel NOR flash */
225 +
226 +/* Switch devices */
227 +#define CONFIG_SWITCH_MULTI
228 +#define CONFIG_SWITCH_ADM6996I
229 +
230 +/* Environment */
231 +#if defined(CONFIG_SYS_BOOT_NOR)
232 +#define CONFIG_ENV_IS_IN_FLASH
233 +#define CONFIG_ENV_OVERWRITE
234 +#define CONFIG_ENV_OFFSET (256 * 1024)
235 +#define CONFIG_ENV_SECT_SIZE (64 * 1024)
236 +#else
237 +#define CONFIG_ENV_IS_NOWHERE
238 +#endif
239 +
240 +#define CONFIG_ENV_SIZE (8 * 1024)
241 +#define CONFIG_LOADADDR CONFIG_SYS_LOAD_ADDR
242 +
243 +/* Console */
244 +#define CONFIG_LTQ_ADVANCED_CONSOLE
245 +#define CONFIG_BAUDRATE 115200
246 +#define CONFIG_CONSOLE_ASC 1
247 +#define CONFIG_CONSOLE_DEV "ttyLTQ1"
248 +
249 +/* Pull in default board configs for Lantiq XWAY Danube */
250 +#include <asm/lantiq/config.h>
251 +#include <asm/arch/config.h>
252 +
253 +/* Pull in default OpenWrt configs for Lantiq SoC */
254 +#include "openwrt-lantiq-common.h"
255 +
256 +#define CONFIG_ENV_UPDATE_UBOOT_NOR \
257 + "update-uboot-nor=run load-uboot-nor write-uboot-nor\0"
258 +
259 +#define CONFIG_EXTRA_ENV_SETTINGS \
260 + CONFIG_ENV_LANTIQ_DEFAULTS \
261 + CONFIG_ENV_UPDATE_UBOOT_NOR \
262 + "kernel_addr=0xB0040000\0"
263 +
264 +#endif /* __CONFIG_H */
265 --
266 1.8.3.2
267