uboot-lantiq: update to v2013.10
[openwrt/svn-archive/archive.git] / package / boot / uboot-lantiq / patches / 0037-MIPS-add-board-support-for-Arcadyan-ARV752DPW.patch
1 From fbdbf2ddf2b34d675d53de679c179788b0604c1a Mon Sep 17 00:00:00 2001
2 From: Oliver Muth <dr.o.muth@gmx.de>
3 Date: Sat, 12 Oct 2013 16:49:53 +0200
4 Subject: MIPS: add board support for Arcadyan ARV752DPW
5
6 Signed-off-by: Oliver Muth <dr.o.muth@gmx.de>
7 Signed-off-by: Daniel Schwierzeck <daniel.schwierzeck@gmail.com>
8
9 diff --git a/board/arcadyan/arv752dpw/Makefile b/board/arcadyan/arv752dpw/Makefile
10 new file mode 100644
11 index 0000000..3a547c2
12 --- /dev/null
13 +++ b/board/arcadyan/arv752dpw/Makefile
14 @@ -0,0 +1,27 @@
15 +#
16 +# Copyright (C) 2000-2011 Wolfgang Denk, DENX Software Engineering, wd@denx.de
17 +#
18 +# SPDX-License-Identifier: GPL-2.0+
19 +#
20 +
21 +include $(TOPDIR)/config.mk
22 +
23 +LIB = $(obj)lib$(BOARD).o
24 +
25 +COBJS = $(BOARD).o
26 +
27 +SRCS := $(SOBJS:.o=.S) $(COBJS:.o=.c)
28 +OBJS := $(addprefix $(obj),$(COBJS))
29 +SOBJS := $(addprefix $(obj),$(SOBJS))
30 +
31 +$(LIB): $(obj).depend $(OBJS) $(SOBJS)
32 + $(call cmd_link_o_target, $(OBJS) $(SOBJS))
33 +
34 +#########################################################################
35 +
36 +# defines $(obj).depend target
37 +include $(SRCTREE)/rules.mk
38 +
39 +sinclude $(obj).depend
40 +
41 +#########################################################################
42 diff --git a/board/arcadyan/arv752dpw/arv752dpw.c b/board/arcadyan/arv752dpw/arv752dpw.c
43 new file mode 100644
44 index 0000000..d555904
45 --- /dev/null
46 +++ b/board/arcadyan/arv752dpw/arv752dpw.c
47 @@ -0,0 +1,51 @@
48 +/*
49 + * Copyright (C) 2012 Luka Perkov <luka@openwrt.org>
50 + * Copyright (C) 2013 Oliver Muth <dr.o.muth@gmx.de>
51 + *
52 + * SPDX-License-Identifier: GPL-2.0+
53 + */
54 +
55 +#include <common.h>
56 +#include <switch.h>
57 +#include <asm/gpio.h>
58 +#include <asm/lantiq/eth.h>
59 +#include <asm/lantiq/reset.h>
60 +#include <asm/lantiq/chipid.h>
61 +
62 +int board_early_init_f(void)
63 +{
64 + return 0;
65 +}
66 +
67 +int checkboard(void)
68 +{
69 + puts("Board: " CONFIG_BOARD_NAME "\n");
70 + ltq_chip_print_info();
71 +
72 + return 0;
73 +}
74 +
75 +static const struct ltq_eth_port_config eth_port_config[] = {
76 + /* MAC0: Realtek rtl8306 switch */
77 + { 0, 0x0, LTQ_ETH_PORT_SWITCH, PHY_INTERFACE_MODE_RMII },
78 +};
79 +
80 +static const struct ltq_eth_board_config eth_board_config = {
81 + .ports = eth_port_config,
82 + .num_ports = ARRAY_SIZE(eth_port_config),
83 +};
84 +
85 +int board_eth_init(bd_t *bis)
86 +{
87 + return ltq_eth_initialize(&eth_board_config);
88 +}
89 +static struct switch_device rtl8306_dev = {
90 + .name = "rtl8306",
91 + .cpu_port = 5,
92 + .port_mask = 0xF,
93 +};
94 +
95 +int board_switch_init(void)
96 +{
97 + return switch_device_register(&rtl8306_dev);
98 +}
99 diff --git a/board/arcadyan/arv752dpw/config.mk b/board/arcadyan/arv752dpw/config.mk
100 new file mode 100644
101 index 0000000..9d8953b
102 --- /dev/null
103 +++ b/board/arcadyan/arv752dpw/config.mk
104 @@ -0,0 +1,7 @@
105 +#
106 +# Copyright (C) 2011-2013 Daniel Schwierzeck, daniel.schwierzeck@gmail.com
107 +#
108 +# SPDX-License-Identifier: GPL-2.0+
109 +#
110 +
111 +PLATFORM_CPPFLAGS += -I$(TOPDIR)/board/$(BOARDDIR)
112 diff --git a/board/arcadyan/arv752dpw/ddr_settings.h b/board/arcadyan/arv752dpw/ddr_settings.h
113 new file mode 100644
114 index 0000000..a226322
115 --- /dev/null
116 +++ b/board/arcadyan/arv752dpw/ddr_settings.h
117 @@ -0,0 +1,55 @@
118 +/*
119 + * Copyright (C) 2011-2013 Luka Perkov <luka@openwrt.org>
120 + *
121 + * This file has been generated with lantiq_ram_extract_magic.awk script.
122 + *
123 + * SPDX-License-Identifier: GPL-2.0+
124 + */
125 +
126 +#define MC_DC00_VALUE 0x1B1B
127 +#define MC_DC01_VALUE 0x0
128 +#define MC_DC02_VALUE 0x0
129 +#define MC_DC03_VALUE 0x0
130 +#define MC_DC04_VALUE 0x0
131 +#define MC_DC05_VALUE 0x200
132 +#define MC_DC06_VALUE 0x605
133 +#define MC_DC07_VALUE 0x303
134 +#define MC_DC08_VALUE 0x102
135 +#define MC_DC09_VALUE 0x70A
136 +#define MC_DC10_VALUE 0x203
137 +#define MC_DC11_VALUE 0xC02
138 +#define MC_DC12_VALUE 0x1C8
139 +#define MC_DC13_VALUE 0x1
140 +#define MC_DC14_VALUE 0x0
141 +#define MC_DC15_VALUE 0x134
142 +#define MC_DC16_VALUE 0xC800
143 +#define MC_DC17_VALUE 0xD
144 +#define MC_DC18_VALUE 0x301
145 +#define MC_DC19_VALUE 0x200
146 +#define MC_DC20_VALUE 0xA03
147 +#define MC_DC21_VALUE 0x1400
148 +#define MC_DC22_VALUE 0x1414
149 +#define MC_DC23_VALUE 0x0
150 +#define MC_DC24_VALUE 0x5B
151 +#define MC_DC25_VALUE 0x0
152 +#define MC_DC26_VALUE 0x0
153 +#define MC_DC27_VALUE 0x0
154 +#define MC_DC28_VALUE 0x510
155 +#define MC_DC29_VALUE 0x4E20
156 +#define MC_DC30_VALUE 0x8235
157 +#define MC_DC31_VALUE 0x0
158 +#define MC_DC32_VALUE 0x0
159 +#define MC_DC33_VALUE 0x0
160 +#define MC_DC34_VALUE 0x0
161 +#define MC_DC35_VALUE 0x0
162 +#define MC_DC36_VALUE 0x0
163 +#define MC_DC37_VALUE 0x0
164 +#define MC_DC38_VALUE 0x0
165 +#define MC_DC39_VALUE 0x0
166 +#define MC_DC40_VALUE 0x0
167 +#define MC_DC41_VALUE 0x0
168 +#define MC_DC42_VALUE 0x0
169 +#define MC_DC43_VALUE 0x0
170 +#define MC_DC44_VALUE 0x0
171 +#define MC_DC45_VALUE 0x500
172 +#define MC_DC46_VALUE 0x0
173 diff --git a/boards.cfg b/boards.cfg
174 index f10be39..79cba2d 100644
175 --- a/boards.cfg
176 +++ b/boards.cfg
177 @@ -518,6 +518,9 @@ Active mips mips32 danube arcadyan arv4519pw
178 Active mips mips32 danube arcadyan arv7518pw arv7518pw_brn arv7518pw:SYS_BOOT_BRN Luka Perkov <luka@openwrt.org>
179 Active mips mips32 danube arcadyan arv7518pw arv7518pw_nor arv7518pw:SYS_BOOT_NOR Luka Perkov <luka@openwrt.org>
180 Active mips mips32 danube arcadyan arv7518pw arv7518pw_ram arv7518pw:SYS_BOOT_RAM Luka Perkov <luka@openwrt.org>
181 +Active mips mips32 danube arcadyan arv752dpw arv752dpw_brn arv752dpw:SYS_BOOT_BRN -
182 +Active mips mips32 danube arcadyan arv752dpw arv752dpw_nor arv752dpw:SYS_BOOT_NOR -
183 +Active mips mips32 danube arcadyan arv752dpw arv752dpw_ram arv752dpw:SYS_BOOT_RAM -
184 Active mips mips32 danube audiocodes acmp252 acmp252_nor acmp252:SYS_BOOT_NOR Daniel Golle <daniel.golle@gmail.com>
185 Active mips mips32 danube audiocodes acmp252 acmp252_ram acmp252:SYS_BOOT_RAM Daniel Golle <daniel.golle@gmail.com>
186 Active mips mips32 danube gigaset sx76x gigasx76x_nor sx76x:SYS_BOOT_NOR Luka Perkov <luka@openwrt.org>
187 diff --git a/include/configs/arv752dpw.h b/include/configs/arv752dpw.h
188 new file mode 100644
189 index 0000000..f6d6092
190 --- /dev/null
191 +++ b/include/configs/arv752dpw.h
192 @@ -0,0 +1,67 @@
193 +/*
194 + * Copyright (C) 2012-2013 Luka Perkov <luka@openwrt.org>
195 + *
196 + * SPDX-License-Identifier: GPL-2.0+
197 + */
198 +
199 +#ifndef __CONFIG_H
200 +#define __CONFIG_H
201 +
202 +#define CONFIG_MACH_TYPE "ARV752DPW"
203 +#define CONFIG_IDENT_STRING " "CONFIG_MACH_TYPE
204 +#define CONFIG_BOARD_NAME "Arcadyan ARV752DPW"
205 +
206 +/* Configure SoC */
207 +#define CONFIG_LTQ_SUPPORT_UART /* Enable ASC and UART */
208 +
209 +#define CONFIG_LTQ_SUPPORT_ETHERNET /* Enable ethernet */
210 +
211 +#define CONFIG_LTQ_SUPPORT_NOR_FLASH /* Have a parallel NOR flash */
212 +
213 +/* Switch devices */
214 +#define CONFIG_SWITCH_MULTI
215 +#define CONFIG_SWITCH_RTL8206
216 +
217 +/* Environment */
218 +#if defined(CONFIG_SYS_BOOT_NOR)
219 +#define CONFIG_ENV_IS_IN_FLASH
220 +#define CONFIG_ENV_OVERWRITE
221 +#define CONFIG_ENV_OFFSET (192 * 1024)
222 +#define CONFIG_ENV_SECT_SIZE (64 * 1024)
223 +#else
224 +#define CONFIG_ENV_IS_NOWHERE
225 +#endif
226 +
227 +#define CONFIG_ENV_SIZE (8 * 1024)
228 +#define CONFIG_LOADADDR CONFIG_SYS_LOAD_ADDR
229 +
230 +/* Brnboot loadable image */
231 +#if defined(CONFIG_SYS_BOOT_BRN)
232 +#define CONFIG_SYS_TEXT_BASE 0x80002000
233 +#define CONFIG_SKIP_LOWLEVEL_INIT
234 +#define CONFIG_SYS_DISABLE_CACHE
235 +#define CONFIG_ENV_OVERWRITE 1
236 +#endif
237 +
238 +/* Console */
239 +#define CONFIG_LTQ_ADVANCED_CONSOLE
240 +#define CONFIG_BAUDRATE 115200
241 +#define CONFIG_CONSOLE_ASC 1
242 +#define CONFIG_CONSOLE_DEV "ttyLTQ1"
243 +
244 +/* Pull in default board configs for Lantiq XWAY Danube */
245 +#include <asm/lantiq/config.h>
246 +#include <asm/arch/config.h>
247 +
248 +/* Pull in default OpenWrt configs for Lantiq SoC */
249 +#include "openwrt-lantiq-common.h"
250 +
251 +#define CONFIG_ENV_UPDATE_UBOOT_NOR \
252 + "update-uboot-nor=run load-uboot-nor write-uboot-nor\0"
253 +
254 +#define CONFIG_EXTRA_ENV_SETTINGS \
255 + CONFIG_ENV_LANTIQ_DEFAULTS \
256 + CONFIG_ENV_UPDATE_UBOOT_NOR \
257 + "kernel_addr=0xB0040000\0"
258 +
259 +#endif /* __CONFIG_H */
260 --
261 1.8.3.2
262