package/kernel/mac80211/patches/306-ath5k-fix-reset-race.patch

   1 From: Sergey Ryazanov <ryazanov.s.a@gmail.com>
   2 Date: Wed, 4 Mar 2015 05:12:11 +0300
   3 Subject: [PATCH] ath5k: fix reset race
   4
   5 To prepare for reset ath5k should finish all asynchronous tasks. At
   6 first, it disables the interrupt generation, then it waits for the
   7 interrupt handler and tasklets completion, and then proceeds to the HW
   8 configuration update. But it does not consider that the interrupt
   9 handler or tasklet re-enables the interrupt generation. And we fall in a
  10 situation when ath5k assumes that interrupts are disabled, but it is
  11 not.
  12
  13 This can lead to different consequences, such as reception of the frame,
  14 when we do not expect it. Under certain circumstances, this can lead to
  15 the following warning:
  16
  17   WARNING: at ath5k/base.c:589 ath5k_tasklet_rx+0x318/0x6ec [ath5k]()
  18   invalid hw_rix: 1a
  19   [..]
  20   Call Trace:
  21   [<802656a8>] show_stack+0x48/0x70
  22   [<802dd92c>] warn_slowpath_common+0x88/0xbc
  23   [<802dd98c>] warn_slowpath_fmt+0x2c/0x38
  24   [<81b51be8>] ath5k_tasklet_rx+0x318/0x6ec [ath5k]
  25   [<8028ac64>] tasklet_action+0x8c/0xf0
  26   [<80075804>] __do_softirq+0x180/0x32c
  27   [<80196ce8>] irq_exit+0x54/0x70
  28   [<80041848>] ret_from_irq+0x0/0x4
  29   [<80182fdc>] ioread32+0x4/0xc
  30   [<81b4c42c>] ath5k_hw_set_sleep_clock+0x2ec/0x474 [ath5k]
  31   [<81b4cf28>] ath5k_hw_reset+0x50/0xeb8 [ath5k]
  32   [<81b50900>] ath5k_reset+0xd4/0x310 [ath5k]
  33   [<81b557e8>] ath5k_config+0x4c/0x104 [ath5k]
  34   [<80d01770>] ieee80211_hw_config+0x2f4/0x35c [mac80211]
  35   [<80d09aa8>] ieee80211_scan_work+0x2e4/0x414 [mac80211]
  36   [<8022c3f4>] process_one_work+0x28c/0x400
  37   [<802df8f8>] worker_thread+0x258/0x3c0
  38   [<801b5710>] kthread+0xe0/0xec
  39   [<800418a8>] ret_from_kernel_thread+0x14/0x1c
  40
  41 Fix this issue by adding a new status flag, which forbids to re-enable
  42 the interrupt generation until the HW configuration is completed.
  43
  44 Note: previous patch, which reorders the Rx disable code helps to avoid
  45 the above warning, but not fixes the root cause of unexpected frame
  46 receiving.
  47
  48 CC: Jiri Slaby <jirislaby@gmail.com>
  49 CC: Nick Kossifidis <mickflemm@gmail.com>
  50 CC: Luis R. Rodriguez <mcgrof@do-not-panic.com>
  51 Reported-by: Christophe Prevotaux <cprevotaux@nltinc.com>
  52 Tested-by: Christophe Prevotaux <cprevotaux@nltinc.com>
  53 Tested-by: Eric Bree <ebree@nltinc.com>
  54 Signed-off-by: Sergey Ryazanov <ryazanov.s.a@gmail.com>
  55 ---
  56
  57 --- a/drivers/net/wireless/ath/ath5k/ath5k.h
  58 +++ b/drivers/net/wireless/ath/ath5k/ath5k.h
  59 @@ -1283,6 +1283,7 @@ struct ath5k_hw {
  60  #define ATH_STAT_PROMISC       1
  61  #define ATH_STAT_LEDSOFT       2               /* enable LED gpio status */
  62  #define ATH_STAT_STARTED       3               /* opened & irqs enabled */
  63 +#define ATH_STAT_RESET         4               /* hw reset */
  64
  65         unsigned int            filter_flags;   /* HW flags, AR5K_RX_FILTER_* */
  66         unsigned int            fif_filter_flags; /* Current FIF_* filter flags */
  67 --- a/drivers/net/wireless/ath/ath5k/base.c
  68 +++ b/drivers/net/wireless/ath/ath5k/base.c
  69 @@ -1523,6 +1523,9 @@ ath5k_set_current_imask(struct ath5k_hw
  70         enum ath5k_int imask;
  71         unsigned long flags;
  72
  73 +       if (test_bit(ATH_STAT_RESET, ah->status))
  74 +               return;
  75 +
  76         spin_lock_irqsave(&ah->irqlock, flags);
  77         imask = ah->imask;
  78         if (ah->rx_pending)
  79 @@ -2862,6 +2865,8 @@ ath5k_reset(struct ath5k_hw *ah, struct
  80
  81         ATH5K_DBG(ah, ATH5K_DEBUG_RESET, "resetting\n");
  82
  83 +       __set_bit(ATH_STAT_RESET, ah->status);
  84 +
  85         ath5k_hw_set_imr(ah, 0);
  86         synchronize_irq(ah->irq);
  87         ath5k_stop_tasklets(ah);
  88 @@ -2952,6 +2957,8 @@ ath5k_reset(struct ath5k_hw *ah, struct
  89          */
  90  /*     ath5k_chan_change(ah, c); */
  91
  92 +       __clear_bit(ATH_STAT_RESET, ah->status);
  93 +
  94         ath5k_beacon_config(ah);
  95         /* intrs are enabled by ath5k_beacon_config */
  96