3255b8da0ce7ec6dc5986895b186ae7361916306
[openwrt/svn-archive/archive.git] / package / mac80211 / patches / 300-pending_work.patch
1 --- a/drivers/net/wireless/ath/ath5k/mac80211-ops.c
2 +++ b/drivers/net/wireless/ath/ath5k/mac80211-ops.c
3 @@ -210,8 +210,8 @@ ath5k_config(struct ieee80211_hw *hw, u3
4 }
5
6 if ((changed & IEEE80211_CONF_CHANGE_POWER) &&
7 - (ah->power_level != conf->power_level)) {
8 - ah->power_level = conf->power_level;
9 + (ah->ah_txpower.txp_requested != conf->power_level)) {
10 + ah->ah_txpower.txp_requested = conf->power_level;
11
12 /* Half dB steps */
13 ath5k_hw_set_txpower_limit(ah, (conf->power_level * 2));
14 @@ -622,7 +622,7 @@ ath5k_conf_tx(struct ieee80211_hw *hw, s
15 qi.tqi_aifs = params->aifs;
16 qi.tqi_cw_min = params->cw_min;
17 qi.tqi_cw_max = params->cw_max;
18 - qi.tqi_burst_time = params->txop;
19 + qi.tqi_burst_time = params->txop * 32;
20
21 ATH5K_DBG(ah, ATH5K_DEBUG_ANY,
22 "Configure tx [queue %d], "
23 --- a/drivers/net/wireless/ath/ath9k/ar9002_hw.c
24 +++ b/drivers/net/wireless/ath/ath9k/ar9002_hw.c
25 @@ -26,106 +26,74 @@
26 static void ar9002_hw_init_mode_regs(struct ath_hw *ah)
27 {
28 if (AR_SREV_9271(ah)) {
29 - INIT_INI_ARRAY(&ah->iniModes, ar9271Modes_9271,
30 - ARRAY_SIZE(ar9271Modes_9271), 5);
31 - INIT_INI_ARRAY(&ah->iniCommon, ar9271Common_9271,
32 - ARRAY_SIZE(ar9271Common_9271), 2);
33 - INIT_INI_ARRAY(&ah->iniModes_9271_ANI_reg, ar9271Modes_9271_ANI_reg,
34 - ARRAY_SIZE(ar9271Modes_9271_ANI_reg), 5);
35 + INIT_INI_ARRAY(&ah->iniModes, ar9271Modes_9271);
36 + INIT_INI_ARRAY(&ah->iniCommon, ar9271Common_9271);
37 + INIT_INI_ARRAY(&ah->iniModes_9271_ANI_reg, ar9271Modes_9271_ANI_reg);
38 return;
39 }
40
41 if (ah->config.pcie_clock_req)
42 INIT_INI_ARRAY(&ah->iniPcieSerdes,
43 - ar9280PciePhy_clkreq_off_L1_9280,
44 - ARRAY_SIZE(ar9280PciePhy_clkreq_off_L1_9280), 2);
45 + ar9280PciePhy_clkreq_off_L1_9280);
46 else
47 INIT_INI_ARRAY(&ah->iniPcieSerdes,
48 - ar9280PciePhy_clkreq_always_on_L1_9280,
49 - ARRAY_SIZE(ar9280PciePhy_clkreq_always_on_L1_9280), 2);
50 + ar9280PciePhy_clkreq_always_on_L1_9280);
51 #ifdef CONFIG_PM_SLEEP
52 INIT_INI_ARRAY(&ah->iniPcieSerdesWow,
53 - ar9280PciePhy_awow,
54 - ARRAY_SIZE(ar9280PciePhy_awow), 2);
55 + ar9280PciePhy_awow);
56 #endif
57
58 if (AR_SREV_9287_11_OR_LATER(ah)) {
59 - INIT_INI_ARRAY(&ah->iniModes, ar9287Modes_9287_1_1,
60 - ARRAY_SIZE(ar9287Modes_9287_1_1), 5);
61 - INIT_INI_ARRAY(&ah->iniCommon, ar9287Common_9287_1_1,
62 - ARRAY_SIZE(ar9287Common_9287_1_1), 2);
63 + INIT_INI_ARRAY(&ah->iniModes, ar9287Modes_9287_1_1);
64 + INIT_INI_ARRAY(&ah->iniCommon, ar9287Common_9287_1_1);
65 } else if (AR_SREV_9285_12_OR_LATER(ah)) {
66 - INIT_INI_ARRAY(&ah->iniModes, ar9285Modes_9285_1_2,
67 - ARRAY_SIZE(ar9285Modes_9285_1_2), 5);
68 - INIT_INI_ARRAY(&ah->iniCommon, ar9285Common_9285_1_2,
69 - ARRAY_SIZE(ar9285Common_9285_1_2), 2);
70 + INIT_INI_ARRAY(&ah->iniModes, ar9285Modes_9285_1_2);
71 + INIT_INI_ARRAY(&ah->iniCommon, ar9285Common_9285_1_2);
72 } else if (AR_SREV_9280_20_OR_LATER(ah)) {
73 - INIT_INI_ARRAY(&ah->iniModes, ar9280Modes_9280_2,
74 - ARRAY_SIZE(ar9280Modes_9280_2), 5);
75 - INIT_INI_ARRAY(&ah->iniCommon, ar9280Common_9280_2,
76 - ARRAY_SIZE(ar9280Common_9280_2), 2);
77 + INIT_INI_ARRAY(&ah->iniModes, ar9280Modes_9280_2);
78 + INIT_INI_ARRAY(&ah->iniCommon, ar9280Common_9280_2);
79
80 INIT_INI_ARRAY(&ah->iniModesFastClock,
81 - ar9280Modes_fast_clock_9280_2,
82 - ARRAY_SIZE(ar9280Modes_fast_clock_9280_2), 3);
83 + ar9280Modes_fast_clock_9280_2);
84 } else if (AR_SREV_9160_10_OR_LATER(ah)) {
85 - INIT_INI_ARRAY(&ah->iniModes, ar5416Modes_9160,
86 - ARRAY_SIZE(ar5416Modes_9160), 5);
87 - INIT_INI_ARRAY(&ah->iniCommon, ar5416Common_9160,
88 - ARRAY_SIZE(ar5416Common_9160), 2);
89 + INIT_INI_ARRAY(&ah->iniModes, ar5416Modes_9160);
90 + INIT_INI_ARRAY(&ah->iniCommon, ar5416Common_9160);
91 if (AR_SREV_9160_11(ah)) {
92 INIT_INI_ARRAY(&ah->iniAddac,
93 - ar5416Addac_9160_1_1,
94 - ARRAY_SIZE(ar5416Addac_9160_1_1), 2);
95 + ar5416Addac_9160_1_1);
96 } else {
97 - INIT_INI_ARRAY(&ah->iniAddac, ar5416Addac_9160,
98 - ARRAY_SIZE(ar5416Addac_9160), 2);
99 + INIT_INI_ARRAY(&ah->iniAddac, ar5416Addac_9160);
100 }
101 } else if (AR_SREV_9100_OR_LATER(ah)) {
102 - INIT_INI_ARRAY(&ah->iniModes, ar5416Modes_9100,
103 - ARRAY_SIZE(ar5416Modes_9100), 5);
104 - INIT_INI_ARRAY(&ah->iniCommon, ar5416Common_9100,
105 - ARRAY_SIZE(ar5416Common_9100), 2);
106 - INIT_INI_ARRAY(&ah->iniBank6, ar5416Bank6_9100,
107 - ARRAY_SIZE(ar5416Bank6_9100), 3);
108 - INIT_INI_ARRAY(&ah->iniAddac, ar5416Addac_9100,
109 - ARRAY_SIZE(ar5416Addac_9100), 2);
110 + INIT_INI_ARRAY(&ah->iniModes, ar5416Modes_9100);
111 + INIT_INI_ARRAY(&ah->iniCommon, ar5416Common_9100);
112 + INIT_INI_ARRAY(&ah->iniBank6, ar5416Bank6_9100);
113 + INIT_INI_ARRAY(&ah->iniAddac, ar5416Addac_9100);
114 } else {
115 - INIT_INI_ARRAY(&ah->iniModes, ar5416Modes,
116 - ARRAY_SIZE(ar5416Modes), 5);
117 - INIT_INI_ARRAY(&ah->iniCommon, ar5416Common,
118 - ARRAY_SIZE(ar5416Common), 2);
119 - INIT_INI_ARRAY(&ah->iniBank6TPC, ar5416Bank6TPC,
120 - ARRAY_SIZE(ar5416Bank6TPC), 3);
121 - INIT_INI_ARRAY(&ah->iniAddac, ar5416Addac,
122 - ARRAY_SIZE(ar5416Addac), 2);
123 + INIT_INI_ARRAY(&ah->iniModes, ar5416Modes);
124 + INIT_INI_ARRAY(&ah->iniCommon, ar5416Common);
125 + INIT_INI_ARRAY(&ah->iniBank6TPC, ar5416Bank6TPC);
126 + INIT_INI_ARRAY(&ah->iniAddac, ar5416Addac);
127 }
128
129 if (!AR_SREV_9280_20_OR_LATER(ah)) {
130 /* Common for AR5416, AR913x, AR9160 */
131 - INIT_INI_ARRAY(&ah->iniBB_RfGain, ar5416BB_RfGain,
132 - ARRAY_SIZE(ar5416BB_RfGain), 3);
133 + INIT_INI_ARRAY(&ah->iniBB_RfGain, ar5416BB_RfGain);
134
135 - INIT_INI_ARRAY(&ah->iniBank0, ar5416Bank0,
136 - ARRAY_SIZE(ar5416Bank0), 2);
137 - INIT_INI_ARRAY(&ah->iniBank1, ar5416Bank1,
138 - ARRAY_SIZE(ar5416Bank1), 2);
139 - INIT_INI_ARRAY(&ah->iniBank2, ar5416Bank2,
140 - ARRAY_SIZE(ar5416Bank2), 2);
141 - INIT_INI_ARRAY(&ah->iniBank3, ar5416Bank3,
142 - ARRAY_SIZE(ar5416Bank3), 3);
143 - INIT_INI_ARRAY(&ah->iniBank7, ar5416Bank7,
144 - ARRAY_SIZE(ar5416Bank7), 2);
145 + INIT_INI_ARRAY(&ah->iniBank0, ar5416Bank0);
146 + INIT_INI_ARRAY(&ah->iniBank1, ar5416Bank1);
147 + INIT_INI_ARRAY(&ah->iniBank2, ar5416Bank2);
148 + INIT_INI_ARRAY(&ah->iniBank3, ar5416Bank3);
149 + INIT_INI_ARRAY(&ah->iniBank7, ar5416Bank7);
150
151 /* Common for AR5416, AR9160 */
152 if (!AR_SREV_9100(ah))
153 - INIT_INI_ARRAY(&ah->iniBank6, ar5416Bank6,
154 - ARRAY_SIZE(ar5416Bank6), 3);
155 + INIT_INI_ARRAY(&ah->iniBank6, ar5416Bank6);
156
157 /* Common for AR913x, AR9160 */
158 if (!AR_SREV_5416(ah))
159 - INIT_INI_ARRAY(&ah->iniBank6TPC, ar5416Bank6TPC_9100,
160 - ARRAY_SIZE(ar5416Bank6TPC_9100), 3);
161 + INIT_INI_ARRAY(&ah->iniBank6TPC,
162 + ar5416Bank6TPC_9100);
163 }
164
165 /* iniAddac needs to be modified for these chips */
166 @@ -148,13 +116,9 @@ static void ar9002_hw_init_mode_regs(str
167 }
168 if (AR_SREV_9287_11_OR_LATER(ah)) {
169 INIT_INI_ARRAY(&ah->iniCckfirNormal,
170 - ar9287Common_normal_cck_fir_coeff_9287_1_1,
171 - ARRAY_SIZE(ar9287Common_normal_cck_fir_coeff_9287_1_1),
172 - 2);
173 + ar9287Common_normal_cck_fir_coeff_9287_1_1);
174 INIT_INI_ARRAY(&ah->iniCckfirJapan2484,
175 - ar9287Common_japan_2484_cck_fir_coeff_9287_1_1,
176 - ARRAY_SIZE(ar9287Common_japan_2484_cck_fir_coeff_9287_1_1),
177 - 2);
178 + ar9287Common_japan_2484_cck_fir_coeff_9287_1_1);
179 }
180 }
181
182 @@ -168,20 +132,16 @@ static void ar9280_20_hw_init_rxgain_ini
183
184 if (rxgain_type == AR5416_EEP_RXGAIN_13DB_BACKOFF)
185 INIT_INI_ARRAY(&ah->iniModesRxGain,
186 - ar9280Modes_backoff_13db_rxgain_9280_2,
187 - ARRAY_SIZE(ar9280Modes_backoff_13db_rxgain_9280_2), 5);
188 + ar9280Modes_backoff_13db_rxgain_9280_2);
189 else if (rxgain_type == AR5416_EEP_RXGAIN_23DB_BACKOFF)
190 INIT_INI_ARRAY(&ah->iniModesRxGain,
191 - ar9280Modes_backoff_23db_rxgain_9280_2,
192 - ARRAY_SIZE(ar9280Modes_backoff_23db_rxgain_9280_2), 5);
193 + ar9280Modes_backoff_23db_rxgain_9280_2);
194 else
195 INIT_INI_ARRAY(&ah->iniModesRxGain,
196 - ar9280Modes_original_rxgain_9280_2,
197 - ARRAY_SIZE(ar9280Modes_original_rxgain_9280_2), 5);
198 + ar9280Modes_original_rxgain_9280_2);
199 } else {
200 INIT_INI_ARRAY(&ah->iniModesRxGain,
201 - ar9280Modes_original_rxgain_9280_2,
202 - ARRAY_SIZE(ar9280Modes_original_rxgain_9280_2), 5);
203 + ar9280Modes_original_rxgain_9280_2);
204 }
205 }
206
207 @@ -191,16 +151,13 @@ static void ar9280_20_hw_init_txgain_ini
208 AR5416_EEP_MINOR_VER_19) {
209 if (txgain_type == AR5416_EEP_TXGAIN_HIGH_POWER)
210 INIT_INI_ARRAY(&ah->iniModesTxGain,
211 - ar9280Modes_high_power_tx_gain_9280_2,
212 - ARRAY_SIZE(ar9280Modes_high_power_tx_gain_9280_2), 5);
213 + ar9280Modes_high_power_tx_gain_9280_2);
214 else
215 INIT_INI_ARRAY(&ah->iniModesTxGain,
216 - ar9280Modes_original_tx_gain_9280_2,
217 - ARRAY_SIZE(ar9280Modes_original_tx_gain_9280_2), 5);
218 + ar9280Modes_original_tx_gain_9280_2);
219 } else {
220 INIT_INI_ARRAY(&ah->iniModesTxGain,
221 - ar9280Modes_original_tx_gain_9280_2,
222 - ARRAY_SIZE(ar9280Modes_original_tx_gain_9280_2), 5);
223 + ar9280Modes_original_tx_gain_9280_2);
224 }
225 }
226
227 @@ -208,12 +165,10 @@ static void ar9271_hw_init_txgain_ini(st
228 {
229 if (txgain_type == AR5416_EEP_TXGAIN_HIGH_POWER)
230 INIT_INI_ARRAY(&ah->iniModesTxGain,
231 - ar9271Modes_high_power_tx_gain_9271,
232 - ARRAY_SIZE(ar9271Modes_high_power_tx_gain_9271), 5);
233 + ar9271Modes_high_power_tx_gain_9271);
234 else
235 INIT_INI_ARRAY(&ah->iniModesTxGain,
236 - ar9271Modes_normal_power_tx_gain_9271,
237 - ARRAY_SIZE(ar9271Modes_normal_power_tx_gain_9271), 5);
238 + ar9271Modes_normal_power_tx_gain_9271);
239 }
240
241 static void ar9002_hw_init_mode_gain_regs(struct ath_hw *ah)
242 @@ -222,8 +177,7 @@ static void ar9002_hw_init_mode_gain_reg
243
244 if (AR_SREV_9287_11_OR_LATER(ah))
245 INIT_INI_ARRAY(&ah->iniModesRxGain,
246 - ar9287Modes_rx_gain_9287_1_1,
247 - ARRAY_SIZE(ar9287Modes_rx_gain_9287_1_1), 5);
248 + ar9287Modes_rx_gain_9287_1_1);
249 else if (AR_SREV_9280_20(ah))
250 ar9280_20_hw_init_rxgain_ini(ah);
251
252 @@ -231,8 +185,7 @@ static void ar9002_hw_init_mode_gain_reg
253 ar9271_hw_init_txgain_ini(ah, txgain_type);
254 } else if (AR_SREV_9287_11_OR_LATER(ah)) {
255 INIT_INI_ARRAY(&ah->iniModesTxGain,
256 - ar9287Modes_tx_gain_9287_1_1,
257 - ARRAY_SIZE(ar9287Modes_tx_gain_9287_1_1), 5);
258 + ar9287Modes_tx_gain_9287_1_1);
259 } else if (AR_SREV_9280_20(ah)) {
260 ar9280_20_hw_init_txgain_ini(ah, txgain_type);
261 } else if (AR_SREV_9285_12_OR_LATER(ah)) {
262 @@ -240,26 +193,18 @@ static void ar9002_hw_init_mode_gain_reg
263 if (txgain_type == AR5416_EEP_TXGAIN_HIGH_POWER) {
264 if (AR_SREV_9285E_20(ah)) {
265 INIT_INI_ARRAY(&ah->iniModesTxGain,
266 - ar9285Modes_XE2_0_high_power,
267 - ARRAY_SIZE(
268 - ar9285Modes_XE2_0_high_power), 5);
269 + ar9285Modes_XE2_0_high_power);
270 } else {
271 INIT_INI_ARRAY(&ah->iniModesTxGain,
272 - ar9285Modes_high_power_tx_gain_9285_1_2,
273 - ARRAY_SIZE(
274 - ar9285Modes_high_power_tx_gain_9285_1_2), 5);
275 + ar9285Modes_high_power_tx_gain_9285_1_2);
276 }
277 } else {
278 if (AR_SREV_9285E_20(ah)) {
279 INIT_INI_ARRAY(&ah->iniModesTxGain,
280 - ar9285Modes_XE2_0_normal_power,
281 - ARRAY_SIZE(
282 - ar9285Modes_XE2_0_normal_power), 5);
283 + ar9285Modes_XE2_0_normal_power);
284 } else {
285 INIT_INI_ARRAY(&ah->iniModesTxGain,
286 - ar9285Modes_original_tx_gain_9285_1_2,
287 - ARRAY_SIZE(
288 - ar9285Modes_original_tx_gain_9285_1_2), 5);
289 + ar9285Modes_original_tx_gain_9285_1_2);
290 }
291 }
292 }
293 --- a/drivers/net/wireless/ath/ath9k/ar9003_eeprom.c
294 +++ b/drivers/net/wireless/ath/ath9k/ar9003_eeprom.c
295 @@ -131,8 +131,9 @@ static const struct ar9300_eeprom ar9300
296 .thresh62 = 28,
297 .papdRateMaskHt20 = LE32(0x0cf0e0e0),
298 .papdRateMaskHt40 = LE32(0x6cf0e0e0),
299 + .xlna_bias_strength = 0,
300 .futureModal = {
301 - 0, 0, 0, 0, 0, 0, 0, 0,
302 + 0, 0, 0, 0, 0, 0, 0,
303 },
304 },
305 .base_ext1 = {
306 @@ -331,8 +332,9 @@ static const struct ar9300_eeprom ar9300
307 .thresh62 = 28,
308 .papdRateMaskHt20 = LE32(0x0c80c080),
309 .papdRateMaskHt40 = LE32(0x0080c080),
310 + .xlna_bias_strength = 0,
311 .futureModal = {
312 - 0, 0, 0, 0, 0, 0, 0, 0,
313 + 0, 0, 0, 0, 0, 0, 0,
314 },
315 },
316 .base_ext2 = {
317 @@ -704,8 +706,9 @@ static const struct ar9300_eeprom ar9300
318 .thresh62 = 28,
319 .papdRateMaskHt20 = LE32(0x0c80c080),
320 .papdRateMaskHt40 = LE32(0x0080c080),
321 + .xlna_bias_strength = 0,
322 .futureModal = {
323 - 0, 0, 0, 0, 0, 0, 0, 0,
324 + 0, 0, 0, 0, 0, 0, 0,
325 },
326 },
327 .base_ext1 = {
328 @@ -904,8 +907,9 @@ static const struct ar9300_eeprom ar9300
329 .thresh62 = 28,
330 .papdRateMaskHt20 = LE32(0x0cf0e0e0),
331 .papdRateMaskHt40 = LE32(0x6cf0e0e0),
332 + .xlna_bias_strength = 0,
333 .futureModal = {
334 - 0, 0, 0, 0, 0, 0, 0, 0,
335 + 0, 0, 0, 0, 0, 0, 0,
336 },
337 },
338 .base_ext2 = {
339 @@ -1278,8 +1282,9 @@ static const struct ar9300_eeprom ar9300
340 .thresh62 = 28,
341 .papdRateMaskHt20 = LE32(0x0c80c080),
342 .papdRateMaskHt40 = LE32(0x0080c080),
343 + .xlna_bias_strength = 0,
344 .futureModal = {
345 - 0, 0, 0, 0, 0, 0, 0, 0,
346 + 0, 0, 0, 0, 0, 0, 0,
347 },
348 },
349 .base_ext1 = {
350 @@ -1478,8 +1483,9 @@ static const struct ar9300_eeprom ar9300
351 .thresh62 = 28,
352 .papdRateMaskHt20 = LE32(0x0cf0e0e0),
353 .papdRateMaskHt40 = LE32(0x6cf0e0e0),
354 + .xlna_bias_strength = 0,
355 .futureModal = {
356 - 0, 0, 0, 0, 0, 0, 0, 0,
357 + 0, 0, 0, 0, 0, 0, 0,
358 },
359 },
360 .base_ext2 = {
361 @@ -1852,8 +1858,9 @@ static const struct ar9300_eeprom ar9300
362 .thresh62 = 28,
363 .papdRateMaskHt20 = LE32(0x0c80c080),
364 .papdRateMaskHt40 = LE32(0x0080c080),
365 + .xlna_bias_strength = 0,
366 .futureModal = {
367 - 0, 0, 0, 0, 0, 0, 0, 0,
368 + 0, 0, 0, 0, 0, 0, 0,
369 },
370 },
371 .base_ext1 = {
372 @@ -2052,8 +2059,9 @@ static const struct ar9300_eeprom ar9300
373 .thresh62 = 28,
374 .papdRateMaskHt20 = LE32(0x0cf0e0e0),
375 .papdRateMaskHt40 = LE32(0x6cf0e0e0),
376 + .xlna_bias_strength = 0,
377 .futureModal = {
378 - 0, 0, 0, 0, 0, 0, 0, 0,
379 + 0, 0, 0, 0, 0, 0, 0,
380 },
381 },
382 .base_ext2 = {
383 @@ -2425,8 +2433,9 @@ static const struct ar9300_eeprom ar9300
384 .thresh62 = 28,
385 .papdRateMaskHt20 = LE32(0x0c80C080),
386 .papdRateMaskHt40 = LE32(0x0080C080),
387 + .xlna_bias_strength = 0,
388 .futureModal = {
389 - 0, 0, 0, 0, 0, 0, 0, 0,
390 + 0, 0, 0, 0, 0, 0, 0,
391 },
392 },
393 .base_ext1 = {
394 @@ -2625,8 +2634,9 @@ static const struct ar9300_eeprom ar9300
395 .thresh62 = 28,
396 .papdRateMaskHt20 = LE32(0x0cf0e0e0),
397 .papdRateMaskHt40 = LE32(0x6cf0e0e0),
398 + .xlna_bias_strength = 0,
399 .futureModal = {
400 - 0, 0, 0, 0, 0, 0, 0, 0,
401 + 0, 0, 0, 0, 0, 0, 0,
402 },
403 },
404 .base_ext2 = {
405 @@ -2971,14 +2981,6 @@ static u32 ath9k_hw_ar9300_get_eeprom(st
406 return (pBase->txrxMask >> 4) & 0xf;
407 case EEP_RX_MASK:
408 return pBase->txrxMask & 0xf;
409 - case EEP_DRIVE_STRENGTH:
410 -#define AR9300_EEP_BASE_DRIV_STRENGTH 0x1
411 - return pBase->miscConfiguration & AR9300_EEP_BASE_DRIV_STRENGTH;
412 - case EEP_INTERNAL_REGULATOR:
413 - /* Bit 4 is internal regulator flag */
414 - return (pBase->featureEnable & 0x10) >> 4;
415 - case EEP_SWREG:
416 - return le32_to_cpu(pBase->swreg);
417 case EEP_PAPRD:
418 return !!(pBase->featureEnable & BIT(5));
419 case EEP_CHAIN_MASK_REDUCE:
420 @@ -2989,8 +2991,6 @@ static u32 ath9k_hw_ar9300_get_eeprom(st
421 return eep->modalHeader5G.antennaGain;
422 case EEP_ANTENNA_GAIN_2G:
423 return eep->modalHeader2G.antennaGain;
424 - case EEP_QUICK_DROP:
425 - return pBase->miscConfiguration & BIT(1);
426 default:
427 return 0;
428 }
429 @@ -3260,10 +3260,20 @@ static int ar9300_eeprom_restore_interna
430 int it;
431 u16 checksum, mchecksum;
432 struct ath_common *common = ath9k_hw_common(ah);
433 + struct ar9300_eeprom *eep;
434 eeprom_read_op read;
435
436 - if (ath9k_hw_use_flash(ah))
437 - return ar9300_eeprom_restore_flash(ah, mptr, mdata_size);
438 + if (ath9k_hw_use_flash(ah)) {
439 + u8 txrx;
440 +
441 + ar9300_eeprom_restore_flash(ah, mptr, mdata_size);
442 +
443 + /* check if eeprom contains valid data */
444 + eep = (struct ar9300_eeprom *) mptr;
445 + txrx = eep->baseEepHeader.txrxMask;
446 + if (txrx != 0 && txrx != 0xff)
447 + return 0;
448 + }
449
450 word = kzalloc(2048, GFP_KERNEL);
451 if (!word)
452 @@ -3493,19 +3503,20 @@ static int ath9k_hw_ar9300_get_eeprom_re
453 return 0;
454 }
455
456 -static s32 ar9003_hw_xpa_bias_level_get(struct ath_hw *ah, bool is2ghz)
457 +static struct ar9300_modal_eep_header *ar9003_modal_header(struct ath_hw *ah,
458 + bool is2ghz)
459 {
460 struct ar9300_eeprom *eep = &ah->eeprom.ar9300_eep;
461
462 if (is2ghz)
463 - return eep->modalHeader2G.xpaBiasLvl;
464 + return &eep->modalHeader2G;
465 else
466 - return eep->modalHeader5G.xpaBiasLvl;
467 + return &eep->modalHeader5G;
468 }
469
470 static void ar9003_hw_xpa_bias_level_apply(struct ath_hw *ah, bool is2ghz)
471 {
472 - int bias = ar9003_hw_xpa_bias_level_get(ah, is2ghz);
473 + int bias = ar9003_modal_header(ah, is2ghz)->xpaBiasLvl;
474
475 if (AR_SREV_9485(ah) || AR_SREV_9330(ah) || AR_SREV_9340(ah))
476 REG_RMW_FIELD(ah, AR_CH0_TOP2, AR_CH0_TOP2_XPABIASLVL, bias);
477 @@ -3521,57 +3532,26 @@ static void ar9003_hw_xpa_bias_level_app
478 }
479 }
480
481 -static u16 ar9003_switch_com_spdt_get(struct ath_hw *ah, bool is_2ghz)
482 +static u16 ar9003_switch_com_spdt_get(struct ath_hw *ah, bool is2ghz)
483 {
484 - struct ar9300_eeprom *eep = &ah->eeprom.ar9300_eep;
485 - __le16 val;
486 -
487 - if (is_2ghz)
488 - val = eep->modalHeader2G.switchcomspdt;
489 - else
490 - val = eep->modalHeader5G.switchcomspdt;
491 - return le16_to_cpu(val);
492 + return le16_to_cpu(ar9003_modal_header(ah, is2ghz)->switchcomspdt);
493 }
494
495
496 static u32 ar9003_hw_ant_ctrl_common_get(struct ath_hw *ah, bool is2ghz)
497 {
498 - struct ar9300_eeprom *eep = &ah->eeprom.ar9300_eep;
499 - __le32 val;
500 -
501 - if (is2ghz)
502 - val = eep->modalHeader2G.antCtrlCommon;
503 - else
504 - val = eep->modalHeader5G.antCtrlCommon;
505 - return le32_to_cpu(val);
506 + return le32_to_cpu(ar9003_modal_header(ah, is2ghz)->antCtrlCommon);
507 }
508
509 static u32 ar9003_hw_ant_ctrl_common_2_get(struct ath_hw *ah, bool is2ghz)
510 {
511 - struct ar9300_eeprom *eep = &ah->eeprom.ar9300_eep;
512 - __le32 val;
513 -
514 - if (is2ghz)
515 - val = eep->modalHeader2G.antCtrlCommon2;
516 - else
517 - val = eep->modalHeader5G.antCtrlCommon2;
518 - return le32_to_cpu(val);
519 + return le32_to_cpu(ar9003_modal_header(ah, is2ghz)->antCtrlCommon2);
520 }
521
522 -static u16 ar9003_hw_ant_ctrl_chain_get(struct ath_hw *ah,
523 - int chain,
524 +static u16 ar9003_hw_ant_ctrl_chain_get(struct ath_hw *ah, int chain,
525 bool is2ghz)
526 {
527 - struct ar9300_eeprom *eep = &ah->eeprom.ar9300_eep;
528 - __le16 val = 0;
529 -
530 - if (chain >= 0 && chain < AR9300_MAX_CHAINS) {
531 - if (is2ghz)
532 - val = eep->modalHeader2G.antCtrlChain[chain];
533 - else
534 - val = eep->modalHeader5G.antCtrlChain[chain];
535 - }
536 -
537 + __le16 val = ar9003_modal_header(ah, is2ghz)->antCtrlChain[chain];
538 return le16_to_cpu(val);
539 }
540
541 @@ -3681,11 +3661,12 @@ static void ar9003_hw_ant_ctrl_apply(str
542
543 static void ar9003_hw_drive_strength_apply(struct ath_hw *ah)
544 {
545 + struct ar9300_eeprom *eep = &ah->eeprom.ar9300_eep;
546 + struct ar9300_base_eep_hdr *pBase = &eep->baseEepHeader;
547 int drive_strength;
548 unsigned long reg;
549
550 - drive_strength = ath9k_hw_ar9300_get_eeprom(ah, EEP_DRIVE_STRENGTH);
551 -
552 + drive_strength = pBase->miscConfiguration & BIT(0);
553 if (!drive_strength)
554 return;
555
556 @@ -3815,11 +3796,11 @@ static bool is_pmu_set(struct ath_hw *ah
557
558 void ar9003_hw_internal_regulator_apply(struct ath_hw *ah)
559 {
560 - int internal_regulator =
561 - ath9k_hw_ar9300_get_eeprom(ah, EEP_INTERNAL_REGULATOR);
562 + struct ar9300_eeprom *eep = &ah->eeprom.ar9300_eep;
563 + struct ar9300_base_eep_hdr *pBase = &eep->baseEepHeader;
564 u32 reg_val;
565
566 - if (internal_regulator) {
567 + if (pBase->featureEnable & BIT(4)) {
568 if (AR_SREV_9330(ah) || AR_SREV_9485(ah)) {
569 int reg_pmu_set;
570
571 @@ -3863,11 +3844,11 @@ void ar9003_hw_internal_regulator_apply(
572 if (!is_pmu_set(ah, AR_PHY_PMU2, reg_pmu_set))
573 return;
574 } else if (AR_SREV_9462(ah)) {
575 - reg_val = ath9k_hw_ar9300_get_eeprom(ah, EEP_SWREG);
576 + reg_val = le32_to_cpu(pBase->swreg);
577 REG_WRITE(ah, AR_PHY_PMU1, reg_val);
578 } else {
579 /* Internal regulator is ON. Write swreg register. */
580 - reg_val = ath9k_hw_ar9300_get_eeprom(ah, EEP_SWREG);
581 + reg_val = le32_to_cpu(pBase->swreg);
582 REG_WRITE(ah, AR_RTC_REG_CONTROL1,
583 REG_READ(ah, AR_RTC_REG_CONTROL1) &
584 (~AR_RTC_REG_CONTROL1_SWREG_PROGRAM));
585 @@ -3909,6 +3890,9 @@ static void ar9003_hw_apply_tuning_caps(
586 struct ar9300_eeprom *eep = &ah->eeprom.ar9300_eep;
587 u8 tuning_caps_param = eep->baseEepHeader.params_for_tuning_caps[0];
588
589 + if (AR_SREV_9485(ah) || AR_SREV_9330(ah) || AR_SREV_9340(ah))
590 + return;
591 +
592 if (eep->baseEepHeader.featureEnable & 0x40) {
593 tuning_caps_param &= 0x7f;
594 REG_RMW_FIELD(ah, AR_CH0_XTAL, AR_CH0_XTAL_CAPINDAC,
595 @@ -3921,10 +3905,11 @@ static void ar9003_hw_apply_tuning_caps(
596 static void ar9003_hw_quick_drop_apply(struct ath_hw *ah, u16 freq)
597 {
598 struct ar9300_eeprom *eep = &ah->eeprom.ar9300_eep;
599 - int quick_drop = ath9k_hw_ar9300_get_eeprom(ah, EEP_QUICK_DROP);
600 + struct ar9300_base_eep_hdr *pBase = &eep->baseEepHeader;
601 + int quick_drop;
602 s32 t[3], f[3] = {5180, 5500, 5785};
603
604 - if (!quick_drop)
605 + if (!(pBase->miscConfiguration & BIT(1)))
606 return;
607
608 if (freq < 4000)
609 @@ -3938,13 +3923,11 @@ static void ar9003_hw_quick_drop_apply(s
610 REG_RMW_FIELD(ah, AR_PHY_AGC, AR_PHY_AGC_QUICK_DROP, quick_drop);
611 }
612
613 -static void ar9003_hw_txend_to_xpa_off_apply(struct ath_hw *ah, u16 freq)
614 +static void ar9003_hw_txend_to_xpa_off_apply(struct ath_hw *ah, bool is2ghz)
615 {
616 - struct ar9300_eeprom *eep = &ah->eeprom.ar9300_eep;
617 u32 value;
618
619 - value = (freq < 4000) ? eep->modalHeader2G.txEndToXpaOff :
620 - eep->modalHeader5G.txEndToXpaOff;
621 + value = ar9003_modal_header(ah, is2ghz)->txEndToXpaOff;
622
623 REG_RMW_FIELD(ah, AR_PHY_XPA_TIMING_CTL,
624 AR_PHY_XPA_TIMING_CTL_TX_END_XPAB_OFF, value);
625 @@ -3952,19 +3935,63 @@ static void ar9003_hw_txend_to_xpa_off_a
626 AR_PHY_XPA_TIMING_CTL_TX_END_XPAA_OFF, value);
627 }
628
629 +static void ar9003_hw_xpa_timing_control_apply(struct ath_hw *ah, bool is2ghz)
630 +{
631 + struct ar9300_eeprom *eep = &ah->eeprom.ar9300_eep;
632 + u8 xpa_ctl;
633 +
634 + if (!(eep->baseEepHeader.featureEnable & 0x80))
635 + return;
636 +
637 + if (!AR_SREV_9300(ah) && !AR_SREV_9340(ah) && !AR_SREV_9580(ah))
638 + return;
639 +
640 + xpa_ctl = ar9003_modal_header(ah, is2ghz)->txFrameToXpaOn;
641 + if (is2ghz)
642 + REG_RMW_FIELD(ah, AR_PHY_XPA_TIMING_CTL,
643 + AR_PHY_XPA_TIMING_CTL_FRAME_XPAB_ON, xpa_ctl);
644 + else
645 + REG_RMW_FIELD(ah, AR_PHY_XPA_TIMING_CTL,
646 + AR_PHY_XPA_TIMING_CTL_FRAME_XPAA_ON, xpa_ctl);
647 +}
648 +
649 +static void ar9003_hw_xlna_bias_strength_apply(struct ath_hw *ah, bool is2ghz)
650 +{
651 + struct ar9300_eeprom *eep = &ah->eeprom.ar9300_eep;
652 + u8 bias;
653 +
654 + if (!(eep->baseEepHeader.featureEnable & 0x40))
655 + return;
656 +
657 + if (!AR_SREV_9300(ah))
658 + return;
659 +
660 + bias = ar9003_modal_header(ah, is2ghz)->xlna_bias_strength;
661 + REG_RMW_FIELD(ah, AR_PHY_65NM_CH0_RXTX4, AR_PHY_65NM_RXTX4_XLNA_BIAS,
662 + bias & 0x3);
663 + bias >>= 2;
664 + REG_RMW_FIELD(ah, AR_PHY_65NM_CH1_RXTX4, AR_PHY_65NM_RXTX4_XLNA_BIAS,
665 + bias & 0x3);
666 + bias >>= 2;
667 + REG_RMW_FIELD(ah, AR_PHY_65NM_CH2_RXTX4, AR_PHY_65NM_RXTX4_XLNA_BIAS,
668 + bias & 0x3);
669 +}
670 +
671 static void ath9k_hw_ar9300_set_board_values(struct ath_hw *ah,
672 struct ath9k_channel *chan)
673 {
674 - ar9003_hw_xpa_bias_level_apply(ah, IS_CHAN_2GHZ(chan));
675 - ar9003_hw_ant_ctrl_apply(ah, IS_CHAN_2GHZ(chan));
676 + bool is2ghz = IS_CHAN_2GHZ(chan);
677 + ar9003_hw_xpa_timing_control_apply(ah, is2ghz);
678 + ar9003_hw_xpa_bias_level_apply(ah, is2ghz);
679 + ar9003_hw_ant_ctrl_apply(ah, is2ghz);
680 ar9003_hw_drive_strength_apply(ah);
681 + ar9003_hw_xlna_bias_strength_apply(ah, is2ghz);
682 ar9003_hw_atten_apply(ah, chan);
683 ar9003_hw_quick_drop_apply(ah, chan->channel);
684 if (!AR_SREV_9330(ah) && !AR_SREV_9340(ah) && !AR_SREV_9550(ah))
685 ar9003_hw_internal_regulator_apply(ah);
686 - if (AR_SREV_9485(ah) || AR_SREV_9330(ah) || AR_SREV_9340(ah))
687 - ar9003_hw_apply_tuning_caps(ah);
688 - ar9003_hw_txend_to_xpa_off_apply(ah, chan->channel);
689 + ar9003_hw_apply_tuning_caps(ah);
690 + ar9003_hw_txend_to_xpa_off_apply(ah, is2ghz);
691 }
692
693 static void ath9k_hw_ar9300_set_addac(struct ath_hw *ah,
694 @@ -5100,14 +5127,9 @@ s32 ar9003_hw_get_rx_gain_idx(struct ath
695 return (eep->baseEepHeader.txrxgain) & 0xf; /* bits 3:0 */
696 }
697
698 -u8 *ar9003_get_spur_chan_ptr(struct ath_hw *ah, bool is_2ghz)
699 +u8 *ar9003_get_spur_chan_ptr(struct ath_hw *ah, bool is2ghz)
700 {
701 - struct ar9300_eeprom *eep = &ah->eeprom.ar9300_eep;
702 -
703 - if (is_2ghz)
704 - return eep->modalHeader2G.spurChans;
705 - else
706 - return eep->modalHeader5G.spurChans;
707 + return ar9003_modal_header(ah, is2ghz)->spurChans;
708 }
709
710 unsigned int ar9003_get_paprd_scale_factor(struct ath_hw *ah,
711 --- a/drivers/net/wireless/ath/ath9k/ar9003_eeprom.h
712 +++ b/drivers/net/wireless/ath/ath9k/ar9003_eeprom.h
713 @@ -231,7 +231,8 @@ struct ar9300_modal_eep_header {
714 __le32 papdRateMaskHt20;
715 __le32 papdRateMaskHt40;
716 __le16 switchcomspdt;
717 - u8 futureModal[8];
718 + u8 xlna_bias_strength;
719 + u8 futureModal[7];
720 } __packed;
721
722 struct ar9300_cal_data_per_freq_op_loop {
723 --- a/drivers/net/wireless/ath/ath9k/ar9003_hw.c
724 +++ b/drivers/net/wireless/ath/ath9k/ar9003_hw.c
725 @@ -44,462 +44,310 @@ static void ar9003_hw_init_mode_regs(str
726 ar9462_2p0_baseband_core_txfir_coeff_japan_2484
727 if (AR_SREV_9330_11(ah)) {
728 /* mac */
729 - INIT_INI_ARRAY(&ah->iniMac[ATH_INI_PRE], NULL, 0, 0);
730 INIT_INI_ARRAY(&ah->iniMac[ATH_INI_CORE],
731 - ar9331_1p1_mac_core,
732 - ARRAY_SIZE(ar9331_1p1_mac_core), 2);
733 + ar9331_1p1_mac_core);
734 INIT_INI_ARRAY(&ah->iniMac[ATH_INI_POST],
735 - ar9331_1p1_mac_postamble,
736 - ARRAY_SIZE(ar9331_1p1_mac_postamble), 5);
737 + ar9331_1p1_mac_postamble);
738
739 /* bb */
740 - INIT_INI_ARRAY(&ah->iniBB[ATH_INI_PRE], NULL, 0, 0);
741 INIT_INI_ARRAY(&ah->iniBB[ATH_INI_CORE],
742 - ar9331_1p1_baseband_core,
743 - ARRAY_SIZE(ar9331_1p1_baseband_core), 2);
744 + ar9331_1p1_baseband_core);
745 INIT_INI_ARRAY(&ah->iniBB[ATH_INI_POST],
746 - ar9331_1p1_baseband_postamble,
747 - ARRAY_SIZE(ar9331_1p1_baseband_postamble), 5);
748 + ar9331_1p1_baseband_postamble);
749
750 /* radio */
751 - INIT_INI_ARRAY(&ah->iniRadio[ATH_INI_PRE], NULL, 0, 0);
752 INIT_INI_ARRAY(&ah->iniRadio[ATH_INI_CORE],
753 - ar9331_1p1_radio_core,
754 - ARRAY_SIZE(ar9331_1p1_radio_core), 2);
755 - INIT_INI_ARRAY(&ah->iniRadio[ATH_INI_POST], NULL, 0, 0);
756 + ar9331_1p1_radio_core);
757
758 /* soc */
759 INIT_INI_ARRAY(&ah->iniSOC[ATH_INI_PRE],
760 - ar9331_1p1_soc_preamble,
761 - ARRAY_SIZE(ar9331_1p1_soc_preamble), 2);
762 - INIT_INI_ARRAY(&ah->iniSOC[ATH_INI_CORE], NULL, 0, 0);
763 + ar9331_1p1_soc_preamble);
764 INIT_INI_ARRAY(&ah->iniSOC[ATH_INI_POST],
765 - ar9331_1p1_soc_postamble,
766 - ARRAY_SIZE(ar9331_1p1_soc_postamble), 2);
767 + ar9331_1p1_soc_postamble);
768
769 /* rx/tx gain */
770 INIT_INI_ARRAY(&ah->iniModesRxGain,
771 - ar9331_common_rx_gain_1p1,
772 - ARRAY_SIZE(ar9331_common_rx_gain_1p1), 2);
773 + ar9331_common_rx_gain_1p1);
774 INIT_INI_ARRAY(&ah->iniModesTxGain,
775 - ar9331_modes_lowest_ob_db_tx_gain_1p1,
776 - ARRAY_SIZE(ar9331_modes_lowest_ob_db_tx_gain_1p1),
777 - 5);
778 + ar9331_modes_lowest_ob_db_tx_gain_1p1);
779
780 /* additional clock settings */
781 if (ah->is_clk_25mhz)
782 INIT_INI_ARRAY(&ah->iniAdditional,
783 - ar9331_1p1_xtal_25M,
784 - ARRAY_SIZE(ar9331_1p1_xtal_25M), 2);
785 + ar9331_1p1_xtal_25M);
786 else
787 INIT_INI_ARRAY(&ah->iniAdditional,
788 - ar9331_1p1_xtal_40M,
789 - ARRAY_SIZE(ar9331_1p1_xtal_40M), 2);
790 + ar9331_1p1_xtal_40M);
791 } else if (AR_SREV_9330_12(ah)) {
792 /* mac */
793 - INIT_INI_ARRAY(&ah->iniMac[ATH_INI_PRE], NULL, 0, 0);
794 INIT_INI_ARRAY(&ah->iniMac[ATH_INI_CORE],
795 - ar9331_1p2_mac_core,
796 - ARRAY_SIZE(ar9331_1p2_mac_core), 2);
797 + ar9331_1p2_mac_core);
798 INIT_INI_ARRAY(&ah->iniMac[ATH_INI_POST],
799 - ar9331_1p2_mac_postamble,
800 - ARRAY_SIZE(ar9331_1p2_mac_postamble), 5);
801 + ar9331_1p2_mac_postamble);
802
803 /* bb */
804 - INIT_INI_ARRAY(&ah->iniBB[ATH_INI_PRE], NULL, 0, 0);
805 INIT_INI_ARRAY(&ah->iniBB[ATH_INI_CORE],
806 - ar9331_1p2_baseband_core,
807 - ARRAY_SIZE(ar9331_1p2_baseband_core), 2);
808 + ar9331_1p2_baseband_core);
809 INIT_INI_ARRAY(&ah->iniBB[ATH_INI_POST],
810 - ar9331_1p2_baseband_postamble,
811 - ARRAY_SIZE(ar9331_1p2_baseband_postamble), 5);
812 + ar9331_1p2_baseband_postamble);
813
814 /* radio */
815 - INIT_INI_ARRAY(&ah->iniRadio[ATH_INI_PRE], NULL, 0, 0);
816 INIT_INI_ARRAY(&ah->iniRadio[ATH_INI_CORE],
817 - ar9331_1p2_radio_core,
818 - ARRAY_SIZE(ar9331_1p2_radio_core), 2);
819 - INIT_INI_ARRAY(&ah->iniRadio[ATH_INI_POST], NULL, 0, 0);
820 + ar9331_1p2_radio_core);
821
822 /* soc */
823 INIT_INI_ARRAY(&ah->iniSOC[ATH_INI_PRE],
824 - ar9331_1p2_soc_preamble,
825 - ARRAY_SIZE(ar9331_1p2_soc_preamble), 2);
826 - INIT_INI_ARRAY(&ah->iniSOC[ATH_INI_CORE], NULL, 0, 0);
827 + ar9331_1p2_soc_preamble);
828 INIT_INI_ARRAY(&ah->iniSOC[ATH_INI_POST],
829 - ar9331_1p2_soc_postamble,
830 - ARRAY_SIZE(ar9331_1p2_soc_postamble), 2);
831 + ar9331_1p2_soc_postamble);
832
833 /* rx/tx gain */
834 INIT_INI_ARRAY(&ah->iniModesRxGain,
835 - ar9331_common_rx_gain_1p2,
836 - ARRAY_SIZE(ar9331_common_rx_gain_1p2), 2);
837 + ar9331_common_rx_gain_1p2);
838 INIT_INI_ARRAY(&ah->iniModesTxGain,
839 - ar9331_modes_lowest_ob_db_tx_gain_1p2,
840 - ARRAY_SIZE(ar9331_modes_lowest_ob_db_tx_gain_1p2),
841 - 5);
842 + ar9331_modes_lowest_ob_db_tx_gain_1p2);
843
844 /* additional clock settings */
845 if (ah->is_clk_25mhz)
846 INIT_INI_ARRAY(&ah->iniAdditional,
847 - ar9331_1p2_xtal_25M,
848 - ARRAY_SIZE(ar9331_1p2_xtal_25M), 2);
849 + ar9331_1p2_xtal_25M);
850 else
851 INIT_INI_ARRAY(&ah->iniAdditional,
852 - ar9331_1p2_xtal_40M,
853 - ARRAY_SIZE(ar9331_1p2_xtal_40M), 2);
854 + ar9331_1p2_xtal_40M);
855 } else if (AR_SREV_9340(ah)) {
856 /* mac */
857 - INIT_INI_ARRAY(&ah->iniMac[ATH_INI_PRE], NULL, 0, 0);
858 INIT_INI_ARRAY(&ah->iniMac[ATH_INI_CORE],
859 - ar9340_1p0_mac_core,
860 - ARRAY_SIZE(ar9340_1p0_mac_core), 2);
861 + ar9340_1p0_mac_core);
862 INIT_INI_ARRAY(&ah->iniMac[ATH_INI_POST],
863 - ar9340_1p0_mac_postamble,
864 - ARRAY_SIZE(ar9340_1p0_mac_postamble), 5);
865 + ar9340_1p0_mac_postamble);
866
867 /* bb */
868 - INIT_INI_ARRAY(&ah->iniBB[ATH_INI_PRE], NULL, 0, 0);
869 INIT_INI_ARRAY(&ah->iniBB[ATH_INI_CORE],
870 - ar9340_1p0_baseband_core,
871 - ARRAY_SIZE(ar9340_1p0_baseband_core), 2);
872 + ar9340_1p0_baseband_core);
873 INIT_INI_ARRAY(&ah->iniBB[ATH_INI_POST],
874 - ar9340_1p0_baseband_postamble,
875 - ARRAY_SIZE(ar9340_1p0_baseband_postamble), 5);
876 + ar9340_1p0_baseband_postamble);
877
878 /* radio */
879 - INIT_INI_ARRAY(&ah->iniRadio[ATH_INI_PRE], NULL, 0, 0);
880 INIT_INI_ARRAY(&ah->iniRadio[ATH_INI_CORE],
881 - ar9340_1p0_radio_core,
882 - ARRAY_SIZE(ar9340_1p0_radio_core), 2);
883 + ar9340_1p0_radio_core);
884 INIT_INI_ARRAY(&ah->iniRadio[ATH_INI_POST],
885 - ar9340_1p0_radio_postamble,
886 - ARRAY_SIZE(ar9340_1p0_radio_postamble), 5);
887 + ar9340_1p0_radio_postamble);
888
889 /* soc */
890 INIT_INI_ARRAY(&ah->iniSOC[ATH_INI_PRE],
891 - ar9340_1p0_soc_preamble,
892 - ARRAY_SIZE(ar9340_1p0_soc_preamble), 2);
893 - INIT_INI_ARRAY(&ah->iniSOC[ATH_INI_CORE], NULL, 0, 0);
894 + ar9340_1p0_soc_preamble);
895 INIT_INI_ARRAY(&ah->iniSOC[ATH_INI_POST],
896 - ar9340_1p0_soc_postamble,
897 - ARRAY_SIZE(ar9340_1p0_soc_postamble), 5);
898 + ar9340_1p0_soc_postamble);
899
900 /* rx/tx gain */
901 INIT_INI_ARRAY(&ah->iniModesRxGain,
902 - ar9340Common_wo_xlna_rx_gain_table_1p0,
903 - ARRAY_SIZE(ar9340Common_wo_xlna_rx_gain_table_1p0),
904 - 5);
905 - INIT_INI_ARRAY(&ah->iniModesTxGain,
906 - ar9340Modes_high_ob_db_tx_gain_table_1p0,
907 - ARRAY_SIZE(ar9340Modes_high_ob_db_tx_gain_table_1p0),
908 - 5);
909 + ar9340Common_wo_xlna_rx_gain_table_1p0);
910 + INIT_INI_ARRAY(&ah->iniModesTxGain,
911 + ar9340Modes_high_ob_db_tx_gain_table_1p0);
912
913 INIT_INI_ARRAY(&ah->iniModesFastClock,
914 - ar9340Modes_fast_clock_1p0,
915 - ARRAY_SIZE(ar9340Modes_fast_clock_1p0),
916 - 3);
917 + ar9340Modes_fast_clock_1p0);
918
919 if (!ah->is_clk_25mhz)
920 INIT_INI_ARRAY(&ah->iniAdditional,
921 - ar9340_1p0_radio_core_40M,
922 - ARRAY_SIZE(ar9340_1p0_radio_core_40M),
923 - 2);
924 + ar9340_1p0_radio_core_40M);
925 } else if (AR_SREV_9485_11(ah)) {
926 /* mac */
927 - INIT_INI_ARRAY(&ah->iniMac[ATH_INI_PRE], NULL, 0, 0);
928 INIT_INI_ARRAY(&ah->iniMac[ATH_INI_CORE],
929 - ar9485_1_1_mac_core,
930 - ARRAY_SIZE(ar9485_1_1_mac_core), 2);
931 + ar9485_1_1_mac_core);
932 INIT_INI_ARRAY(&ah->iniMac[ATH_INI_POST],
933 - ar9485_1_1_mac_postamble,
934 - ARRAY_SIZE(ar9485_1_1_mac_postamble), 5);
935 + ar9485_1_1_mac_postamble);
936
937 /* bb */
938 - INIT_INI_ARRAY(&ah->iniBB[ATH_INI_PRE], ar9485_1_1,
939 - ARRAY_SIZE(ar9485_1_1), 2);
940 + INIT_INI_ARRAY(&ah->iniBB[ATH_INI_PRE], ar9485_1_1);
941 INIT_INI_ARRAY(&ah->iniBB[ATH_INI_CORE],
942 - ar9485_1_1_baseband_core,
943 - ARRAY_SIZE(ar9485_1_1_baseband_core), 2);
944 + ar9485_1_1_baseband_core);
945 INIT_INI_ARRAY(&ah->iniBB[ATH_INI_POST],
946 - ar9485_1_1_baseband_postamble,
947 - ARRAY_SIZE(ar9485_1_1_baseband_postamble), 5);
948 + ar9485_1_1_baseband_postamble);
949
950 /* radio */
951 - INIT_INI_ARRAY(&ah->iniRadio[ATH_INI_PRE], NULL, 0, 0);
952 INIT_INI_ARRAY(&ah->iniRadio[ATH_INI_CORE],
953 - ar9485_1_1_radio_core,
954 - ARRAY_SIZE(ar9485_1_1_radio_core), 2);
955 + ar9485_1_1_radio_core);
956 INIT_INI_ARRAY(&ah->iniRadio[ATH_INI_POST],
957 - ar9485_1_1_radio_postamble,
958 - ARRAY_SIZE(ar9485_1_1_radio_postamble), 2);
959 + ar9485_1_1_radio_postamble);
960
961 /* soc */
962 INIT_INI_ARRAY(&ah->iniSOC[ATH_INI_PRE],
963 - ar9485_1_1_soc_preamble,
964 - ARRAY_SIZE(ar9485_1_1_soc_preamble), 2);
965 - INIT_INI_ARRAY(&ah->iniSOC[ATH_INI_CORE], NULL, 0, 0);
966 - INIT_INI_ARRAY(&ah->iniSOC[ATH_INI_POST], NULL, 0, 0);
967 + ar9485_1_1_soc_preamble);
968
969 /* rx/tx gain */
970 INIT_INI_ARRAY(&ah->iniModesRxGain,
971 - ar9485Common_wo_xlna_rx_gain_1_1,
972 - ARRAY_SIZE(ar9485Common_wo_xlna_rx_gain_1_1), 2);
973 + ar9485Common_wo_xlna_rx_gain_1_1);
974 INIT_INI_ARRAY(&ah->iniModesTxGain,
975 - ar9485_modes_lowest_ob_db_tx_gain_1_1,
976 - ARRAY_SIZE(ar9485_modes_lowest_ob_db_tx_gain_1_1),
977 - 5);
978 + ar9485_modes_lowest_ob_db_tx_gain_1_1);
979
980 /* Load PCIE SERDES settings from INI */
981
982 /* Awake Setting */
983
984 INIT_INI_ARRAY(&ah->iniPcieSerdes,
985 - ar9485_1_1_pcie_phy_clkreq_disable_L1,
986 - ARRAY_SIZE(ar9485_1_1_pcie_phy_clkreq_disable_L1),
987 - 2);
988 + ar9485_1_1_pcie_phy_clkreq_disable_L1);
989
990 /* Sleep Setting */
991
992 INIT_INI_ARRAY(&ah->iniPcieSerdesLowPower,
993 - ar9485_1_1_pcie_phy_clkreq_disable_L1,
994 - ARRAY_SIZE(ar9485_1_1_pcie_phy_clkreq_disable_L1),
995 - 2);
996 + ar9485_1_1_pcie_phy_clkreq_disable_L1);
997 } else if (AR_SREV_9462_20(ah)) {
998
999 - INIT_INI_ARRAY(&ah->iniMac[ATH_INI_PRE], NULL, 0, 0);
1000 - INIT_INI_ARRAY(&ah->iniMac[ATH_INI_CORE], ar9462_2p0_mac_core,
1001 - ARRAY_SIZE(ar9462_2p0_mac_core), 2);
1002 + INIT_INI_ARRAY(&ah->iniMac[ATH_INI_CORE], ar9462_2p0_mac_core);
1003 INIT_INI_ARRAY(&ah->iniMac[ATH_INI_POST],
1004 - ar9462_2p0_mac_postamble,
1005 - ARRAY_SIZE(ar9462_2p0_mac_postamble), 5);
1006 + ar9462_2p0_mac_postamble);
1007
1008 - INIT_INI_ARRAY(&ah->iniBB[ATH_INI_PRE], NULL, 0, 0);
1009 INIT_INI_ARRAY(&ah->iniBB[ATH_INI_CORE],
1010 - ar9462_2p0_baseband_core,
1011 - ARRAY_SIZE(ar9462_2p0_baseband_core), 2);
1012 + ar9462_2p0_baseband_core);
1013 INIT_INI_ARRAY(&ah->iniBB[ATH_INI_POST],
1014 - ar9462_2p0_baseband_postamble,
1015 - ARRAY_SIZE(ar9462_2p0_baseband_postamble), 5);
1016 + ar9462_2p0_baseband_postamble);
1017
1018 - INIT_INI_ARRAY(&ah->iniRadio[ATH_INI_PRE], NULL, 0, 0);
1019 INIT_INI_ARRAY(&ah->iniRadio[ATH_INI_CORE],
1020 - ar9462_2p0_radio_core,
1021 - ARRAY_SIZE(ar9462_2p0_radio_core), 2);
1022 + ar9462_2p0_radio_core);
1023 INIT_INI_ARRAY(&ah->iniRadio[ATH_INI_POST],
1024 - ar9462_2p0_radio_postamble,
1025 - ARRAY_SIZE(ar9462_2p0_radio_postamble), 5);
1026 + ar9462_2p0_radio_postamble);
1027 INIT_INI_ARRAY(&ah->ini_radio_post_sys2ant,
1028 - ar9462_2p0_radio_postamble_sys2ant,
1029 - ARRAY_SIZE(ar9462_2p0_radio_postamble_sys2ant),
1030 - 5);
1031 + ar9462_2p0_radio_postamble_sys2ant);
1032
1033 INIT_INI_ARRAY(&ah->iniSOC[ATH_INI_PRE],
1034 - ar9462_2p0_soc_preamble,
1035 - ARRAY_SIZE(ar9462_2p0_soc_preamble), 2);
1036 - INIT_INI_ARRAY(&ah->iniSOC[ATH_INI_CORE], NULL, 0, 0);
1037 + ar9462_2p0_soc_preamble);
1038 INIT_INI_ARRAY(&ah->iniSOC[ATH_INI_POST],
1039 - ar9462_2p0_soc_postamble,
1040 - ARRAY_SIZE(ar9462_2p0_soc_postamble), 5);
1041 + ar9462_2p0_soc_postamble);
1042
1043 INIT_INI_ARRAY(&ah->iniModesRxGain,
1044 - ar9462_common_rx_gain_table_2p0,
1045 - ARRAY_SIZE(ar9462_common_rx_gain_table_2p0), 2);
1046 + ar9462_common_rx_gain_table_2p0);
1047
1048 /* Awake -> Sleep Setting */
1049 INIT_INI_ARRAY(&ah->iniPcieSerdes,
1050 - PCIE_PLL_ON_CREQ_DIS_L1_2P0,
1051 - ARRAY_SIZE(PCIE_PLL_ON_CREQ_DIS_L1_2P0),
1052 - 2);
1053 + PCIE_PLL_ON_CREQ_DIS_L1_2P0);
1054 /* Sleep -> Awake Setting */
1055 INIT_INI_ARRAY(&ah->iniPcieSerdesLowPower,
1056 - PCIE_PLL_ON_CREQ_DIS_L1_2P0,
1057 - ARRAY_SIZE(PCIE_PLL_ON_CREQ_DIS_L1_2P0),
1058 - 2);
1059 + PCIE_PLL_ON_CREQ_DIS_L1_2P0);
1060
1061 /* Fast clock modal settings */
1062 INIT_INI_ARRAY(&ah->iniModesFastClock,
1063 - ar9462_modes_fast_clock_2p0,
1064 - ARRAY_SIZE(ar9462_modes_fast_clock_2p0), 3);
1065 + ar9462_modes_fast_clock_2p0);
1066
1067 INIT_INI_ARRAY(&ah->iniCckfirJapan2484,
1068 - AR9462_BB_CTX_COEFJ(2p0),
1069 - ARRAY_SIZE(AR9462_BB_CTX_COEFJ(2p0)), 2);
1070 + AR9462_BB_CTX_COEFJ(2p0));
1071
1072 - INIT_INI_ARRAY(&ah->ini_japan2484, AR9462_BBC_TXIFR_COEFFJ,
1073 - ARRAY_SIZE(AR9462_BBC_TXIFR_COEFFJ), 2);
1074 + INIT_INI_ARRAY(&ah->ini_japan2484, AR9462_BBC_TXIFR_COEFFJ);
1075 } else if (AR_SREV_9550(ah)) {
1076 /* mac */
1077 - INIT_INI_ARRAY(&ah->iniMac[ATH_INI_PRE], NULL, 0, 0);
1078 INIT_INI_ARRAY(&ah->iniMac[ATH_INI_CORE],
1079 - ar955x_1p0_mac_core,
1080 - ARRAY_SIZE(ar955x_1p0_mac_core), 2);
1081 + ar955x_1p0_mac_core);
1082 INIT_INI_ARRAY(&ah->iniMac[ATH_INI_POST],
1083 - ar955x_1p0_mac_postamble,
1084 - ARRAY_SIZE(ar955x_1p0_mac_postamble), 5);
1085 + ar955x_1p0_mac_postamble);
1086
1087 /* bb */
1088 - INIT_INI_ARRAY(&ah->iniBB[ATH_INI_PRE], NULL, 0, 0);
1089 INIT_INI_ARRAY(&ah->iniBB[ATH_INI_CORE],
1090 - ar955x_1p0_baseband_core,
1091 - ARRAY_SIZE(ar955x_1p0_baseband_core), 2);
1092 + ar955x_1p0_baseband_core);
1093 INIT_INI_ARRAY(&ah->iniBB[ATH_INI_POST],
1094 - ar955x_1p0_baseband_postamble,
1095 - ARRAY_SIZE(ar955x_1p0_baseband_postamble), 5);
1096 + ar955x_1p0_baseband_postamble);
1097
1098 /* radio */
1099 - INIT_INI_ARRAY(&ah->iniRadio[ATH_INI_PRE], NULL, 0, 0);
1100 INIT_INI_ARRAY(&ah->iniRadio[ATH_INI_CORE],
1101 - ar955x_1p0_radio_core,
1102 - ARRAY_SIZE(ar955x_1p0_radio_core), 2);
1103 + ar955x_1p0_radio_core);
1104 INIT_INI_ARRAY(&ah->iniRadio[ATH_INI_POST],
1105 - ar955x_1p0_radio_postamble,
1106 - ARRAY_SIZE(ar955x_1p0_radio_postamble), 5);
1107 + ar955x_1p0_radio_postamble);
1108
1109 /* soc */
1110 INIT_INI_ARRAY(&ah->iniSOC[ATH_INI_PRE],
1111 - ar955x_1p0_soc_preamble,
1112 - ARRAY_SIZE(ar955x_1p0_soc_preamble), 2);
1113 - INIT_INI_ARRAY(&ah->iniSOC[ATH_INI_CORE], NULL, 0, 0);
1114 + ar955x_1p0_soc_preamble);
1115 INIT_INI_ARRAY(&ah->iniSOC[ATH_INI_POST],
1116 - ar955x_1p0_soc_postamble,
1117 - ARRAY_SIZE(ar955x_1p0_soc_postamble), 5);
1118 + ar955x_1p0_soc_postamble);
1119
1120 /* rx/tx gain */
1121 INIT_INI_ARRAY(&ah->iniModesRxGain,
1122 - ar955x_1p0_common_wo_xlna_rx_gain_table,
1123 - ARRAY_SIZE(ar955x_1p0_common_wo_xlna_rx_gain_table),
1124 - 2);
1125 + ar955x_1p0_common_wo_xlna_rx_gain_table);
1126 INIT_INI_ARRAY(&ah->ini_modes_rx_gain_bounds,
1127 - ar955x_1p0_common_wo_xlna_rx_gain_bounds,
1128 - ARRAY_SIZE(ar955x_1p0_common_wo_xlna_rx_gain_bounds),
1129 - 5);
1130 - INIT_INI_ARRAY(&ah->iniModesTxGain,
1131 - ar955x_1p0_modes_xpa_tx_gain_table,
1132 - ARRAY_SIZE(ar955x_1p0_modes_xpa_tx_gain_table),
1133 - 9);
1134 + ar955x_1p0_common_wo_xlna_rx_gain_bounds);
1135 + INIT_INI_ARRAY(&ah->iniModesTxGain,
1136 + ar955x_1p0_modes_xpa_tx_gain_table);
1137
1138 /* Fast clock modal settings */
1139 INIT_INI_ARRAY(&ah->iniModesFastClock,
1140 - ar955x_1p0_modes_fast_clock,
1141 - ARRAY_SIZE(ar955x_1p0_modes_fast_clock), 3);
1142 + ar955x_1p0_modes_fast_clock);
1143 } else if (AR_SREV_9580(ah)) {
1144 /* mac */
1145 - INIT_INI_ARRAY(&ah->iniMac[ATH_INI_PRE], NULL, 0, 0);
1146 INIT_INI_ARRAY(&ah->iniMac[ATH_INI_CORE],
1147 - ar9580_1p0_mac_core,
1148 - ARRAY_SIZE(ar9580_1p0_mac_core), 2);
1149 + ar9580_1p0_mac_core);
1150 INIT_INI_ARRAY(&ah->iniMac[ATH_INI_POST],
1151 - ar9580_1p0_mac_postamble,
1152 - ARRAY_SIZE(ar9580_1p0_mac_postamble), 5);
1153 + ar9580_1p0_mac_postamble);
1154
1155 /* bb */
1156 - INIT_INI_ARRAY(&ah->iniBB[ATH_INI_PRE], NULL, 0, 0);
1157 INIT_INI_ARRAY(&ah->iniBB[ATH_INI_CORE],
1158 - ar9580_1p0_baseband_core,
1159 - ARRAY_SIZE(ar9580_1p0_baseband_core), 2);
1160 + ar9580_1p0_baseband_core);
1161 INIT_INI_ARRAY(&ah->iniBB[ATH_INI_POST],
1162 - ar9580_1p0_baseband_postamble,
1163 - ARRAY_SIZE(ar9580_1p0_baseband_postamble), 5);
1164 + ar9580_1p0_baseband_postamble);
1165
1166 /* radio */
1167 - INIT_INI_ARRAY(&ah->iniRadio[ATH_INI_PRE], NULL, 0, 0);
1168 INIT_INI_ARRAY(&ah->iniRadio[ATH_INI_CORE],
1169 - ar9580_1p0_radio_core,
1170 - ARRAY_SIZE(ar9580_1p0_radio_core), 2);
1171 + ar9580_1p0_radio_core);
1172 INIT_INI_ARRAY(&ah->iniRadio[ATH_INI_POST],
1173 - ar9580_1p0_radio_postamble,
1174 - ARRAY_SIZE(ar9580_1p0_radio_postamble), 5);
1175 + ar9580_1p0_radio_postamble);
1176
1177 /* soc */
1178 INIT_INI_ARRAY(&ah->iniSOC[ATH_INI_PRE],
1179 - ar9580_1p0_soc_preamble,
1180 - ARRAY_SIZE(ar9580_1p0_soc_preamble), 2);
1181 - INIT_INI_ARRAY(&ah->iniSOC[ATH_INI_CORE], NULL, 0, 0);
1182 + ar9580_1p0_soc_preamble);
1183 INIT_INI_ARRAY(&ah->iniSOC[ATH_INI_POST],
1184 - ar9580_1p0_soc_postamble,
1185 - ARRAY_SIZE(ar9580_1p0_soc_postamble), 5);
1186 + ar9580_1p0_soc_postamble);
1187
1188 /* rx/tx gain */
1189 INIT_INI_ARRAY(&ah->iniModesRxGain,
1190 - ar9580_1p0_rx_gain_table,
1191 - ARRAY_SIZE(ar9580_1p0_rx_gain_table), 2);
1192 + ar9580_1p0_rx_gain_table);
1193 INIT_INI_ARRAY(&ah->iniModesTxGain,
1194 - ar9580_1p0_low_ob_db_tx_gain_table,
1195 - ARRAY_SIZE(ar9580_1p0_low_ob_db_tx_gain_table),
1196 - 5);
1197 + ar9580_1p0_low_ob_db_tx_gain_table);
1198
1199 INIT_INI_ARRAY(&ah->iniModesFastClock,
1200 - ar9580_1p0_modes_fast_clock,
1201 - ARRAY_SIZE(ar9580_1p0_modes_fast_clock),
1202 - 3);
1203 + ar9580_1p0_modes_fast_clock);
1204 } else {
1205 /* mac */
1206 - INIT_INI_ARRAY(&ah->iniMac[ATH_INI_PRE], NULL, 0, 0);
1207 INIT_INI_ARRAY(&ah->iniMac[ATH_INI_CORE],
1208 - ar9300_2p2_mac_core,
1209 - ARRAY_SIZE(ar9300_2p2_mac_core), 2);
1210 + ar9300_2p2_mac_core);
1211 INIT_INI_ARRAY(&ah->iniMac[ATH_INI_POST],
1212 - ar9300_2p2_mac_postamble,
1213 - ARRAY_SIZE(ar9300_2p2_mac_postamble), 5);
1214 + ar9300_2p2_mac_postamble);
1215
1216 /* bb */
1217 - INIT_INI_ARRAY(&ah->iniBB[ATH_INI_PRE], NULL, 0, 0);
1218 INIT_INI_ARRAY(&ah->iniBB[ATH_INI_CORE],
1219 - ar9300_2p2_baseband_core,
1220 - ARRAY_SIZE(ar9300_2p2_baseband_core), 2);
1221 + ar9300_2p2_baseband_core);
1222 INIT_INI_ARRAY(&ah->iniBB[ATH_INI_POST],
1223 - ar9300_2p2_baseband_postamble,
1224 - ARRAY_SIZE(ar9300_2p2_baseband_postamble), 5);
1225 + ar9300_2p2_baseband_postamble);
1226
1227 /* radio */
1228 - INIT_INI_ARRAY(&ah->iniRadio[ATH_INI_PRE], NULL, 0, 0);
1229 INIT_INI_ARRAY(&ah->iniRadio[ATH_INI_CORE],
1230 - ar9300_2p2_radio_core,
1231 - ARRAY_SIZE(ar9300_2p2_radio_core), 2);
1232 + ar9300_2p2_radio_core);
1233 INIT_INI_ARRAY(&ah->iniRadio[ATH_INI_POST],
1234 - ar9300_2p2_radio_postamble,
1235 - ARRAY_SIZE(ar9300_2p2_radio_postamble), 5);
1236 + ar9300_2p2_radio_postamble);
1237
1238 /* soc */
1239 INIT_INI_ARRAY(&ah->iniSOC[ATH_INI_PRE],
1240 - ar9300_2p2_soc_preamble,
1241 - ARRAY_SIZE(ar9300_2p2_soc_preamble), 2);
1242 - INIT_INI_ARRAY(&ah->iniSOC[ATH_INI_CORE], NULL, 0, 0);
1243 + ar9300_2p2_soc_preamble);
1244 INIT_INI_ARRAY(&ah->iniSOC[ATH_INI_POST],
1245 - ar9300_2p2_soc_postamble,
1246 - ARRAY_SIZE(ar9300_2p2_soc_postamble), 5);
1247 + ar9300_2p2_soc_postamble);
1248
1249 /* rx/tx gain */
1250 INIT_INI_ARRAY(&ah->iniModesRxGain,
1251 - ar9300Common_rx_gain_table_2p2,
1252 - ARRAY_SIZE(ar9300Common_rx_gain_table_2p2), 2);
1253 + ar9300Common_rx_gain_table_2p2);
1254 INIT_INI_ARRAY(&ah->iniModesTxGain,
1255 - ar9300Modes_lowest_ob_db_tx_gain_table_2p2,
1256 - ARRAY_SIZE(ar9300Modes_lowest_ob_db_tx_gain_table_2p2),
1257 - 5);
1258 + ar9300Modes_lowest_ob_db_tx_gain_table_2p2);
1259
1260 /* Load PCIE SERDES settings from INI */
1261
1262 /* Awake Setting */
1263
1264 INIT_INI_ARRAY(&ah->iniPcieSerdes,
1265 - ar9300PciePhy_pll_on_clkreq_disable_L1_2p2,
1266 - ARRAY_SIZE(ar9300PciePhy_pll_on_clkreq_disable_L1_2p2),
1267 - 2);
1268 + ar9300PciePhy_pll_on_clkreq_disable_L1_2p2);
1269
1270 /* Sleep Setting */
1271
1272 INIT_INI_ARRAY(&ah->iniPcieSerdesLowPower,
1273 - ar9300PciePhy_pll_on_clkreq_disable_L1_2p2,
1274 - ARRAY_SIZE(ar9300PciePhy_pll_on_clkreq_disable_L1_2p2),
1275 - 2);
1276 + ar9300PciePhy_pll_on_clkreq_disable_L1_2p2);
1277
1278 /* Fast clock modal settings */
1279 INIT_INI_ARRAY(&ah->iniModesFastClock,
1280 - ar9300Modes_fast_clock_2p2,
1281 - ARRAY_SIZE(ar9300Modes_fast_clock_2p2),
1282 - 3);
1283 + ar9300Modes_fast_clock_2p2);
1284 }
1285 }
1286
1287 @@ -507,156 +355,110 @@ static void ar9003_tx_gain_table_mode0(s
1288 {
1289 if (AR_SREV_9330_12(ah))
1290 INIT_INI_ARRAY(&ah->iniModesTxGain,
1291 - ar9331_modes_lowest_ob_db_tx_gain_1p2,
1292 - ARRAY_SIZE(ar9331_modes_lowest_ob_db_tx_gain_1p2),
1293 - 5);
1294 + ar9331_modes_lowest_ob_db_tx_gain_1p2);
1295 else if (AR_SREV_9330_11(ah))
1296 INIT_INI_ARRAY(&ah->iniModesTxGain,
1297 - ar9331_modes_lowest_ob_db_tx_gain_1p1,
1298 - ARRAY_SIZE(ar9331_modes_lowest_ob_db_tx_gain_1p1),
1299 - 5);
1300 + ar9331_modes_lowest_ob_db_tx_gain_1p1);
1301 else if (AR_SREV_9340(ah))
1302 INIT_INI_ARRAY(&ah->iniModesTxGain,
1303 - ar9340Modes_lowest_ob_db_tx_gain_table_1p0,
1304 - ARRAY_SIZE(ar9340Modes_lowest_ob_db_tx_gain_table_1p0),
1305 - 5);
1306 + ar9340Modes_lowest_ob_db_tx_gain_table_1p0);
1307 else if (AR_SREV_9485_11(ah))
1308 INIT_INI_ARRAY(&ah->iniModesTxGain,
1309 - ar9485_modes_lowest_ob_db_tx_gain_1_1,
1310 - ARRAY_SIZE(ar9485_modes_lowest_ob_db_tx_gain_1_1),
1311 - 5);
1312 + ar9485_modes_lowest_ob_db_tx_gain_1_1);
1313 else if (AR_SREV_9550(ah))
1314 INIT_INI_ARRAY(&ah->iniModesTxGain,
1315 - ar955x_1p0_modes_xpa_tx_gain_table,
1316 - ARRAY_SIZE(ar955x_1p0_modes_xpa_tx_gain_table),
1317 - 9);
1318 + ar955x_1p0_modes_xpa_tx_gain_table);
1319 else if (AR_SREV_9580(ah))
1320 INIT_INI_ARRAY(&ah->iniModesTxGain,
1321 - ar9580_1p0_lowest_ob_db_tx_gain_table,
1322 - ARRAY_SIZE(ar9580_1p0_lowest_ob_db_tx_gain_table),
1323 - 5);
1324 + ar9580_1p0_lowest_ob_db_tx_gain_table);
1325 else if (AR_SREV_9462_20(ah))
1326 INIT_INI_ARRAY(&ah->iniModesTxGain,
1327 - ar9462_modes_low_ob_db_tx_gain_table_2p0,
1328 - ARRAY_SIZE(ar9462_modes_low_ob_db_tx_gain_table_2p0),
1329 - 5);
1330 + ar9462_modes_low_ob_db_tx_gain_table_2p0);
1331 else
1332 INIT_INI_ARRAY(&ah->iniModesTxGain,
1333 - ar9300Modes_lowest_ob_db_tx_gain_table_2p2,
1334 - ARRAY_SIZE(ar9300Modes_lowest_ob_db_tx_gain_table_2p2),
1335 - 5);
1336 + ar9300Modes_lowest_ob_db_tx_gain_table_2p2);
1337 }
1338
1339 static void ar9003_tx_gain_table_mode1(struct ath_hw *ah)
1340 {
1341 if (AR_SREV_9330_12(ah))
1342 INIT_INI_ARRAY(&ah->iniModesTxGain,
1343 - ar9331_modes_high_ob_db_tx_gain_1p2,
1344 - ARRAY_SIZE(ar9331_modes_high_ob_db_tx_gain_1p2),
1345 - 5);
1346 + ar9331_modes_high_ob_db_tx_gain_1p2);
1347 else if (AR_SREV_9330_11(ah))
1348 INIT_INI_ARRAY(&ah->iniModesTxGain,
1349 - ar9331_modes_high_ob_db_tx_gain_1p1,
1350 - ARRAY_SIZE(ar9331_modes_high_ob_db_tx_gain_1p1),
1351 - 5);
1352 + ar9331_modes_high_ob_db_tx_gain_1p1);
1353 else if (AR_SREV_9340(ah))
1354 INIT_INI_ARRAY(&ah->iniModesTxGain,
1355 - ar9340Modes_lowest_ob_db_tx_gain_table_1p0,
1356 - ARRAY_SIZE(ar9340Modes_lowest_ob_db_tx_gain_table_1p0),
1357 - 5);
1358 + ar9340Modes_high_ob_db_tx_gain_table_1p0);
1359 else if (AR_SREV_9485_11(ah))
1360 INIT_INI_ARRAY(&ah->iniModesTxGain,
1361 - ar9485Modes_high_ob_db_tx_gain_1_1,
1362 - ARRAY_SIZE(ar9485Modes_high_ob_db_tx_gain_1_1),
1363 - 5);
1364 + ar9485Modes_high_ob_db_tx_gain_1_1);
1365 else if (AR_SREV_9580(ah))
1366 INIT_INI_ARRAY(&ah->iniModesTxGain,
1367 - ar9580_1p0_high_ob_db_tx_gain_table,
1368 - ARRAY_SIZE(ar9580_1p0_high_ob_db_tx_gain_table),
1369 - 5);
1370 + ar9580_1p0_high_ob_db_tx_gain_table);
1371 else if (AR_SREV_9550(ah))
1372 INIT_INI_ARRAY(&ah->iniModesTxGain,
1373 - ar955x_1p0_modes_no_xpa_tx_gain_table,
1374 - ARRAY_SIZE(ar955x_1p0_modes_no_xpa_tx_gain_table),
1375 - 9);
1376 + ar955x_1p0_modes_no_xpa_tx_gain_table);
1377 else if (AR_SREV_9462_20(ah))
1378 INIT_INI_ARRAY(&ah->iniModesTxGain,
1379 - ar9462_modes_high_ob_db_tx_gain_table_2p0,
1380 - ARRAY_SIZE(ar9462_modes_high_ob_db_tx_gain_table_2p0),
1381 - 5);
1382 + ar9462_modes_high_ob_db_tx_gain_table_2p0);
1383 else
1384 INIT_INI_ARRAY(&ah->iniModesTxGain,
1385 - ar9300Modes_high_ob_db_tx_gain_table_2p2,
1386 - ARRAY_SIZE(ar9300Modes_high_ob_db_tx_gain_table_2p2),
1387 - 5);
1388 + ar9300Modes_high_ob_db_tx_gain_table_2p2);
1389 }
1390
1391 static void ar9003_tx_gain_table_mode2(struct ath_hw *ah)
1392 {
1393 if (AR_SREV_9330_12(ah))
1394 INIT_INI_ARRAY(&ah->iniModesTxGain,
1395 - ar9331_modes_low_ob_db_tx_gain_1p2,
1396 - ARRAY_SIZE(ar9331_modes_low_ob_db_tx_gain_1p2),
1397 - 5);
1398 + ar9331_modes_low_ob_db_tx_gain_1p2);
1399 else if (AR_SREV_9330_11(ah))
1400 INIT_INI_ARRAY(&ah->iniModesTxGain,
1401 - ar9331_modes_low_ob_db_tx_gain_1p1,
1402 - ARRAY_SIZE(ar9331_modes_low_ob_db_tx_gain_1p1),
1403 - 5);
1404 + ar9331_modes_low_ob_db_tx_gain_1p1);
1405 else if (AR_SREV_9340(ah))
1406 INIT_INI_ARRAY(&ah->iniModesTxGain,
1407 - ar9340Modes_lowest_ob_db_tx_gain_table_1p0,
1408 - ARRAY_SIZE(ar9340Modes_lowest_ob_db_tx_gain_table_1p0),
1409 - 5);
1410 + ar9340Modes_low_ob_db_tx_gain_table_1p0);
1411 else if (AR_SREV_9485_11(ah))
1412 INIT_INI_ARRAY(&ah->iniModesTxGain,
1413 - ar9485Modes_low_ob_db_tx_gain_1_1,
1414 - ARRAY_SIZE(ar9485Modes_low_ob_db_tx_gain_1_1),
1415 - 5);
1416 + ar9485Modes_low_ob_db_tx_gain_1_1);
1417 else if (AR_SREV_9580(ah))
1418 INIT_INI_ARRAY(&ah->iniModesTxGain,
1419 - ar9580_1p0_low_ob_db_tx_gain_table,
1420 - ARRAY_SIZE(ar9580_1p0_low_ob_db_tx_gain_table),
1421 - 5);
1422 + ar9580_1p0_low_ob_db_tx_gain_table);
1423 else
1424 INIT_INI_ARRAY(&ah->iniModesTxGain,
1425 - ar9300Modes_low_ob_db_tx_gain_table_2p2,
1426 - ARRAY_SIZE(ar9300Modes_low_ob_db_tx_gain_table_2p2),
1427 - 5);
1428 + ar9300Modes_low_ob_db_tx_gain_table_2p2);
1429 }
1430
1431 static void ar9003_tx_gain_table_mode3(struct ath_hw *ah)
1432 {
1433 if (AR_SREV_9330_12(ah))
1434 INIT_INI_ARRAY(&ah->iniModesTxGain,
1435 - ar9331_modes_high_power_tx_gain_1p2,
1436 - ARRAY_SIZE(ar9331_modes_high_power_tx_gain_1p2),
1437 - 5);
1438 + ar9331_modes_high_power_tx_gain_1p2);
1439 else if (AR_SREV_9330_11(ah))
1440 INIT_INI_ARRAY(&ah->iniModesTxGain,
1441 - ar9331_modes_high_power_tx_gain_1p1,
1442 - ARRAY_SIZE(ar9331_modes_high_power_tx_gain_1p1),
1443 - 5);
1444 + ar9331_modes_high_power_tx_gain_1p1);
1445 else if (AR_SREV_9340(ah))
1446 INIT_INI_ARRAY(&ah->iniModesTxGain,
1447 - ar9340Modes_lowest_ob_db_tx_gain_table_1p0,
1448 - ARRAY_SIZE(ar9340Modes_lowest_ob_db_tx_gain_table_1p0),
1449 - 5);
1450 + ar9340Modes_high_power_tx_gain_table_1p0);
1451 else if (AR_SREV_9485_11(ah))
1452 INIT_INI_ARRAY(&ah->iniModesTxGain,
1453 - ar9485Modes_high_power_tx_gain_1_1,
1454 - ARRAY_SIZE(ar9485Modes_high_power_tx_gain_1_1),
1455 - 5);
1456 + ar9485Modes_high_power_tx_gain_1_1);
1457 else if (AR_SREV_9580(ah))
1458 INIT_INI_ARRAY(&ah->iniModesTxGain,
1459 - ar9580_1p0_high_power_tx_gain_table,
1460 - ARRAY_SIZE(ar9580_1p0_high_power_tx_gain_table),
1461 - 5);
1462 + ar9580_1p0_high_power_tx_gain_table);
1463 else
1464 INIT_INI_ARRAY(&ah->iniModesTxGain,
1465 - ar9300Modes_high_power_tx_gain_table_2p2,
1466 - ARRAY_SIZE(ar9300Modes_high_power_tx_gain_table_2p2),
1467 - 5);
1468 + ar9300Modes_high_power_tx_gain_table_2p2);
1469 +}
1470 +
1471 +static void ar9003_tx_gain_table_mode4(struct ath_hw *ah)
1472 +{
1473 + if (AR_SREV_9340(ah))
1474 + INIT_INI_ARRAY(&ah->iniModesTxGain,
1475 + ar9340Modes_mixed_ob_db_tx_gain_table_1p0);
1476 + else if (AR_SREV_9580(ah))
1477 + INIT_INI_ARRAY(&ah->iniModesTxGain,
1478 + ar9580_1p0_mixed_ob_db_tx_gain_table);
1479 }
1480
1481 static void ar9003_tx_gain_table_apply(struct ath_hw *ah)
1482 @@ -675,6 +477,9 @@ static void ar9003_tx_gain_table_apply(s
1483 case 3:
1484 ar9003_tx_gain_table_mode3(ah);
1485 break;
1486 + case 4:
1487 + ar9003_tx_gain_table_mode4(ah);
1488 + break;
1489 }
1490 }
1491
1492 @@ -682,104 +487,67 @@ static void ar9003_rx_gain_table_mode0(s
1493 {
1494 if (AR_SREV_9330_12(ah))
1495 INIT_INI_ARRAY(&ah->iniModesRxGain,
1496 - ar9331_common_rx_gain_1p2,
1497 - ARRAY_SIZE(ar9331_common_rx_gain_1p2),
1498 - 2);
1499 + ar9331_common_rx_gain_1p2);
1500 else if (AR_SREV_9330_11(ah))
1501 INIT_INI_ARRAY(&ah->iniModesRxGain,
1502 - ar9331_common_rx_gain_1p1,
1503 - ARRAY_SIZE(ar9331_common_rx_gain_1p1),
1504 - 2);
1505 + ar9331_common_rx_gain_1p1);
1506 else if (AR_SREV_9340(ah))
1507 INIT_INI_ARRAY(&ah->iniModesRxGain,
1508 - ar9340Common_rx_gain_table_1p0,
1509 - ARRAY_SIZE(ar9340Common_rx_gain_table_1p0),
1510 - 2);
1511 + ar9340Common_rx_gain_table_1p0);
1512 else if (AR_SREV_9485_11(ah))
1513 INIT_INI_ARRAY(&ah->iniModesRxGain,
1514 - ar9485Common_wo_xlna_rx_gain_1_1,
1515 - ARRAY_SIZE(ar9485Common_wo_xlna_rx_gain_1_1),
1516 - 2);
1517 + ar9485Common_wo_xlna_rx_gain_1_1);
1518 else if (AR_SREV_9550(ah)) {
1519 INIT_INI_ARRAY(&ah->iniModesRxGain,
1520 - ar955x_1p0_common_rx_gain_table,
1521 - ARRAY_SIZE(ar955x_1p0_common_rx_gain_table),
1522 - 2);
1523 + ar955x_1p0_common_rx_gain_table);
1524 INIT_INI_ARRAY(&ah->ini_modes_rx_gain_bounds,
1525 - ar955x_1p0_common_rx_gain_bounds,
1526 - ARRAY_SIZE(ar955x_1p0_common_rx_gain_bounds),
1527 - 5);
1528 + ar955x_1p0_common_rx_gain_bounds);
1529 } else if (AR_SREV_9580(ah))
1530 INIT_INI_ARRAY(&ah->iniModesRxGain,
1531 - ar9580_1p0_rx_gain_table,
1532 - ARRAY_SIZE(ar9580_1p0_rx_gain_table),
1533 - 2);
1534 + ar9580_1p0_rx_gain_table);
1535 else if (AR_SREV_9462_20(ah))
1536 INIT_INI_ARRAY(&ah->iniModesRxGain,
1537 - ar9462_common_rx_gain_table_2p0,
1538 - ARRAY_SIZE(ar9462_common_rx_gain_table_2p0),
1539 - 2);
1540 + ar9462_common_rx_gain_table_2p0);
1541 else
1542 INIT_INI_ARRAY(&ah->iniModesRxGain,
1543 - ar9300Common_rx_gain_table_2p2,
1544 - ARRAY_SIZE(ar9300Common_rx_gain_table_2p2),
1545 - 2);
1546 + ar9300Common_rx_gain_table_2p2);
1547 }
1548
1549 static void ar9003_rx_gain_table_mode1(struct ath_hw *ah)
1550 {
1551 if (AR_SREV_9330_12(ah))
1552 INIT_INI_ARRAY(&ah->iniModesRxGain,
1553 - ar9331_common_wo_xlna_rx_gain_1p2,
1554 - ARRAY_SIZE(ar9331_common_wo_xlna_rx_gain_1p2),
1555 - 2);
1556 + ar9331_common_wo_xlna_rx_gain_1p2);
1557 else if (AR_SREV_9330_11(ah))
1558 INIT_INI_ARRAY(&ah->iniModesRxGain,
1559 - ar9331_common_wo_xlna_rx_gain_1p1,
1560 - ARRAY_SIZE(ar9331_common_wo_xlna_rx_gain_1p1),
1561 - 2);
1562 + ar9331_common_wo_xlna_rx_gain_1p1);
1563 else if (AR_SREV_9340(ah))
1564 INIT_INI_ARRAY(&ah->iniModesRxGain,
1565 - ar9340Common_wo_xlna_rx_gain_table_1p0,
1566 - ARRAY_SIZE(ar9340Common_wo_xlna_rx_gain_table_1p0),
1567 - 2);
1568 + ar9340Common_wo_xlna_rx_gain_table_1p0);
1569 else if (AR_SREV_9485_11(ah))
1570 INIT_INI_ARRAY(&ah->iniModesRxGain,
1571 - ar9485Common_wo_xlna_rx_gain_1_1,
1572 - ARRAY_SIZE(ar9485Common_wo_xlna_rx_gain_1_1),
1573 - 2);
1574 + ar9485Common_wo_xlna_rx_gain_1_1);
1575 else if (AR_SREV_9462_20(ah))
1576 INIT_INI_ARRAY(&ah->iniModesRxGain,
1577 - ar9462_common_wo_xlna_rx_gain_table_2p0,
1578 - ARRAY_SIZE(ar9462_common_wo_xlna_rx_gain_table_2p0),
1579 - 2);
1580 + ar9462_common_wo_xlna_rx_gain_table_2p0);
1581 else if (AR_SREV_9550(ah)) {
1582 INIT_INI_ARRAY(&ah->iniModesRxGain,
1583 - ar955x_1p0_common_wo_xlna_rx_gain_table,
1584 - ARRAY_SIZE(ar955x_1p0_common_wo_xlna_rx_gain_table),
1585 - 2);
1586 + ar955x_1p0_common_wo_xlna_rx_gain_table);
1587 INIT_INI_ARRAY(&ah->ini_modes_rx_gain_bounds,
1588 - ar955x_1p0_common_wo_xlna_rx_gain_bounds,
1589 - ARRAY_SIZE(ar955x_1p0_common_wo_xlna_rx_gain_bounds),
1590 - 5);
1591 + ar955x_1p0_common_wo_xlna_rx_gain_bounds);
1592 } else if (AR_SREV_9580(ah))
1593 INIT_INI_ARRAY(&ah->iniModesRxGain,
1594 - ar9580_1p0_wo_xlna_rx_gain_table,
1595 - ARRAY_SIZE(ar9580_1p0_wo_xlna_rx_gain_table),
1596 - 2);
1597 + ar9580_1p0_wo_xlna_rx_gain_table);
1598 else
1599 INIT_INI_ARRAY(&ah->iniModesRxGain,
1600 - ar9300Common_wo_xlna_rx_gain_table_2p2,
1601 - ARRAY_SIZE(ar9300Common_wo_xlna_rx_gain_table_2p2),
1602 - 2);
1603 + ar9300Common_wo_xlna_rx_gain_table_2p2);
1604 }
1605
1606 static void ar9003_rx_gain_table_mode2(struct ath_hw *ah)
1607 {
1608 if (AR_SREV_9462_20(ah))
1609 INIT_INI_ARRAY(&ah->iniModesRxGain,
1610 - ar9462_common_mixed_rx_gain_table_2p0,
1611 - ARRAY_SIZE(ar9462_common_mixed_rx_gain_table_2p0), 2);
1612 + ar9462_common_mixed_rx_gain_table_2p0);
1613 }
1614
1615 static void ar9003_rx_gain_table_apply(struct ath_hw *ah)
1616 --- a/drivers/net/wireless/ath/ath9k/ar9003_phy.c
1617 +++ b/drivers/net/wireless/ath/ath9k/ar9003_phy.c
1618 @@ -117,8 +117,8 @@ static int ar9003_hw_set_channel(struct
1619 ah->is_clk_25mhz) {
1620 u32 chan_frac;
1621
1622 - channelSel = (freq * 2) / 75;
1623 - chan_frac = (((freq * 2) % 75) * 0x20000) / 75;
1624 + channelSel = freq / 75;
1625 + chan_frac = ((freq % 75) * 0x20000) / 75;
1626 channelSel = (channelSel << 17) | chan_frac;
1627 } else {
1628 channelSel = CHANSEL_5G(freq);
1629 --- a/drivers/net/wireless/ath/ath9k/ar9003_phy.h
1630 +++ b/drivers/net/wireless/ath/ath9k/ar9003_phy.h
1631 @@ -633,6 +633,8 @@
1632 #define AR_PHY_65NM_CH0_BIAS2 0x160c4
1633 #define AR_PHY_65NM_CH0_BIAS4 0x160cc
1634 #define AR_PHY_65NM_CH0_RXTX4 0x1610c
1635 +#define AR_PHY_65NM_CH1_RXTX4 0x1650c
1636 +#define AR_PHY_65NM_CH2_RXTX4 0x1690c
1637
1638 #define AR_CH0_TOP (AR_SREV_9300(ah) ? 0x16288 : \
1639 ((AR_SREV_9462(ah) ? 0x1628c : 0x16280)))
1640 @@ -876,6 +878,9 @@
1641 #define AR_PHY_65NM_CH0_RXTX4_THERM_ON 0x10000000
1642 #define AR_PHY_65NM_CH0_RXTX4_THERM_ON_S 28
1643
1644 +#define AR_PHY_65NM_RXTX4_XLNA_BIAS 0xC0000000
1645 +#define AR_PHY_65NM_RXTX4_XLNA_BIAS_S 30
1646 +
1647 /*
1648 * Channel 1 Register Map
1649 */
1650 --- a/drivers/net/wireless/ath/ath9k/ath9k.h
1651 +++ b/drivers/net/wireless/ath/ath9k/ath9k.h
1652 @@ -297,6 +297,8 @@ struct ath_tx {
1653 struct ath_txq txq[ATH9K_NUM_TX_QUEUES];
1654 struct ath_descdma txdma;
1655 struct ath_txq *txq_map[WME_NUM_AC];
1656 + u32 txq_max_pending[WME_NUM_AC];
1657 + u16 max_aggr_framelen[WME_NUM_AC][4][32];
1658 };
1659
1660 struct ath_rx_edma {
1661 @@ -341,6 +343,7 @@ int ath_tx_init(struct ath_softc *sc, in
1662 void ath_tx_cleanup(struct ath_softc *sc);
1663 int ath_txq_update(struct ath_softc *sc, int qnum,
1664 struct ath9k_tx_queue_info *q);
1665 +void ath_update_max_aggr_framelen(struct ath_softc *sc, int queue, int txop);
1666 int ath_tx_start(struct ieee80211_hw *hw, struct sk_buff *skb,
1667 struct ath_tx_control *txctl);
1668 void ath_tx_tasklet(struct ath_softc *sc);
1669 @@ -360,7 +363,7 @@ void ath_tx_aggr_sleep(struct ieee80211_
1670
1671 struct ath_vif {
1672 int av_bslot;
1673 - bool is_bslot_active, primary_sta_vif;
1674 + bool primary_sta_vif;
1675 __le64 tsf_adjust; /* TSF adjustment for staggered beacons */
1676 struct ath_buf *av_bcbuf;
1677 };
1678 @@ -386,6 +389,7 @@ struct ath_beacon_config {
1679 u16 dtim_period;
1680 u16 bmiss_timeout;
1681 u8 dtim_count;
1682 + bool enable_beacon;
1683 };
1684
1685 struct ath_beacon {
1686 @@ -397,7 +401,6 @@ struct ath_beacon {
1687
1688 u32 beaconq;
1689 u32 bmisscnt;
1690 - u32 ast_be_xmit;
1691 u32 bc_tstamp;
1692 struct ieee80211_vif *bslot[ATH_BCBUF];
1693 int slottime;
1694 @@ -411,12 +414,14 @@ struct ath_beacon {
1695 bool tx_last;
1696 };
1697
1698 -void ath_beacon_tasklet(unsigned long data);
1699 -void ath_beacon_config(struct ath_softc *sc, struct ieee80211_vif *vif);
1700 -int ath_beacon_alloc(struct ath_softc *sc, struct ieee80211_vif *vif);
1701 -void ath_beacon_return(struct ath_softc *sc, struct ath_vif *avp);
1702 -int ath_beaconq_config(struct ath_softc *sc);
1703 -void ath_set_beacon(struct ath_softc *sc);
1704 +void ath9k_beacon_tasklet(unsigned long data);
1705 +bool ath9k_allow_beacon_config(struct ath_softc *sc, struct ieee80211_vif *vif);
1706 +void ath9k_beacon_config(struct ath_softc *sc, struct ieee80211_vif *vif,
1707 + u32 changed);
1708 +void ath9k_beacon_assign_slot(struct ath_softc *sc, struct ieee80211_vif *vif);
1709 +void ath9k_beacon_remove_slot(struct ath_softc *sc, struct ieee80211_vif *vif);
1710 +void ath9k_set_tsfadjust(struct ath_softc *sc, struct ieee80211_vif *vif);
1711 +void ath9k_set_beacon(struct ath_softc *sc);
1712 void ath9k_set_beaconing_status(struct ath_softc *sc, bool status);
1713
1714 /*******************/
1715 @@ -442,9 +447,12 @@ void ath_rx_poll(unsigned long data);
1716 void ath_start_rx_poll(struct ath_softc *sc, u8 nbeacon);
1717 void ath_paprd_calibrate(struct work_struct *work);
1718 void ath_ani_calibrate(unsigned long data);
1719 -void ath_start_ani(struct ath_common *common);
1720 +void ath_start_ani(struct ath_softc *sc);
1721 +void ath_stop_ani(struct ath_softc *sc);
1722 +void ath_check_ani(struct ath_softc *sc);
1723 int ath_update_survey_stats(struct ath_softc *sc);
1724 void ath_update_survey_nf(struct ath_softc *sc, int channel);
1725 +void ath9k_queue_reset(struct ath_softc *sc, enum ath_reset_type type);
1726
1727 /**********/
1728 /* BTCOEX */
1729 @@ -619,7 +627,6 @@ enum sc_op_flags {
1730 SC_OP_INVALID,
1731 SC_OP_BEACONS,
1732 SC_OP_RXFLUSH,
1733 - SC_OP_TSF_RESET,
1734 SC_OP_ANI_RUN,
1735 SC_OP_PRIM_STA_VIF,
1736 SC_OP_HW_RESET,
1737 --- a/drivers/net/wireless/ath/ath9k/beacon.c
1738 +++ b/drivers/net/wireless/ath/ath9k/beacon.c
1739 @@ -30,7 +30,7 @@ static void ath9k_reset_beacon_status(st
1740 * the operating mode of the station (AP or AdHoc). Parameters are AIFS
1741 * settings and channel width min/max
1742 */
1743 -int ath_beaconq_config(struct ath_softc *sc)
1744 +static void ath9k_beaconq_config(struct ath_softc *sc)
1745 {
1746 struct ath_hw *ah = sc->sc_ah;
1747 struct ath_common *common = ath9k_hw_common(ah);
1748 @@ -38,6 +38,7 @@ int ath_beaconq_config(struct ath_softc
1749 struct ath_txq *txq;
1750
1751 ath9k_hw_get_txq_props(ah, sc->beacon.beaconq, &qi);
1752 +
1753 if (sc->sc_ah->opmode == NL80211_IFTYPE_AP) {
1754 /* Always burst out beacon and CAB traffic. */
1755 qi.tqi_aifs = 1;
1756 @@ -56,12 +57,9 @@ int ath_beaconq_config(struct ath_softc
1757 }
1758
1759 if (!ath9k_hw_set_txq_props(ah, sc->beacon.beaconq, &qi)) {
1760 - ath_err(common,
1761 - "Unable to update h/w beacon queue parameters\n");
1762 - return 0;
1763 + ath_err(common, "Unable to update h/w beacon queue parameters\n");
1764 } else {
1765 ath9k_hw_resettxqueue(ah, sc->beacon.beaconq);
1766 - return 1;
1767 }
1768 }
1769
1770 @@ -70,7 +68,7 @@ int ath_beaconq_config(struct ath_softc
1771 * up rate codes, and channel flags. Beacons are always sent out at the
1772 * lowest rate, and are not retried.
1773 */
1774 -static void ath_beacon_setup(struct ath_softc *sc, struct ieee80211_vif *vif,
1775 +static void ath9k_beacon_setup(struct ath_softc *sc, struct ieee80211_vif *vif,
1776 struct ath_buf *bf, int rateidx)
1777 {
1778 struct sk_buff *skb = bf->bf_mpdu;
1779 @@ -81,8 +79,6 @@ static void ath_beacon_setup(struct ath_
1780 u8 chainmask = ah->txchainmask;
1781 u8 rate = 0;
1782
1783 - ath9k_reset_beacon_status(sc);
1784 -
1785 sband = &sc->sbands[common->hw->conf.channel->band];
1786 rate = sband->bitrates[rateidx].hw_value;
1787 if (vif->bss_conf.use_short_preamble)
1788 @@ -111,7 +107,7 @@ static void ath_beacon_setup(struct ath_
1789 ath9k_hw_set_txdesc(ah, bf->bf_desc, &info);
1790 }
1791
1792 -static void ath_tx_cabq(struct ieee80211_hw *hw, struct sk_buff *skb)
1793 +static void ath9k_tx_cabq(struct ieee80211_hw *hw, struct sk_buff *skb)
1794 {
1795 struct ath_softc *sc = hw->priv;
1796 struct ath_common *common = ath9k_hw_common(sc->sc_ah);
1797 @@ -128,28 +124,22 @@ static void ath_tx_cabq(struct ieee80211
1798 }
1799 }
1800
1801 -static struct ath_buf *ath_beacon_generate(struct ieee80211_hw *hw,
1802 - struct ieee80211_vif *vif)
1803 +static struct ath_buf *ath9k_beacon_generate(struct ieee80211_hw *hw,
1804 + struct ieee80211_vif *vif)
1805 {
1806 struct ath_softc *sc = hw->priv;
1807 struct ath_common *common = ath9k_hw_common(sc->sc_ah);
1808 struct ath_buf *bf;
1809 - struct ath_vif *avp;
1810 + struct ath_vif *avp = (void *)vif->drv_priv;
1811 struct sk_buff *skb;
1812 - struct ath_txq *cabq;
1813 + struct ath_txq *cabq = sc->beacon.cabq;
1814 struct ieee80211_tx_info *info;
1815 + struct ieee80211_mgmt *mgmt_hdr;
1816 int cabq_depth;
1817
1818 - ath9k_reset_beacon_status(sc);
1819 -
1820 - avp = (void *)vif->drv_priv;
1821 - cabq = sc->beacon.cabq;
1822 -
1823 - if ((avp->av_bcbuf == NULL) || !avp->is_bslot_active)
1824 + if (avp->av_bcbuf == NULL)
1825 return NULL;
1826
1827 - /* Release the old beacon first */
1828 -
1829 bf = avp->av_bcbuf;
1830 skb = bf->bf_mpdu;
1831 if (skb) {
1832 @@ -159,14 +149,14 @@ static struct ath_buf *ath_beacon_genera
1833 bf->bf_buf_addr = 0;
1834 }
1835
1836 - /* Get a new beacon from mac80211 */
1837 -
1838 skb = ieee80211_beacon_get(hw, vif);
1839 - bf->bf_mpdu = skb;
1840 if (skb == NULL)
1841 return NULL;
1842 - ((struct ieee80211_mgmt *)skb->data)->u.beacon.timestamp =
1843 - avp->tsf_adjust;
1844 +
1845 + bf->bf_mpdu = skb;
1846 +
1847 + mgmt_hdr = (struct ieee80211_mgmt *)skb->data;
1848 + mgmt_hdr->u.beacon.timestamp = avp->tsf_adjust;
1849
1850 info = IEEE80211_SKB_CB(skb);
1851 if (info->flags & IEEE80211_TX_CTL_ASSIGN_SEQ) {
1852 @@ -212,61 +202,52 @@ static struct ath_buf *ath_beacon_genera
1853 }
1854 }
1855
1856 - ath_beacon_setup(sc, vif, bf, info->control.rates[0].idx);
1857 + ath9k_beacon_setup(sc, vif, bf, info->control.rates[0].idx);
1858
1859 while (skb) {
1860 - ath_tx_cabq(hw, skb);
1861 + ath9k_tx_cabq(hw, skb);
1862 skb = ieee80211_get_buffered_bc(hw, vif);
1863 }
1864
1865 return bf;
1866 }
1867
1868 -int ath_beacon_alloc(struct ath_softc *sc, struct ieee80211_vif *vif)
1869 +void ath9k_beacon_assign_slot(struct ath_softc *sc, struct ieee80211_vif *vif)
1870 {
1871 struct ath_common *common = ath9k_hw_common(sc->sc_ah);
1872 - struct ath_vif *avp;
1873 - struct ath_buf *bf;
1874 - struct sk_buff *skb;
1875 - struct ath_beacon_config *cur_conf = &sc->cur_beacon_conf;
1876 - __le64 tstamp;
1877 + struct ath_vif *avp = (void *)vif->drv_priv;
1878 + int slot;
1879
1880 - avp = (void *)vif->drv_priv;
1881 + avp->av_bcbuf = list_first_entry(&sc->beacon.bbuf, struct ath_buf, list);
1882 + list_del(&avp->av_bcbuf->list);
1883
1884 - /* Allocate a beacon descriptor if we haven't done so. */
1885 - if (!avp->av_bcbuf) {
1886 - /* Allocate beacon state for hostap/ibss. We know
1887 - * a buffer is available. */
1888 - avp->av_bcbuf = list_first_entry(&sc->beacon.bbuf,
1889 - struct ath_buf, list);
1890 - list_del(&avp->av_bcbuf->list);
1891 -
1892 - if (ath9k_uses_beacons(vif->type)) {
1893 - int slot;
1894 - /*
1895 - * Assign the vif to a beacon xmit slot. As
1896 - * above, this cannot fail to find one.
1897 - */
1898 - avp->av_bslot = 0;
1899 - for (slot = 0; slot < ATH_BCBUF; slot++)
1900 - if (sc->beacon.bslot[slot] == NULL) {
1901 - avp->av_bslot = slot;
1902 - avp->is_bslot_active = false;
1903 -
1904 - /* NB: keep looking for a double slot */
1905 - if (slot == 0 || !sc->beacon.bslot[slot-1])
1906 - break;
1907 - }
1908 - BUG_ON(sc->beacon.bslot[avp->av_bslot] != NULL);
1909 - sc->beacon.bslot[avp->av_bslot] = vif;
1910 - sc->nbcnvifs++;
1911 + for (slot = 0; slot < ATH_BCBUF; slot++) {
1912 + if (sc->beacon.bslot[slot] == NULL) {
1913 + avp->av_bslot = slot;
1914 + break;
1915 }
1916 }
1917
1918 - /* release the previous beacon frame, if it already exists. */
1919 - bf = avp->av_bcbuf;
1920 - if (bf->bf_mpdu != NULL) {
1921 - skb = bf->bf_mpdu;
1922 + sc->beacon.bslot[avp->av_bslot] = vif;
1923 + sc->nbcnvifs++;
1924 +
1925 + ath_dbg(common, CONFIG, "Added interface at beacon slot: %d\n",
1926 + avp->av_bslot);
1927 +}
1928 +
1929 +void ath9k_beacon_remove_slot(struct ath_softc *sc, struct ieee80211_vif *vif)
1930 +{
1931 + struct ath_common *common = ath9k_hw_common(sc->sc_ah);
1932 + struct ath_vif *avp = (void *)vif->drv_priv;
1933 + struct ath_buf *bf = avp->av_bcbuf;
1934 +
1935 + ath_dbg(common, CONFIG, "Removing interface at beacon slot: %d\n",
1936 + avp->av_bslot);
1937 +
1938 + tasklet_disable(&sc->bcon_tasklet);
1939 +
1940 + if (bf && bf->bf_mpdu) {
1941 + struct sk_buff *skb = bf->bf_mpdu;
1942 dma_unmap_single(sc->dev, bf->bf_buf_addr,
1943 skb->len, DMA_TO_DEVICE);
1944 dev_kfree_skb_any(skb);
1945 @@ -274,99 +255,74 @@ int ath_beacon_alloc(struct ath_softc *s
1946 bf->bf_buf_addr = 0;
1947 }
1948
1949 - /* NB: the beacon data buffer must be 32-bit aligned. */
1950 - skb = ieee80211_beacon_get(sc->hw, vif);
1951 - if (skb == NULL)
1952 - return -ENOMEM;
1953 -
1954 - tstamp = ((struct ieee80211_mgmt *)skb->data)->u.beacon.timestamp;
1955 - sc->beacon.bc_tstamp = (u32) le64_to_cpu(tstamp);
1956 - /* Calculate a TSF adjustment factor required for staggered beacons. */
1957 - if (avp->av_bslot > 0) {
1958 - u64 tsfadjust;
1959 - int intval;
1960 + avp->av_bcbuf = NULL;
1961 + sc->beacon.bslot[avp->av_bslot] = NULL;
1962 + sc->nbcnvifs--;
1963 + list_add_tail(&bf->list, &sc->beacon.bbuf);
1964
1965 - intval = cur_conf->beacon_interval ? : ATH_DEFAULT_BINTVAL;
1966 + tasklet_enable(&sc->bcon_tasklet);
1967 +}
1968
1969 - /*
1970 - * Calculate the TSF offset for this beacon slot, i.e., the
1971 - * number of usecs that need to be added to the timestamp field
1972 - * in Beacon and Probe Response frames. Beacon slot 0 is
1973 - * processed at the correct offset, so it does not require TSF
1974 - * adjustment. Other slots are adjusted to get the timestamp
1975 - * close to the TBTT for the BSS.
1976 - */
1977 - tsfadjust = TU_TO_USEC(intval * avp->av_bslot) / ATH_BCBUF;
1978 - avp->tsf_adjust = cpu_to_le64(tsfadjust);
1979 +static int ath9k_beacon_choose_slot(struct ath_softc *sc)
1980 +{
1981 + struct ath_common *common = ath9k_hw_common(sc->sc_ah);
1982 + struct ath_beacon_config *cur_conf = &sc->cur_beacon_conf;
1983 + u16 intval;
1984 + u32 tsftu;
1985 + u64 tsf;
1986 + int slot;
1987
1988 - ath_dbg(common, BEACON,
1989 - "stagger beacons, bslot %d intval %u tsfadjust %llu\n",
1990 - avp->av_bslot, intval, (unsigned long long)tsfadjust);
1991 + if (sc->sc_ah->opmode != NL80211_IFTYPE_AP) {
1992 + ath_dbg(common, BEACON, "slot 0, tsf: %llu\n",
1993 + ath9k_hw_gettsf64(sc->sc_ah));
1994 + return 0;
1995 + }
1996
1997 - ((struct ieee80211_mgmt *)skb->data)->u.beacon.timestamp =
1998 - avp->tsf_adjust;
1999 - } else
2000 - avp->tsf_adjust = cpu_to_le64(0);
2001 + intval = cur_conf->beacon_interval ? : ATH_DEFAULT_BINTVAL;
2002 + tsf = ath9k_hw_gettsf64(sc->sc_ah);
2003 + tsf += TU_TO_USEC(sc->sc_ah->config.sw_beacon_response_time);
2004 + tsftu = TSF_TO_TU((tsf * ATH_BCBUF) >>32, tsf * ATH_BCBUF);
2005 + slot = (tsftu % (intval * ATH_BCBUF)) / intval;
2006
2007 - bf->bf_mpdu = skb;
2008 - bf->bf_buf_addr = dma_map_single(sc->dev, skb->data,
2009 - skb->len, DMA_TO_DEVICE);
2010 - if (unlikely(dma_mapping_error(sc->dev, bf->bf_buf_addr))) {
2011 - dev_kfree_skb_any(skb);
2012 - bf->bf_mpdu = NULL;
2013 - bf->bf_buf_addr = 0;
2014 - ath_err(common, "dma_mapping_error on beacon alloc\n");
2015 - return -ENOMEM;
2016 - }
2017 - avp->is_bslot_active = true;
2018 + ath_dbg(common, BEACON, "slot: %d tsf: %llu tsftu: %u\n",
2019 + slot, tsf, tsftu / ATH_BCBUF);
2020
2021 - return 0;
2022 + return slot;
2023 }
2024
2025 -void ath_beacon_return(struct ath_softc *sc, struct ath_vif *avp)
2026 +void ath9k_set_tsfadjust(struct ath_softc *sc, struct ieee80211_vif *vif)
2027 {
2028 - if (avp->av_bcbuf != NULL) {
2029 - struct ath_buf *bf;
2030 + struct ath_common *common = ath9k_hw_common(sc->sc_ah);
2031 + struct ath_beacon_config *cur_conf = &sc->cur_beacon_conf;
2032 + struct ath_vif *avp = (void *)vif->drv_priv;
2033 + u64 tsfadjust;
2034
2035 - avp->is_bslot_active = false;
2036 - if (avp->av_bslot != -1) {
2037 - sc->beacon.bslot[avp->av_bslot] = NULL;
2038 - sc->nbcnvifs--;
2039 - avp->av_bslot = -1;
2040 - }
2041 + if (avp->av_bslot == 0)
2042 + return;
2043
2044 - bf = avp->av_bcbuf;
2045 - if (bf->bf_mpdu != NULL) {
2046 - struct sk_buff *skb = bf->bf_mpdu;
2047 - dma_unmap_single(sc->dev, bf->bf_buf_addr,
2048 - skb->len, DMA_TO_DEVICE);
2049 - dev_kfree_skb_any(skb);
2050 - bf->bf_mpdu = NULL;
2051 - bf->bf_buf_addr = 0;
2052 - }
2053 - list_add_tail(&bf->list, &sc->beacon.bbuf);
2054 + tsfadjust = cur_conf->beacon_interval * avp->av_bslot / ATH_BCBUF;
2055 + avp->tsf_adjust = cpu_to_le64(TU_TO_USEC(tsfadjust));
2056
2057 - avp->av_bcbuf = NULL;
2058 - }
2059 + ath_dbg(common, CONFIG, "tsfadjust is: %llu for bslot: %d\n",
2060 + (unsigned long long)tsfadjust, avp->av_bslot);
2061 }
2062
2063 -void ath_beacon_tasklet(unsigned long data)
2064 +void ath9k_beacon_tasklet(unsigned long data)
2065 {
2066 struct ath_softc *sc = (struct ath_softc *)data;
2067 - struct ath_beacon_config *cur_conf = &sc->cur_beacon_conf;
2068 struct ath_hw *ah = sc->sc_ah;
2069 struct ath_common *common = ath9k_hw_common(ah);
2070 struct ath_buf *bf = NULL;
2071 struct ieee80211_vif *vif;
2072 bool edma = !!(ah->caps.hw_caps & ATH9K_HW_CAP_EDMA);
2073 int slot;
2074 - u32 bfaddr, bc = 0;
2075
2076 - if (work_pending(&sc->hw_reset_work)) {
2077 + if (test_bit(SC_OP_HW_RESET, &sc->sc_flags)) {
2078 ath_dbg(common, RESET,
2079 "reset work is pending, skip beaconing now\n");
2080 return;
2081 }
2082 +
2083 /*
2084 * Check if the previous beacon has gone out. If
2085 * not don't try to post another, skip this period
2086 @@ -390,55 +346,25 @@ void ath_beacon_tasklet(unsigned long da
2087 } else if (sc->beacon.bmisscnt >= BSTUCK_THRESH) {
2088 ath_dbg(common, BSTUCK, "beacon is officially stuck\n");
2089 sc->beacon.bmisscnt = 0;
2090 - set_bit(SC_OP_TSF_RESET, &sc->sc_flags);
2091 - ieee80211_queue_work(sc->hw, &sc->hw_reset_work);
2092 + ath9k_queue_reset(sc, RESET_TYPE_BEACON_STUCK);
2093 }
2094
2095 return;
2096 }
2097
2098 - /*
2099 - * Generate beacon frames. we are sending frames
2100 - * staggered so calculate the slot for this frame based
2101 - * on the tsf to safeguard against missing an swba.
2102 - */
2103 -
2104 -
2105 - if (ah->opmode == NL80211_IFTYPE_AP) {
2106 - u16 intval;
2107 - u32 tsftu;
2108 - u64 tsf;
2109 -
2110 - intval = cur_conf->beacon_interval ? : ATH_DEFAULT_BINTVAL;
2111 - tsf = ath9k_hw_gettsf64(ah);
2112 - tsf += TU_TO_USEC(ah->config.sw_beacon_response_time);
2113 - tsftu = TSF_TO_TU((tsf * ATH_BCBUF) >>32, tsf * ATH_BCBUF);
2114 - slot = (tsftu % (intval * ATH_BCBUF)) / intval;
2115 - vif = sc->beacon.bslot[slot];
2116 -
2117 - ath_dbg(common, BEACON,
2118 - "slot %d [tsf %llu tsftu %u intval %u] vif %p\n",
2119 - slot, tsf, tsftu / ATH_BCBUF, intval, vif);
2120 - } else {
2121 - slot = 0;
2122 - vif = sc->beacon.bslot[slot];
2123 - }
2124 + slot = ath9k_beacon_choose_slot(sc);
2125 + vif = sc->beacon.bslot[slot];
2126
2127 + if (!vif || !vif->bss_conf.enable_beacon)
2128 + return;
2129
2130 - bfaddr = 0;
2131 - if (vif) {
2132 - bf = ath_beacon_generate(sc->hw, vif);
2133 - if (bf != NULL) {
2134 - bfaddr = bf->bf_daddr;
2135 - bc = 1;
2136 - }
2137 + bf = ath9k_beacon_generate(sc->hw, vif);
2138 + WARN_ON(!bf);
2139
2140 - if (sc->beacon.bmisscnt != 0) {
2141 - ath_dbg(common, BSTUCK,
2142 - "resume beacon xmit after %u misses\n",
2143 - sc->beacon.bmisscnt);
2144 - sc->beacon.bmisscnt = 0;
2145 - }
2146 + if (sc->beacon.bmisscnt != 0) {
2147 + ath_dbg(common, BSTUCK, "resume beacon xmit after %u misses\n",
2148 + sc->beacon.bmisscnt);
2149 + sc->beacon.bmisscnt = 0;
2150 }
2151
2152 /*
2153 @@ -458,39 +384,37 @@ void ath_beacon_tasklet(unsigned long da
2154 * set to ATH_BCBUF so this check is a noop.
2155 */
2156 if (sc->beacon.updateslot == UPDATE) {
2157 - sc->beacon.updateslot = COMMIT; /* commit next beacon */
2158 + sc->beacon.updateslot = COMMIT;
2159 sc->beacon.slotupdate = slot;
2160 - } else if (sc->beacon.updateslot == COMMIT && sc->beacon.slotupdate == slot) {
2161 + } else if (sc->beacon.updateslot == COMMIT &&
2162 + sc->beacon.slotupdate == slot) {
2163 ah->slottime = sc->beacon.slottime;
2164 ath9k_hw_init_global_settings(ah);
2165 sc->beacon.updateslot = OK;
2166 }
2167 - if (bfaddr != 0) {
2168 +
2169 + if (bf) {
2170 + ath9k_reset_beacon_status(sc);
2171 +
2172 /* NB: cabq traffic should already be queued and primed */
2173 - ath9k_hw_puttxbuf(ah, sc->beacon.beaconq, bfaddr);
2174 + ath9k_hw_puttxbuf(ah, sc->beacon.beaconq, bf->bf_daddr);
2175
2176 if (!edma)
2177 ath9k_hw_txstart(ah, sc->beacon.beaconq);
2178 -
2179 - sc->beacon.ast_be_xmit += bc; /* XXX per-vif? */
2180 }
2181 }
2182
2183 -static void ath9k_beacon_init(struct ath_softc *sc,
2184 - u32 next_beacon,
2185 - u32 beacon_period)
2186 +static void ath9k_beacon_init(struct ath_softc *sc, u32 nexttbtt, u32 intval)
2187 {
2188 - if (test_bit(SC_OP_TSF_RESET, &sc->sc_flags)) {
2189 - ath9k_ps_wakeup(sc);
2190 - ath9k_hw_reset_tsf(sc->sc_ah);
2191 - }
2192 -
2193 - ath9k_hw_beaconinit(sc->sc_ah, next_beacon, beacon_period);
2194 + struct ath_hw *ah = sc->sc_ah;
2195
2196 - if (test_bit(SC_OP_TSF_RESET, &sc->sc_flags)) {
2197 - ath9k_ps_restore(sc);
2198 - clear_bit(SC_OP_TSF_RESET, &sc->sc_flags);
2199 - }
2200 + ath9k_hw_disable_interrupts(ah);
2201 + ath9k_hw_reset_tsf(ah);
2202 + ath9k_beaconq_config(sc);
2203 + ath9k_hw_beaconinit(ah, nexttbtt, intval);
2204 + sc->beacon.bmisscnt = 0;
2205 + ath9k_hw_set_interrupts(ah);
2206 + ath9k_hw_enable_interrupts(ah);
2207 }
2208
2209 /*
2210 @@ -498,32 +422,27 @@ static void ath9k_beacon_init(struct ath
2211 * burst together. For the former arrange for the SWBA to be delivered for each
2212 * slot. Slots that are not occupied will generate nothing.
2213 */
2214 -static void ath_beacon_config_ap(struct ath_softc *sc,
2215 - struct ath_beacon_config *conf)
2216 +static void ath9k_beacon_config_ap(struct ath_softc *sc,
2217 + struct ath_beacon_config *conf)
2218 {
2219 struct ath_hw *ah = sc->sc_ah;
2220 + struct ath_common *common = ath9k_hw_common(ah);
2221 u32 nexttbtt, intval;
2222
2223 /* NB: the beacon interval is kept internally in TU's */
2224 intval = TU_TO_USEC(conf->beacon_interval);
2225 - intval /= ATH_BCBUF; /* for staggered beacons */
2226 + intval /= ATH_BCBUF;
2227 nexttbtt = intval;
2228
2229 - /*
2230 - * In AP mode we enable the beacon timers and SWBA interrupts to
2231 - * prepare beacon frames.
2232 - */
2233 - ah->imask |= ATH9K_INT_SWBA;
2234 - ath_beaconq_config(sc);
2235 + if (conf->enable_beacon)
2236 + ah->imask |= ATH9K_INT_SWBA;
2237 + else
2238 + ah->imask &= ~ATH9K_INT_SWBA;
2239
2240 - /* Set the computed AP beacon timers */
2241 + ath_dbg(common, BEACON, "AP nexttbtt: %u intval: %u conf_intval: %u\n",
2242 + nexttbtt, intval, conf->beacon_interval);
2243
2244 - ath9k_hw_disable_interrupts(ah);
2245 - set_bit(SC_OP_TSF_RESET, &sc->sc_flags);
2246 ath9k_beacon_init(sc, nexttbtt, intval);
2247 - sc->beacon.bmisscnt = 0;
2248 - ath9k_hw_set_interrupts(ah);
2249 - ath9k_hw_enable_interrupts(ah);
2250 }
2251
2252 /*
2253 @@ -534,8 +453,8 @@ static void ath_beacon_config_ap(struct
2254 * we'll receive a BMISS interrupt when we stop seeing beacons from the AP
2255 * we've associated with.
2256 */
2257 -static void ath_beacon_config_sta(struct ath_softc *sc,
2258 - struct ath_beacon_config *conf)
2259 +static void ath9k_beacon_config_sta(struct ath_softc *sc,
2260 + struct ath_beacon_config *conf)
2261 {
2262 struct ath_hw *ah = sc->sc_ah;
2263 struct ath_common *common = ath9k_hw_common(ah);
2264 @@ -654,8 +573,8 @@ static void ath_beacon_config_sta(struct
2265 ath9k_hw_enable_interrupts(ah);
2266 }
2267
2268 -static void ath_beacon_config_adhoc(struct ath_softc *sc,
2269 - struct ath_beacon_config *conf)
2270 +static void ath9k_beacon_config_adhoc(struct ath_softc *sc,
2271 + struct ath_beacon_config *conf)
2272 {
2273 struct ath_hw *ah = sc->sc_ah;
2274 struct ath_common *common = ath9k_hw_common(ah);
2275 @@ -669,82 +588,53 @@ static void ath_beacon_config_adhoc(stru
2276 tsf = roundup(ath9k_hw_gettsf32(ah) + TU_TO_USEC(FUDGE), intval);
2277 nexttbtt = tsf + intval;
2278
2279 - ath_dbg(common, BEACON, "IBSS nexttbtt %u intval %u (%u)\n",
2280 - nexttbtt, intval, conf->beacon_interval);
2281 -
2282 - /*
2283 - * In IBSS mode enable the beacon timers but only enable SWBA interrupts
2284 - * if we need to manually prepare beacon frames. Otherwise we use a
2285 - * self-linked tx descriptor and let the hardware deal with things.
2286 - */
2287 - ah->imask |= ATH9K_INT_SWBA;
2288 -
2289 - ath_beaconq_config(sc);
2290 + if (conf->enable_beacon)
2291 + ah->imask |= ATH9K_INT_SWBA;
2292 + else
2293 + ah->imask &= ~ATH9K_INT_SWBA;
2294
2295 - /* Set the computed ADHOC beacon timers */
2296 + ath_dbg(common, BEACON, "IBSS nexttbtt: %u intval: %u conf_intval: %u\n",
2297 + nexttbtt, intval, conf->beacon_interval);
2298
2299 - ath9k_hw_disable_interrupts(ah);
2300 ath9k_beacon_init(sc, nexttbtt, intval);
2301 - sc->beacon.bmisscnt = 0;
2302 -
2303 - ath9k_hw_set_interrupts(ah);
2304 - ath9k_hw_enable_interrupts(ah);
2305 }
2306
2307 -static bool ath9k_allow_beacon_config(struct ath_softc *sc,
2308 - struct ieee80211_vif *vif)
2309 +bool ath9k_allow_beacon_config(struct ath_softc *sc, struct ieee80211_vif *vif)
2310 {
2311 - struct ath_beacon_config *cur_conf = &sc->cur_beacon_conf;
2312 struct ath_common *common = ath9k_hw_common(sc->sc_ah);
2313 - struct ieee80211_bss_conf *bss_conf = &vif->bss_conf;
2314 struct ath_vif *avp = (void *)vif->drv_priv;
2315
2316 - /*
2317 - * Can not have different beacon interval on multiple
2318 - * AP interface case
2319 - */
2320 - if ((sc->sc_ah->opmode == NL80211_IFTYPE_AP) &&
2321 - (sc->nbcnvifs > 1) &&
2322 - (vif->type == NL80211_IFTYPE_AP) &&
2323 - (cur_conf->beacon_interval != bss_conf->beacon_int)) {
2324 - ath_dbg(common, CONFIG,
2325 - "Changing beacon interval of multiple AP interfaces !\n");
2326 - return false;
2327 - }
2328 - /*
2329 - * Can not configure station vif's beacon config
2330 - * while on AP opmode
2331 - */
2332 - if ((sc->sc_ah->opmode == NL80211_IFTYPE_AP) &&
2333 - (vif->type != NL80211_IFTYPE_AP)) {
2334 - ath_dbg(common, CONFIG,
2335 - "STA vif's beacon not allowed on AP mode\n");
2336 - return false;
2337 + if (sc->sc_ah->opmode == NL80211_IFTYPE_AP) {
2338 + if ((vif->type != NL80211_IFTYPE_AP) ||
2339 + (sc->nbcnvifs > 1)) {
2340 + ath_dbg(common, CONFIG,
2341 + "An AP interface is already present !\n");
2342 + return false;
2343 + }
2344 }
2345 - /*
2346 - * Do not allow beacon config if HW was already configured
2347 - * with another STA vif
2348 - */
2349 - if ((sc->sc_ah->opmode == NL80211_IFTYPE_STATION) &&
2350 - (vif->type == NL80211_IFTYPE_STATION) &&
2351 - test_bit(SC_OP_BEACONS, &sc->sc_flags) &&
2352 - !avp->primary_sta_vif) {
2353 - ath_dbg(common, CONFIG,
2354 - "Beacon already configured for a station interface\n");
2355 - return false;
2356 +
2357 + if (sc->sc_ah->opmode == NL80211_IFTYPE_STATION) {
2358 + if ((vif->type == NL80211_IFTYPE_STATION) &&
2359 + test_bit(SC_OP_BEACONS, &sc->sc_flags) &&
2360 + !avp->primary_sta_vif) {
2361 + ath_dbg(common, CONFIG,
2362 + "Beacon already configured for a station interface\n");
2363 + return false;
2364 + }
2365 }
2366 +
2367 return true;
2368 }
2369
2370 -void ath_beacon_config(struct ath_softc *sc, struct ieee80211_vif *vif)
2371 +static void ath9k_cache_beacon_config(struct ath_softc *sc,
2372 + struct ieee80211_bss_conf *bss_conf)
2373 {
2374 + struct ath_common *common = ath9k_hw_common(sc->sc_ah);
2375 struct ath_beacon_config *cur_conf = &sc->cur_beacon_conf;
2376 - struct ieee80211_bss_conf *bss_conf = &vif->bss_conf;
2377
2378 - if (!ath9k_allow_beacon_config(sc, vif))
2379 - return;
2380 + ath_dbg(common, BEACON,
2381 + "Caching beacon data for BSS: %pM\n", bss_conf->bssid);
2382
2383 - /* Setup the beacon configuration parameters */
2384 cur_conf->beacon_interval = bss_conf->beacon_int;
2385 cur_conf->dtim_period = bss_conf->dtim_period;
2386 cur_conf->listen_interval = 1;
2387 @@ -769,73 +659,59 @@ void ath_beacon_config(struct ath_softc
2388 if (cur_conf->dtim_period == 0)
2389 cur_conf->dtim_period = 1;
2390
2391 - ath_set_beacon(sc);
2392 }
2393
2394 -static bool ath_has_valid_bslot(struct ath_softc *sc)
2395 +void ath9k_beacon_config(struct ath_softc *sc, struct ieee80211_vif *vif,
2396 + u32 changed)
2397 {
2398 - struct ath_vif *avp;
2399 - int slot;
2400 - bool found = false;
2401 + struct ieee80211_bss_conf *bss_conf = &vif->bss_conf;
2402 + struct ath_beacon_config *cur_conf = &sc->cur_beacon_conf;
2403
2404 - for (slot = 0; slot < ATH_BCBUF; slot++) {
2405 - if (sc->beacon.bslot[slot]) {
2406 - avp = (void *)sc->beacon.bslot[slot]->drv_priv;
2407 - if (avp->is_bslot_active) {
2408 - found = true;
2409 - break;
2410 - }
2411 + ath9k_cache_beacon_config(sc, bss_conf);
2412 +
2413 + if (sc->sc_ah->opmode == NL80211_IFTYPE_STATION) {
2414 + ath9k_set_beacon(sc);
2415 + set_bit(SC_OP_BEACONS, &sc->sc_flags);
2416 + } else {
2417 + /*
2418 + * Take care of multiple interfaces when
2419 + * enabling/disabling SWBA.
2420 + */
2421 + if (changed & BSS_CHANGED_BEACON_ENABLED) {
2422 + if (!bss_conf->enable_beacon &&
2423 + (sc->nbcnvifs <= 1))
2424 + cur_conf->enable_beacon = false;
2425 + else if (bss_conf->enable_beacon)
2426 + cur_conf->enable_beacon = true;
2427 }
2428 +
2429 + ath9k_set_beacon(sc);
2430 +
2431 + if (cur_conf->enable_beacon)
2432 + set_bit(SC_OP_BEACONS, &sc->sc_flags);
2433 + else
2434 + clear_bit(SC_OP_BEACONS, &sc->sc_flags);
2435 }
2436 - return found;
2437 }
2438
2439 -
2440 -void ath_set_beacon(struct ath_softc *sc)
2441 +void ath9k_set_beacon(struct ath_softc *sc)
2442 {
2443 struct ath_common *common = ath9k_hw_common(sc->sc_ah);
2444 struct ath_beacon_config *cur_conf = &sc->cur_beacon_conf;
2445
2446 switch (sc->sc_ah->opmode) {
2447 case NL80211_IFTYPE_AP:
2448 - if (ath_has_valid_bslot(sc))
2449 - ath_beacon_config_ap(sc, cur_conf);
2450 + ath9k_beacon_config_ap(sc, cur_conf);
2451 break;
2452 case NL80211_IFTYPE_ADHOC:
2453 case NL80211_IFTYPE_MESH_POINT:
2454 - ath_beacon_config_adhoc(sc, cur_conf);
2455 + ath9k_beacon_config_adhoc(sc, cur_conf);
2456 break;
2457 case NL80211_IFTYPE_STATION:
2458 - ath_beacon_config_sta(sc, cur_conf);
2459 + ath9k_beacon_config_sta(sc, cur_conf);
2460 break;
2461 default:
2462 ath_dbg(common, CONFIG, "Unsupported beaconing mode\n");
2463 return;
2464 }
2465 -
2466 - set_bit(SC_OP_BEACONS, &sc->sc_flags);
2467 -}
2468 -
2469 -void ath9k_set_beaconing_status(struct ath_softc *sc, bool status)
2470 -{
2471 - struct ath_hw *ah = sc->sc_ah;
2472 -
2473 - if (!ath_has_valid_bslot(sc)) {
2474 - clear_bit(SC_OP_BEACONS, &sc->sc_flags);
2475 - return;
2476 - }
2477 -
2478 - ath9k_ps_wakeup(sc);
2479 - if (status) {
2480 - /* Re-enable beaconing */
2481 - ah->imask |= ATH9K_INT_SWBA;
2482 - ath9k_hw_set_interrupts(ah);
2483 - } else {
2484 - /* Disable SWBA interrupt */
2485 - ah->imask &= ~ATH9K_INT_SWBA;
2486 - ath9k_hw_set_interrupts(ah);
2487 - tasklet_kill(&sc->bcon_tasklet);
2488 - ath9k_hw_stop_dma_queue(ah, sc->beacon.beaconq);
2489 - }
2490 - ath9k_ps_restore(sc);
2491 }
2492 --- a/drivers/net/wireless/ath/ath9k/calib.h
2493 +++ b/drivers/net/wireless/ath/ath9k/calib.h
2494 @@ -30,10 +30,10 @@ struct ar5416IniArray {
2495 u32 ia_columns;
2496 };
2497
2498 -#define INIT_INI_ARRAY(iniarray, array, rows, columns) do { \
2499 +#define INIT_INI_ARRAY(iniarray, array) do { \
2500 (iniarray)->ia_array = (u32 *)(array); \
2501 - (iniarray)->ia_rows = (rows); \
2502 - (iniarray)->ia_columns = (columns); \
2503 + (iniarray)->ia_rows = ARRAY_SIZE(array); \
2504 + (iniarray)->ia_columns = ARRAY_SIZE(array[0]); \
2505 } while (0)
2506
2507 #define INI_RA(iniarray, row, column) \
2508 --- a/drivers/net/wireless/ath/ath9k/debug.c
2509 +++ b/drivers/net/wireless/ath/ath9k/debug.c
2510 @@ -206,10 +206,9 @@ static ssize_t write_file_disable_ani(st
2511
2512 if (disable_ani) {
2513 clear_bit(SC_OP_ANI_RUN, &sc->sc_flags);
2514 - del_timer_sync(&common->ani.timer);
2515 + ath_stop_ani(sc);
2516 } else {
2517 - set_bit(SC_OP_ANI_RUN, &sc->sc_flags);
2518 - ath_start_ani(common);
2519 + ath_check_ani(sc);
2520 }
2521
2522 return count;
2523 @@ -1556,6 +1555,14 @@ int ath9k_init_debug(struct ath_hw *ah)
2524 &fops_interrupt);
2525 debugfs_create_file("xmit", S_IRUSR, sc->debug.debugfs_phy, sc,
2526 &fops_xmit);
2527 + debugfs_create_u32("qlen_bk", S_IRUSR | S_IWUSR, sc->debug.debugfs_phy,
2528 + &sc->tx.txq_max_pending[WME_AC_BK]);
2529 + debugfs_create_u32("qlen_be", S_IRUSR | S_IWUSR, sc->debug.debugfs_phy,
2530 + &sc->tx.txq_max_pending[WME_AC_BE]);
2531 + debugfs_create_u32("qlen_vi", S_IRUSR | S_IWUSR, sc->debug.debugfs_phy,
2532 + &sc->tx.txq_max_pending[WME_AC_VI]);
2533 + debugfs_create_u32("qlen_vo", S_IRUSR | S_IWUSR, sc->debug.debugfs_phy,
2534 + &sc->tx.txq_max_pending[WME_AC_VO]);
2535 debugfs_create_file("stations", S_IRUSR, sc->debug.debugfs_phy, sc,
2536 &fops_stations);
2537 debugfs_create_file("misc", S_IRUSR, sc->debug.debugfs_phy, sc,
2538 --- a/drivers/net/wireless/ath/ath9k/debug.h
2539 +++ b/drivers/net/wireless/ath/ath9k/debug.h
2540 @@ -32,6 +32,19 @@ struct ath_buf;
2541 #define RESET_STAT_INC(sc, type) do { } while (0)
2542 #endif
2543
2544 +enum ath_reset_type {
2545 + RESET_TYPE_BB_HANG,
2546 + RESET_TYPE_BB_WATCHDOG,
2547 + RESET_TYPE_FATAL_INT,
2548 + RESET_TYPE_TX_ERROR,
2549 + RESET_TYPE_TX_HANG,
2550 + RESET_TYPE_PLL_HANG,
2551 + RESET_TYPE_MAC_HANG,
2552 + RESET_TYPE_BEACON_STUCK,
2553 + RESET_TYPE_MCI,
2554 + __RESET_TYPE_MAX
2555 +};
2556 +
2557 #ifdef CONFIG_ATH9K_DEBUGFS
2558
2559 /**
2560 @@ -209,17 +222,6 @@ struct ath_rx_stats {
2561 u32 rx_frags;
2562 };
2563
2564 -enum ath_reset_type {
2565 - RESET_TYPE_BB_HANG,
2566 - RESET_TYPE_BB_WATCHDOG,
2567 - RESET_TYPE_FATAL_INT,
2568 - RESET_TYPE_TX_ERROR,
2569 - RESET_TYPE_TX_HANG,
2570 - RESET_TYPE_PLL_HANG,
2571 - RESET_TYPE_MAC_HANG,
2572 - __RESET_TYPE_MAX
2573 -};
2574 -
2575 struct ath_stats {
2576 struct ath_interrupt_stats istats;
2577 struct ath_tx_stats txstats[ATH9K_NUM_TX_QUEUES];
2578 --- a/drivers/net/wireless/ath/ath9k/eeprom.h
2579 +++ b/drivers/net/wireless/ath/ath9k/eeprom.h
2580 @@ -241,16 +241,12 @@ enum eeprom_param {
2581 EEP_TEMPSENSE_SLOPE,
2582 EEP_TEMPSENSE_SLOPE_PAL_ON,
2583 EEP_PWR_TABLE_OFFSET,
2584 - EEP_DRIVE_STRENGTH,
2585 - EEP_INTERNAL_REGULATOR,
2586 - EEP_SWREG,
2587 EEP_PAPRD,
2588 EEP_MODAL_VER,
2589 EEP_ANT_DIV_CTL1,
2590 EEP_CHAIN_MASK_REDUCE,
2591 EEP_ANTENNA_GAIN_2G,
2592 EEP_ANTENNA_GAIN_5G,
2593 - EEP_QUICK_DROP
2594 };
2595
2596 enum ar5416_rates {
2597 --- a/drivers/net/wireless/ath/ath9k/htc_drv_main.c
2598 +++ b/drivers/net/wireless/ath/ath9k/htc_drv_main.c
2599 @@ -1111,7 +1111,7 @@ static int ath9k_htc_add_interface(struc
2600
2601 if ((priv->ah->opmode == NL80211_IFTYPE_AP) &&
2602 !test_bit(OP_ANI_RUNNING, &priv->op_flags)) {
2603 - ath9k_hw_set_tsfadjust(priv->ah, 1);
2604 + ath9k_hw_set_tsfadjust(priv->ah, true);
2605 ath9k_htc_start_ani(priv);
2606 }
2607
2608 @@ -1351,7 +1351,7 @@ static int ath9k_htc_conf_tx(struct ieee
2609 qi.tqi_aifs = params->aifs;
2610 qi.tqi_cwmin = params->cw_min;
2611 qi.tqi_cwmax = params->cw_max;
2612 - qi.tqi_burstTime = params->txop;
2613 + qi.tqi_burstTime = params->txop * 32;
2614
2615 qnum = get_hw_qnum(queue, priv->hwq_map);
2616
2617 --- a/drivers/net/wireless/ath/ath9k/hw.c
2618 +++ b/drivers/net/wireless/ath/ath9k/hw.c
2619 @@ -671,10 +671,6 @@ static int __ath9k_hw_init(struct ath_hw
2620 if (!AR_SREV_9300_20_OR_LATER(ah))
2621 ah->ani_function &= ~ATH9K_ANI_MRC_CCK;
2622
2623 - /* disable ANI for 9340 */
2624 - if (AR_SREV_9340(ah))
2625 - ah->config.enable_ani = false;
2626 -
2627 ath9k_hw_init_mode_regs(ah);
2628
2629 if (!ah->is_pciexpress)
2630 @@ -2916,9 +2912,9 @@ void ath9k_hw_reset_tsf(struct ath_hw *a
2631 }
2632 EXPORT_SYMBOL(ath9k_hw_reset_tsf);
2633
2634 -void ath9k_hw_set_tsfadjust(struct ath_hw *ah, u32 setting)
2635 +void ath9k_hw_set_tsfadjust(struct ath_hw *ah, bool set)
2636 {
2637 - if (setting)
2638 + if (set)
2639 ah->misc_mode |= AR_PCU_TX_ADD_TSF;
2640 else
2641 ah->misc_mode &= ~AR_PCU_TX_ADD_TSF;
2642 --- a/drivers/net/wireless/ath/ath9k/hw.h
2643 +++ b/drivers/net/wireless/ath/ath9k/hw.h
2644 @@ -994,7 +994,7 @@ u32 ath9k_hw_gettsf32(struct ath_hw *ah)
2645 u64 ath9k_hw_gettsf64(struct ath_hw *ah);
2646 void ath9k_hw_settsf64(struct ath_hw *ah, u64 tsf64);
2647 void ath9k_hw_reset_tsf(struct ath_hw *ah);
2648 -void ath9k_hw_set_tsfadjust(struct ath_hw *ah, u32 setting);
2649 +void ath9k_hw_set_tsfadjust(struct ath_hw *ah, bool set);
2650 void ath9k_hw_init_global_settings(struct ath_hw *ah);
2651 u32 ar9003_get_pll_sqsum_dvc(struct ath_hw *ah);
2652 void ath9k_hw_set11nmac2040(struct ath_hw *ah);
2653 --- a/drivers/net/wireless/ath/ath9k/init.c
2654 +++ b/drivers/net/wireless/ath/ath9k/init.c
2655 @@ -436,6 +436,7 @@ static int ath9k_init_queues(struct ath_
2656 for (i = 0; i < WME_NUM_AC; i++) {
2657 sc->tx.txq_map[i] = ath_txq_setup(sc, ATH9K_TX_QUEUE_DATA, i);
2658 sc->tx.txq_map[i]->mac80211_qnum = i;
2659 + sc->tx.txq_max_pending[i] = ATH_MAX_QDEPTH;
2660 }
2661 return 0;
2662 }
2663 @@ -560,7 +561,7 @@ static int ath9k_init_softc(u16 devid, s
2664 spin_lock_init(&sc->debug.samp_lock);
2665 #endif
2666 tasklet_init(&sc->intr_tq, ath9k_tasklet, (unsigned long)sc);
2667 - tasklet_init(&sc->bcon_tasklet, ath_beacon_tasklet,
2668 + tasklet_init(&sc->bcon_tasklet, ath9k_beacon_tasklet,
2669 (unsigned long)sc);
2670
2671 INIT_WORK(&sc->hw_reset_work, ath_reset_work);
2672 --- a/drivers/net/wireless/ath/ath9k/link.c
2673 +++ b/drivers/net/wireless/ath/ath9k/link.c
2674 @@ -50,8 +50,7 @@ void ath_tx_complete_poll_work(struct wo
2675 if (needreset) {
2676 ath_dbg(ath9k_hw_common(sc->sc_ah), RESET,
2677 "tx hung, resetting the chip\n");
2678 - RESET_STAT_INC(sc, RESET_TYPE_TX_HANG);
2679 - ieee80211_queue_work(sc->hw, &sc->hw_reset_work);
2680 + ath9k_queue_reset(sc, RESET_TYPE_TX_HANG);
2681 return;
2682 }
2683
2684 @@ -69,6 +68,7 @@ void ath_hw_check(struct work_struct *wo
2685 unsigned long flags;
2686 int busy;
2687 u8 is_alive, nbeacon = 1;
2688 + enum ath_reset_type type;
2689
2690 ath9k_ps_wakeup(sc);
2691 is_alive = ath9k_hw_check_alive(sc->sc_ah);
2692 @@ -78,7 +78,7 @@ void ath_hw_check(struct work_struct *wo
2693 else if (!is_alive && AR_SREV_9300(sc->sc_ah)) {
2694 ath_dbg(common, RESET,
2695 "DCU stuck is detected. Schedule chip reset\n");
2696 - RESET_STAT_INC(sc, RESET_TYPE_MAC_HANG);
2697 + type = RESET_TYPE_MAC_HANG;
2698 goto sched_reset;
2699 }
2700
2701 @@ -90,7 +90,7 @@ void ath_hw_check(struct work_struct *wo
2702 busy, sc->hw_busy_count + 1);
2703 if (busy >= 99) {
2704 if (++sc->hw_busy_count >= 3) {
2705 - RESET_STAT_INC(sc, RESET_TYPE_BB_HANG);
2706 + type = RESET_TYPE_BB_HANG;
2707 goto sched_reset;
2708 }
2709 } else if (busy >= 0) {
2710 @@ -102,7 +102,7 @@ void ath_hw_check(struct work_struct *wo
2711 goto out;
2712
2713 sched_reset:
2714 - ieee80211_queue_work(sc->hw, &sc->hw_reset_work);
2715 + ath9k_queue_reset(sc, type);
2716 out:
2717 ath9k_ps_restore(sc);
2718 }
2719 @@ -119,8 +119,7 @@ static bool ath_hw_pll_rx_hang_check(str
2720 count++;
2721 if (count == 3) {
2722 ath_dbg(common, RESET, "PLL WAR, resetting the chip\n");
2723 - RESET_STAT_INC(sc, RESET_TYPE_PLL_HANG);
2724 - ieee80211_queue_work(sc->hw, &sc->hw_reset_work);
2725 + ath9k_queue_reset(sc, RESET_TYPE_PLL_HANG);
2726 count = 0;
2727 return true;
2728 }
2729 @@ -432,26 +431,69 @@ set_timer:
2730 }
2731 }
2732
2733 -void ath_start_ani(struct ath_common *common)
2734 +void ath_start_ani(struct ath_softc *sc)
2735 {
2736 - struct ath_hw *ah = common->ah;
2737 + struct ath_hw *ah = sc->sc_ah;
2738 + struct ath_common *common = ath9k_hw_common(ah);
2739 unsigned long timestamp = jiffies_to_msecs(jiffies);
2740 - struct ath_softc *sc = (struct ath_softc *) common->priv;
2741
2742 - if (!test_bit(SC_OP_ANI_RUN, &sc->sc_flags))
2743 - return;
2744 -
2745 - if (sc->hw->conf.flags & IEEE80211_CONF_OFFCHANNEL)
2746 + if (common->disable_ani ||
2747 + !test_bit(SC_OP_ANI_RUN, &sc->sc_flags) ||
2748 + (sc->hw->conf.flags & IEEE80211_CONF_OFFCHANNEL))
2749 return;
2750
2751 common->ani.longcal_timer = timestamp;
2752 common->ani.shortcal_timer = timestamp;
2753 common->ani.checkani_timer = timestamp;
2754
2755 + ath_dbg(common, ANI, "Starting ANI\n");
2756 mod_timer(&common->ani.timer,
2757 jiffies + msecs_to_jiffies((u32)ah->config.ani_poll_interval));
2758 }
2759
2760 +void ath_stop_ani(struct ath_softc *sc)
2761 +{
2762 + struct ath_common *common = ath9k_hw_common(sc->sc_ah);
2763 +
2764 + ath_dbg(common, ANI, "Stopping ANI\n");
2765 + del_timer_sync(&common->ani.timer);
2766 +}
2767 +
2768 +void ath_check_ani(struct ath_softc *sc)
2769 +{
2770 + struct ath_hw *ah = sc->sc_ah;
2771 + struct ath_beacon_config *cur_conf = &sc->cur_beacon_conf;
2772 +
2773 + /*
2774 + * Check for the various conditions in which ANI has to
2775 + * be stopped.
2776 + */
2777 + if (ah->opmode == NL80211_IFTYPE_ADHOC) {
2778 + if (!cur_conf->enable_beacon)
2779 + goto stop_ani;
2780 + } else if (ah->opmode == NL80211_IFTYPE_AP) {
2781 + if (!cur_conf->enable_beacon) {
2782 + /*
2783 + * Disable ANI only when there are no
2784 + * associated stations.
2785 + */
2786 + if (!test_bit(SC_OP_PRIM_STA_VIF, &sc->sc_flags))
2787 + goto stop_ani;
2788 + }
2789 + } else if (ah->opmode == NL80211_IFTYPE_STATION) {
2790 + if (!test_bit(SC_OP_PRIM_STA_VIF, &sc->sc_flags))
2791 + goto stop_ani;
2792 + }
2793 +
2794 + set_bit(SC_OP_ANI_RUN, &sc->sc_flags);
2795 + ath_start_ani(sc);
2796 + return;
2797 +
2798 +stop_ani:
2799 + clear_bit(SC_OP_ANI_RUN, &sc->sc_flags);
2800 + ath_stop_ani(sc);
2801 +}
2802 +
2803 void ath_update_survey_nf(struct ath_softc *sc, int channel)
2804 {
2805 struct ath_hw *ah = sc->sc_ah;
2806 --- a/drivers/net/wireless/ath/ath9k/main.c
2807 +++ b/drivers/net/wireless/ath/ath9k/main.c
2808 @@ -167,8 +167,6 @@ static void ath_cancel_work(struct ath_s
2809
2810 static void ath_restart_work(struct ath_softc *sc)
2811 {
2812 - struct ath_common *common = ath9k_hw_common(sc->sc_ah);
2813 -
2814 ieee80211_queue_delayed_work(sc->hw, &sc->tx_complete_work, 0);
2815
2816 if (AR_SREV_9340(sc->sc_ah) || AR_SREV_9485(sc->sc_ah) ||
2817 @@ -177,21 +175,18 @@ static void ath_restart_work(struct ath_
2818 msecs_to_jiffies(ATH_PLL_WORK_INTERVAL));
2819
2820 ath_start_rx_poll(sc, 3);
2821 -
2822 - if (!common->disable_ani)
2823 - ath_start_ani(common);
2824 + ath_start_ani(sc);
2825 }
2826
2827 static bool ath_prepare_reset(struct ath_softc *sc, bool retry_tx, bool flush)
2828 {
2829 struct ath_hw *ah = sc->sc_ah;
2830 - struct ath_common *common = ath9k_hw_common(ah);
2831 bool ret = true;
2832
2833 ieee80211_stop_queues(sc->hw);
2834
2835 sc->hw_busy_count = 0;
2836 - del_timer_sync(&common->ani.timer);
2837 + ath_stop_ani(sc);
2838 del_timer_sync(&sc->rx_poll_timer);
2839
2840 ath9k_debug_samp_bb_mac(sc);
2841 @@ -236,7 +231,7 @@ static bool ath_complete_reset(struct at
2842 if (!test_bit(SC_OP_BEACONS, &sc->sc_flags))
2843 goto work;
2844
2845 - ath_set_beacon(sc);
2846 + ath9k_set_beacon(sc);
2847
2848 if (ah->opmode == NL80211_IFTYPE_STATION &&
2849 test_bit(SC_OP_PRIM_STA_VIF, &sc->sc_flags)) {
2850 @@ -365,6 +360,7 @@ void ath9k_tasklet(unsigned long data)
2851 struct ath_softc *sc = (struct ath_softc *)data;
2852 struct ath_hw *ah = sc->sc_ah;
2853 struct ath_common *common = ath9k_hw_common(ah);
2854 + enum ath_reset_type type;
2855 unsigned long flags;
2856 u32 status = sc->intrstatus;
2857 u32 rxmask;
2858 @@ -374,18 +370,13 @@ void ath9k_tasklet(unsigned long data)
2859
2860 if ((status & ATH9K_INT_FATAL) ||
2861 (status & ATH9K_INT_BB_WATCHDOG)) {
2862 -#ifdef CONFIG_ATH9K_DEBUGFS
2863 - enum ath_reset_type type;
2864
2865 if (status & ATH9K_INT_FATAL)
2866 type = RESET_TYPE_FATAL_INT;
2867 else
2868 type = RESET_TYPE_BB_WATCHDOG;
2869
2870 - RESET_STAT_INC(sc, type);
2871 -#endif
2872 - set_bit(SC_OP_HW_RESET, &sc->sc_flags);
2873 - ieee80211_queue_work(sc->hw, &sc->hw_reset_work);
2874 + ath9k_queue_reset(sc, type);
2875 goto out;
2876 }
2877
2878 @@ -586,6 +577,15 @@ static int ath_reset(struct ath_softc *s
2879 return r;
2880 }
2881
2882 +void ath9k_queue_reset(struct ath_softc *sc, enum ath_reset_type type)
2883 +{
2884 +#ifdef CONFIG_ATH9K_DEBUGFS
2885 + RESET_STAT_INC(sc, type);
2886 +#endif
2887 + set_bit(SC_OP_HW_RESET, &sc->sc_flags);
2888 + ieee80211_queue_work(sc->hw, &sc->hw_reset_work);
2889 +}
2890 +
2891 void ath_reset_work(struct work_struct *work)
2892 {
2893 struct ath_softc *sc = container_of(work, struct ath_softc, hw_reset_work);
2894 @@ -852,16 +852,6 @@ bool ath9k_uses_beacons(int type)
2895 }
2896 }
2897
2898 -static void ath9k_reclaim_beacon(struct ath_softc *sc,
2899 - struct ieee80211_vif *vif)
2900 -{
2901 - struct ath_vif *avp = (void *)vif->drv_priv;
2902 -
2903 - ath9k_set_beaconing_status(sc, false);
2904 - ath_beacon_return(sc, avp);
2905 - ath9k_set_beaconing_status(sc, true);
2906 -}
2907 -
2908 static void ath9k_vif_iter(void *data, u8 *mac, struct ieee80211_vif *vif)
2909 {
2910 struct ath9k_vif_iter_data *iter_data = data;
2911 @@ -929,18 +919,14 @@ static void ath9k_calculate_summary_stat
2912
2913 ath9k_calculate_iter_data(hw, vif, &iter_data);
2914
2915 - /* Set BSSID mask. */
2916 memcpy(common->bssidmask, iter_data.mask, ETH_ALEN);
2917 ath_hw_setbssidmask(common);
2918
2919 - /* Set op-mode & TSF */
2920 if (iter_data.naps > 0) {
2921 - ath9k_hw_set_tsfadjust(ah, 1);
2922 - set_bit(SC_OP_TSF_RESET, &sc->sc_flags);
2923 + ath9k_hw_set_tsfadjust(ah, true);
2924 ah->opmode = NL80211_IFTYPE_AP;
2925 } else {
2926 - ath9k_hw_set_tsfadjust(ah, 0);
2927 - clear_bit(SC_OP_TSF_RESET, &sc->sc_flags);
2928 + ath9k_hw_set_tsfadjust(ah, false);
2929
2930 if (iter_data.nmeshes)
2931 ah->opmode = NL80211_IFTYPE_MESH_POINT;
2932 @@ -952,45 +938,14 @@ static void ath9k_calculate_summary_stat
2933 ah->opmode = NL80211_IFTYPE_STATION;
2934 }
2935
2936 - /*
2937 - * Enable MIB interrupts when there are hardware phy counters.
2938 - */
2939 + ath9k_hw_setopmode(ah);
2940 +
2941 if ((iter_data.nstations + iter_data.nadhocs + iter_data.nmeshes) > 0)
2942 ah->imask |= ATH9K_INT_TSFOOR;
2943 else
2944 ah->imask &= ~ATH9K_INT_TSFOOR;
2945
2946 ath9k_hw_set_interrupts(ah);
2947 -
2948 - /* Set up ANI */
2949 - if (iter_data.naps > 0) {
2950 - sc->sc_ah->stats.avgbrssi = ATH_RSSI_DUMMY_MARKER;
2951 -
2952 - if (!common->disable_ani) {
2953 - set_bit(SC_OP_ANI_RUN, &sc->sc_flags);
2954 - ath_start_ani(common);
2955 - }
2956 -
2957 - } else {
2958 - clear_bit(SC_OP_ANI_RUN, &sc->sc_flags);
2959 - del_timer_sync(&common->ani.timer);
2960 - }
2961 -}
2962 -
2963 -/* Called with sc->mutex held, vif counts set up properly. */
2964 -static void ath9k_do_vif_add_setup(struct ieee80211_hw *hw,
2965 - struct ieee80211_vif *vif)
2966 -{
2967 - struct ath_softc *sc = hw->priv;
2968 -
2969 - ath9k_calculate_summary_state(hw, vif);
2970 -
2971 - if (ath9k_uses_beacons(vif->type)) {
2972 - /* Reserve a beacon slot for the vif */
2973 - ath9k_set_beaconing_status(sc, false);
2974 - ath_beacon_alloc(sc, vif);
2975 - ath9k_set_beaconing_status(sc, true);
2976 - }
2977 }
2978
2979 static int ath9k_add_interface(struct ieee80211_hw *hw,
2980 @@ -1032,7 +987,10 @@ static int ath9k_add_interface(struct ie
2981
2982 sc->nvifs++;
2983
2984 - ath9k_do_vif_add_setup(hw, vif);
2985 + ath9k_calculate_summary_state(hw, vif);
2986 + if (ath9k_uses_beacons(vif->type))
2987 + ath9k_beacon_assign_slot(sc, vif);
2988 +
2989 out:
2990 mutex_unlock(&sc->mutex);
2991 ath9k_ps_restore(sc);
2992 @@ -1049,6 +1007,7 @@ static int ath9k_change_interface(struct
2993 int ret = 0;
2994
2995 ath_dbg(common, CONFIG, "Change Interface\n");
2996 +
2997 mutex_lock(&sc->mutex);
2998 ath9k_ps_wakeup(sc);
2999
3000 @@ -1061,15 +1020,16 @@ static int ath9k_change_interface(struct
3001 }
3002 }
3003
3004 - /* Clean up old vif stuff */
3005 if (ath9k_uses_beacons(vif->type))
3006 - ath9k_reclaim_beacon(sc, vif);
3007 + ath9k_beacon_remove_slot(sc, vif);
3008
3009 - /* Add new settings */
3010 vif->type = new_type;
3011 vif->p2p = p2p;
3012
3013 - ath9k_do_vif_add_setup(hw, vif);
3014 + ath9k_calculate_summary_state(hw, vif);
3015 + if (ath9k_uses_beacons(vif->type))
3016 + ath9k_beacon_assign_slot(sc, vif);
3017 +
3018 out:
3019 ath9k_ps_restore(sc);
3020 mutex_unlock(&sc->mutex);
3021 @@ -1089,9 +1049,8 @@ static void ath9k_remove_interface(struc
3022
3023 sc->nvifs--;
3024
3025 - /* Reclaim beacon resources */
3026 if (ath9k_uses_beacons(vif->type))
3027 - ath9k_reclaim_beacon(sc, vif);
3028 + ath9k_beacon_remove_slot(sc, vif);
3029
3030 ath9k_calculate_summary_state(hw, NULL);
3031
3032 @@ -1388,21 +1347,18 @@ static int ath9k_conf_tx(struct ieee8021
3033 qi.tqi_aifs = params->aifs;
3034 qi.tqi_cwmin = params->cw_min;
3035 qi.tqi_cwmax = params->cw_max;
3036 - qi.tqi_burstTime = params->txop;
3037 + qi.tqi_burstTime = params->txop * 32;
3038
3039 ath_dbg(common, CONFIG,
3040 "Configure tx [queue/halq] [%d/%d], aifs: %d, cw_min: %d, cw_max: %d, txop: %d\n",
3041 queue, txq->axq_qnum, params->aifs, params->cw_min,
3042 params->cw_max, params->txop);
3043
3044 + ath_update_max_aggr_framelen(sc, queue, qi.tqi_burstTime);
3045 ret = ath_txq_update(sc, txq->axq_qnum, &qi);
3046 if (ret)
3047 ath_err(common, "TXQ Update failed\n");
3048
3049 - if (sc->sc_ah->opmode == NL80211_IFTYPE_ADHOC)
3050 - if (queue == WME_AC_BE && !ret)
3051 - ath_beaconq_config(sc);
3052 -
3053 mutex_unlock(&sc->mutex);
3054 ath9k_ps_restore(sc);
3055
3056 @@ -1471,85 +1427,36 @@ static int ath9k_set_key(struct ieee8021
3057
3058 return ret;
3059 }
3060 -static void ath9k_bss_iter(void *data, u8 *mac, struct ieee80211_vif *vif)
3061 +
3062 +static void ath9k_bss_assoc_iter(void *data, u8 *mac, struct ieee80211_vif *vif)
3063 {
3064 struct ath_softc *sc = data;
3065 struct ath_common *common = ath9k_hw_common(sc->sc_ah);
3066 - struct ieee80211_bss_conf *bss_conf = &vif->bss_conf;
3067 struct ath_vif *avp = (void *)vif->drv_priv;
3068 + struct ieee80211_bss_conf *bss_conf = &vif->bss_conf;
3069 unsigned long flags;
3070 - /*
3071 - * Skip iteration if primary station vif's bss info
3072 - * was not changed
3073 - */
3074 +
3075 if (test_bit(SC_OP_PRIM_STA_VIF, &sc->sc_flags))
3076 return;
3077
3078 if (bss_conf->assoc) {
3079 set_bit(SC_OP_PRIM_STA_VIF, &sc->sc_flags);
3080 avp->primary_sta_vif = true;
3081 +
3082 memcpy(common->curbssid, bss_conf->bssid, ETH_ALEN);
3083 common->curaid = bss_conf->aid;
3084 ath9k_hw_write_associd(sc->sc_ah);
3085 - ath_dbg(common, CONFIG, "Bss Info ASSOC %d, bssid: %pM\n",
3086 - bss_conf->aid, common->curbssid);
3087 - ath_beacon_config(sc, vif);
3088 - /*
3089 - * Request a re-configuration of Beacon related timers
3090 - * on the receipt of the first Beacon frame (i.e.,
3091 - * after time sync with the AP).
3092 - */
3093 - spin_lock_irqsave(&sc->sc_pm_lock, flags);
3094 - sc->ps_flags |= PS_BEACON_SYNC | PS_WAIT_FOR_BEACON;
3095 - spin_unlock_irqrestore(&sc->sc_pm_lock, flags);
3096
3097 - /* Reset rssi stats */
3098 sc->last_rssi = ATH_RSSI_DUMMY_MARKER;
3099 sc->sc_ah->stats.avgbrssi = ATH_RSSI_DUMMY_MARKER;
3100
3101 - ath_start_rx_poll(sc, 3);
3102 -
3103 - if (!common->disable_ani) {
3104 - set_bit(SC_OP_ANI_RUN, &sc->sc_flags);
3105 - ath_start_ani(common);
3106 - }
3107 -
3108 - }
3109 -}
3110 -
3111 -static void ath9k_config_bss(struct ath_softc *sc, struct ieee80211_vif *vif)
3112 -{
3113 - struct ath_common *common = ath9k_hw_common(sc->sc_ah);
3114 - struct ieee80211_bss_conf *bss_conf = &vif->bss_conf;
3115 - struct ath_vif *avp = (void *)vif->drv_priv;
3116 -
3117 - if (sc->sc_ah->opmode != NL80211_IFTYPE_STATION)
3118 - return;
3119 -
3120 - /* Reconfigure bss info */
3121 - if (avp->primary_sta_vif && !bss_conf->assoc) {
3122 - ath_dbg(common, CONFIG, "Bss Info DISASSOC %d, bssid %pM\n",
3123 - common->curaid, common->curbssid);
3124 - clear_bit(SC_OP_PRIM_STA_VIF, &sc->sc_flags);
3125 - clear_bit(SC_OP_BEACONS, &sc->sc_flags);
3126 - avp->primary_sta_vif = false;
3127 - memset(common->curbssid, 0, ETH_ALEN);
3128 - common->curaid = 0;
3129 - }
3130 -
3131 - ieee80211_iterate_active_interfaces_atomic(
3132 - sc->hw, ath9k_bss_iter, sc);
3133 + spin_lock_irqsave(&sc->sc_pm_lock, flags);
3134 + sc->ps_flags |= PS_BEACON_SYNC | PS_WAIT_FOR_BEACON;
3135 + spin_unlock_irqrestore(&sc->sc_pm_lock, flags);
3136
3137 - /*
3138 - * None of station vifs are associated.
3139 - * Clear bssid & aid
3140 - */
3141 - if (!test_bit(SC_OP_PRIM_STA_VIF, &sc->sc_flags)) {
3142 - ath9k_hw_write_associd(sc->sc_ah);
3143 - clear_bit(SC_OP_ANI_RUN, &sc->sc_flags);
3144 - del_timer_sync(&common->ani.timer);
3145 - del_timer_sync(&sc->rx_poll_timer);
3146 - memset(&sc->caldata, 0, sizeof(sc->caldata));
3147 + ath_dbg(common, CONFIG,
3148 + "Primary Station interface: %pM, BSSID: %pM\n",
3149 + vif->addr, common->curbssid);
3150 }
3151 }
3152
3153 @@ -1558,6 +1465,11 @@ static void ath9k_bss_info_changed(struc
3154 struct ieee80211_bss_conf *bss_conf,
3155 u32 changed)
3156 {
3157 +#define CHECK_ANI \
3158 + (BSS_CHANGED_ASSOC | \
3159 + BSS_CHANGED_IBSS | \
3160 + BSS_CHANGED_BEACON_ENABLED)
3161 +
3162 struct ath_softc *sc = hw->priv;
3163 struct ath_hw *ah = sc->sc_ah;
3164 struct ath_common *common = ath9k_hw_common(ah);
3165 @@ -1568,53 +1480,43 @@ static void ath9k_bss_info_changed(struc
3166 mutex_lock(&sc->mutex);
3167
3168 if (changed & BSS_CHANGED_ASSOC) {
3169 - ath9k_config_bss(sc, vif);
3170 + ath_dbg(common, CONFIG, "BSSID %pM Changed ASSOC %d\n",
3171 + bss_conf->bssid, bss_conf->assoc);
3172
3173 - ath_dbg(common, CONFIG, "BSSID: %pM aid: 0x%x\n",
3174 - common->curbssid, common->curaid);
3175 + /*
3176 + * Do not do anything when the opmode is not STATION.
3177 + */
3178 + if (ah->opmode == NL80211_IFTYPE_STATION) {
3179 + if (avp->primary_sta_vif && !bss_conf->assoc) {
3180 + clear_bit(SC_OP_PRIM_STA_VIF, &sc->sc_flags);
3181 + clear_bit(SC_OP_BEACONS, &sc->sc_flags);
3182 + avp->primary_sta_vif = false;
3183 + }
3184 +
3185 + ieee80211_iterate_active_interfaces_atomic(sc->hw,
3186 + ath9k_bss_assoc_iter, sc);
3187 +
3188 + if (!test_bit(SC_OP_PRIM_STA_VIF, &sc->sc_flags)) {
3189 + memset(common->curbssid, 0, ETH_ALEN);
3190 + common->curaid = 0;
3191 + ath9k_hw_write_associd(sc->sc_ah);
3192 + }
3193 + }
3194 }
3195
3196 if (changed & BSS_CHANGED_IBSS) {
3197 - /* There can be only one vif available */
3198 memcpy(common->curbssid, bss_conf->bssid, ETH_ALEN);
3199 common->curaid = bss_conf->aid;
3200 ath9k_hw_write_associd(sc->sc_ah);
3201 -
3202 - if (bss_conf->ibss_joined) {
3203 - sc->sc_ah->stats.avgbrssi = ATH_RSSI_DUMMY_MARKER;
3204 -
3205 - if (!common->disable_ani) {
3206 - set_bit(SC_OP_ANI_RUN, &sc->sc_flags);
3207 - ath_start_ani(common);
3208 - }
3209 -
3210 - } else {
3211 - clear_bit(SC_OP_ANI_RUN, &sc->sc_flags);
3212 - del_timer_sync(&common->ani.timer);
3213 - del_timer_sync(&sc->rx_poll_timer);
3214 - }
3215 }
3216
3217 - /*
3218 - * In case of AP mode, the HW TSF has to be reset
3219 - * when the beacon interval changes.
3220 - */
3221 - if ((changed & BSS_CHANGED_BEACON_INT) &&
3222 - (vif->type == NL80211_IFTYPE_AP))
3223 - set_bit(SC_OP_TSF_RESET, &sc->sc_flags);
3224 -
3225 - /* Configure beaconing (AP, IBSS, MESH) */
3226 - if (ath9k_uses_beacons(vif->type) &&
3227 - ((changed & BSS_CHANGED_BEACON) ||
3228 - (changed & BSS_CHANGED_BEACON_ENABLED) ||
3229 - (changed & BSS_CHANGED_BEACON_INT))) {
3230 - ath9k_set_beaconing_status(sc, false);
3231 - if (bss_conf->enable_beacon)
3232 - ath_beacon_alloc(sc, vif);
3233 - else
3234 - avp->is_bslot_active = false;
3235 - ath_beacon_config(sc, vif);
3236 - ath9k_set_beaconing_status(sc, true);
3237 + if ((changed & BSS_CHANGED_BEACON) ||
3238 + (changed & BSS_CHANGED_BEACON_ENABLED) ||
3239 + (changed & BSS_CHANGED_BEACON_INT)) {
3240 + if (ah->opmode == NL80211_IFTYPE_AP)
3241 + ath9k_set_tsfadjust(sc, vif);
3242 + if (ath9k_allow_beacon_config(sc, vif))
3243 + ath9k_beacon_config(sc, vif, changed);
3244 }
3245
3246 if (changed & BSS_CHANGED_ERP_SLOT) {
3247 @@ -1636,8 +1538,13 @@ static void ath9k_bss_info_changed(struc
3248 }
3249 }
3250
3251 + if (changed & CHECK_ANI)
3252 + ath_check_ani(sc);
3253 +
3254 mutex_unlock(&sc->mutex);
3255 ath9k_ps_restore(sc);
3256 +
3257 +#undef CHECK_ANI
3258 }
3259
3260 static u64 ath9k_get_tsf(struct ieee80211_hw *hw, struct ieee80211_vif *vif)
3261 @@ -1866,10 +1773,11 @@ static int ath9k_tx_last_beacon(struct i
3262 if (!vif)
3263 return 0;
3264
3265 - avp = (void *)vif->drv_priv;
3266 - if (!avp->is_bslot_active)
3267 + if (!vif->bss_conf.enable_beacon)
3268 return 0;
3269
3270 + avp = (void *)vif->drv_priv;
3271 +
3272 if (!sc->beacon.tx_processed && !edma) {
3273 tasklet_disable(&sc->bcon_tasklet);
3274
3275 @@ -1923,12 +1831,29 @@ static u32 fill_chainmask(u32 cap, u32 n
3276 return filled;
3277 }
3278
3279 +static bool validate_antenna_mask(struct ath_hw *ah, u32 val)
3280 +{
3281 + switch (val & 0x7) {
3282 + case 0x1:
3283 + case 0x3:
3284 + case 0x7:
3285 + return true;
3286 + case 0x2:
3287 + return (ah->caps.rx_chainmask == 1);
3288 + default:
3289 + return false;
3290 + }
3291 +}
3292 +
3293 static int ath9k_set_antenna(struct ieee80211_hw *hw, u32 tx_ant, u32 rx_ant)
3294 {
3295 struct ath_softc *sc = hw->priv;
3296 struct ath_hw *ah = sc->sc_ah;
3297
3298 - if (!rx_ant || !tx_ant)
3299 + if (ah->caps.rx_chainmask != 1)
3300 + rx_ant |= tx_ant;
3301 +
3302 + if (!validate_antenna_mask(ah, rx_ant) || !tx_ant)
3303 return -EINVAL;
3304
3305 sc->ant_rx = rx_ant;
3306 --- a/drivers/net/wireless/ath/ath9k/mci.c
3307 +++ b/drivers/net/wireless/ath/ath9k/mci.c
3308 @@ -202,7 +202,7 @@ static void ath_mci_cal_msg(struct ath_s
3309 case MCI_GPM_BT_CAL_REQ:
3310 if (mci_hw->bt_state == MCI_BT_AWAKE) {
3311 ar9003_mci_state(ah, MCI_STATE_SET_BT_CAL_START);
3312 - ieee80211_queue_work(sc->hw, &sc->hw_reset_work);
3313 + ath9k_queue_reset(sc, RESET_TYPE_MCI);
3314 }
3315 ath_dbg(common, MCI, "MCI State : %d\n", mci_hw->bt_state);
3316 break;
3317 --- a/drivers/net/wireless/ath/ath9k/recv.c
3318 +++ b/drivers/net/wireless/ath/ath9k/recv.c
3319 @@ -553,7 +553,7 @@ static void ath_rx_ps_beacon(struct ath_
3320 sc->ps_flags &= ~PS_BEACON_SYNC;
3321 ath_dbg(common, PS,
3322 "Reconfigure Beacon timers based on timestamp from the AP\n");
3323 - ath_set_beacon(sc);
3324 + ath9k_set_beacon(sc);
3325 }
3326
3327 if (ath_beacon_dtim_pending_cab(skb)) {
3328 @@ -1044,7 +1044,6 @@ int ath_rx_tasklet(struct ath_softc *sc,
3329 struct ieee80211_hw *hw = sc->hw;
3330 struct ieee80211_hdr *hdr;
3331 int retval;
3332 - bool decrypt_error = false;
3333 struct ath_rx_status rs;
3334 enum ath9k_rx_qtype qtype;
3335 bool edma = !!(ah->caps.hw_caps & ATH9K_HW_CAP_EDMA);
3336 @@ -1066,6 +1065,7 @@ int ath_rx_tasklet(struct ath_softc *sc,
3337 tsf_lower = tsf & 0xffffffff;
3338
3339 do {
3340 + bool decrypt_error = false;
3341 /* If handling rx interrupt and flush is in progress => exit */
3342 if (test_bit(SC_OP_RXFLUSH, &sc->sc_flags) && (flush == 0))
3343 break;
3344 --- a/drivers/net/wireless/ath/ath9k/xmit.c
3345 +++ b/drivers/net/wireless/ath/ath9k/xmit.c
3346 @@ -29,6 +29,8 @@
3347 #define HT_LTF(_ns) (4 * (_ns))
3348 #define SYMBOL_TIME(_ns) ((_ns) << 2) /* ns * 4 us */
3349 #define SYMBOL_TIME_HALFGI(_ns) (((_ns) * 18 + 4) / 5) /* ns * 3.6 us */
3350 +#define TIME_SYMBOLS(t) ((t) >> 2)
3351 +#define TIME_SYMBOLS_HALFGI(t) (((t) * 5 - 4) / 18)
3352 #define NUM_SYMBOLS_PER_USEC(_usec) (_usec >> 2)
3353 #define NUM_SYMBOLS_PER_USEC_HALFGI(_usec) (((_usec*5)-4)/18)
3354
3355 @@ -74,33 +76,6 @@ enum {
3356 MCS_HT40_SGI,
3357 };
3358
3359 -static int ath_max_4ms_framelen[4][32] = {
3360 - [MCS_HT20] = {
3361 - 3212, 6432, 9648, 12864, 19300, 25736, 28952, 32172,
3362 - 6424, 12852, 19280, 25708, 38568, 51424, 57852, 64280,
3363 - 9628, 19260, 28896, 38528, 57792, 65532, 65532, 65532,
3364 - 12828, 25656, 38488, 51320, 65532, 65532, 65532, 65532,
3365 - },
3366 - [MCS_HT20_SGI] = {
3367 - 3572, 7144, 10720, 14296, 21444, 28596, 32172, 35744,
3368 - 7140, 14284, 21428, 28568, 42856, 57144, 64288, 65532,
3369 - 10700, 21408, 32112, 42816, 64228, 65532, 65532, 65532,
3370 - 14256, 28516, 42780, 57040, 65532, 65532, 65532, 65532,
3371 - },
3372 - [MCS_HT40] = {
3373 - 6680, 13360, 20044, 26724, 40092, 53456, 60140, 65532,
3374 - 13348, 26700, 40052, 53400, 65532, 65532, 65532, 65532,
3375 - 20004, 40008, 60016, 65532, 65532, 65532, 65532, 65532,
3376 - 26644, 53292, 65532, 65532, 65532, 65532, 65532, 65532,
3377 - },
3378 - [MCS_HT40_SGI] = {
3379 - 7420, 14844, 22272, 29696, 44544, 59396, 65532, 65532,
3380 - 14832, 29668, 44504, 59340, 65532, 65532, 65532, 65532,
3381 - 22232, 44464, 65532, 65532, 65532, 65532, 65532, 65532,
3382 - 29616, 59232, 65532, 65532, 65532, 65532, 65532, 65532,
3383 - }
3384 -};
3385 -
3386 /*********************/
3387 /* Aggregation logic */
3388 /*********************/
3389 @@ -614,10 +589,8 @@ static void ath_tx_complete_aggr(struct
3390
3391 rcu_read_unlock();
3392
3393 - if (needreset) {
3394 - RESET_STAT_INC(sc, RESET_TYPE_TX_ERROR);
3395 - ieee80211_queue_work(sc->hw, &sc->hw_reset_work);
3396 - }
3397 + if (needreset)
3398 + ath9k_queue_reset(sc, RESET_TYPE_TX_ERROR);
3399 }
3400
3401 static bool ath_lookup_legacy(struct ath_buf *bf)
3402 @@ -650,6 +623,7 @@ static u32 ath_lookup_rate(struct ath_so
3403 struct ieee80211_tx_rate *rates;
3404 u32 max_4ms_framelen, frmlen;
3405 u16 aggr_limit, bt_aggr_limit, legacy = 0;
3406 + int q = tid->ac->txq->mac80211_qnum;
3407 int i;
3408
3409 skb = bf->bf_mpdu;
3410 @@ -658,8 +632,7 @@ static u32 ath_lookup_rate(struct ath_so
3411
3412 /*
3413 * Find the lowest frame length among the rate series that will have a
3414 - * 4ms transmit duration.
3415 - * TODO - TXOP limit needs to be considered.
3416 + * 4ms (or TXOP limited) transmit duration.
3417 */
3418 max_4ms_framelen = ATH_AMPDU_LIMIT_MAX;
3419
3420 @@ -682,7 +655,7 @@ static u32 ath_lookup_rate(struct ath_so
3421 if (rates[i].flags & IEEE80211_TX_RC_SHORT_GI)
3422 modeidx++;
3423
3424 - frmlen = ath_max_4ms_framelen[modeidx][rates[i].idx];
3425 + frmlen = sc->tx.max_aggr_framelen[q][modeidx][rates[i].idx];
3426 max_4ms_framelen = min(max_4ms_framelen, frmlen);
3427 }
3428
3429 @@ -929,6 +902,44 @@ static u32 ath_pkt_duration(struct ath_s
3430 return duration;
3431 }
3432
3433 +static int ath_max_framelen(int usec, int mcs, bool ht40, bool sgi)
3434 +{
3435 + int streams = HT_RC_2_STREAMS(mcs);
3436 + int symbols, bits;
3437 + int bytes = 0;
3438 +
3439 + symbols = sgi ? TIME_SYMBOLS_HALFGI(usec) : TIME_SYMBOLS(usec);
3440 + bits = symbols * bits_per_symbol[mcs % 8][ht40] * streams;
3441 + bits -= OFDM_PLCP_BITS;
3442 + bytes = bits / 8;
3443 + bytes -= L_STF + L_LTF + L_SIG + HT_SIG + HT_STF + HT_LTF(streams);
3444 + if (bytes > 65532)
3445 + bytes = 65532;
3446 +
3447 + return bytes;
3448 +}
3449 +
3450 +void ath_update_max_aggr_framelen(struct ath_softc *sc, int queue, int txop)
3451 +{
3452 + u16 *cur_ht20, *cur_ht20_sgi, *cur_ht40, *cur_ht40_sgi;
3453 + int mcs;
3454 +
3455 + /* 4ms is the default (and maximum) duration */
3456 + if (!txop || txop > 4096)
3457 + txop = 4096;
3458 +
3459 + cur_ht20 = sc->tx.max_aggr_framelen[queue][MCS_HT20];
3460 + cur_ht20_sgi = sc->tx.max_aggr_framelen[queue][MCS_HT20_SGI];
3461 + cur_ht40 = sc->tx.max_aggr_framelen[queue][MCS_HT40];
3462 + cur_ht40_sgi = sc->tx.max_aggr_framelen[queue][MCS_HT40_SGI];
3463 + for (mcs = 0; mcs < 32; mcs++) {
3464 + cur_ht20[mcs] = ath_max_framelen(txop, mcs, false, false);
3465 + cur_ht20_sgi[mcs] = ath_max_framelen(txop, mcs, false, true);
3466 + cur_ht40[mcs] = ath_max_framelen(txop, mcs, true, false);
3467 + cur_ht40_sgi[mcs] = ath_max_framelen(txop, mcs, true, true);
3468 + }
3469 +}
3470 +
3471 static void ath_buf_set_rate(struct ath_softc *sc, struct ath_buf *bf,
3472 struct ath_tx_info *info, int len)
3473 {
3474 @@ -1586,7 +1597,8 @@ void ath_txq_schedule(struct ath_softc *
3475 struct ath_atx_ac *ac, *ac_tmp, *last_ac;
3476 struct ath_atx_tid *tid, *last_tid;
3477
3478 - if (work_pending(&sc->hw_reset_work) || list_empty(&txq->axq_acq) ||
3479 + if (test_bit(SC_OP_HW_RESET, &sc->sc_flags) ||
3480 + list_empty(&txq->axq_acq) ||
3481 txq->axq_ampdu_depth >= ATH_AGGR_MIN_QDEPTH)
3482 return;
3483
3484 @@ -1988,7 +2000,8 @@ int ath_tx_start(struct ieee80211_hw *hw
3485
3486 ath_txq_lock(sc, txq);
3487 if (txq == sc->tx.txq_map[q] &&
3488 - ++txq->pending_frames > ATH_MAX_QDEPTH && !txq->stopped) {
3489 + ++txq->pending_frames > sc->tx.txq_max_pending[q] &&
3490 + !txq->stopped) {
3491 ieee80211_stop_queue(sc->hw, q);
3492 txq->stopped = true;
3493 }
3494 @@ -2047,7 +2060,8 @@ static void ath_tx_complete(struct ath_s
3495 if (WARN_ON(--txq->pending_frames < 0))
3496 txq->pending_frames = 0;
3497
3498 - if (txq->stopped && txq->pending_frames < ATH_MAX_QDEPTH) {
3499 + if (txq->stopped &&
3500 + txq->pending_frames < sc->tx.txq_max_pending[q]) {
3501 ieee80211_wake_queue(sc->hw, q);
3502 txq->stopped = false;
3503 }
3504 @@ -2191,7 +2205,7 @@ static void ath_tx_processq(struct ath_s
3505
3506 ath_txq_lock(sc, txq);
3507 for (;;) {
3508 - if (work_pending(&sc->hw_reset_work))
3509 + if (test_bit(SC_OP_HW_RESET, &sc->sc_flags))
3510 break;
3511
3512 if (list_empty(&txq->axq_q)) {
3513 @@ -2274,7 +2288,7 @@ void ath_tx_edma_tasklet(struct ath_soft
3514 int status;
3515
3516 for (;;) {
3517 - if (work_pending(&sc->hw_reset_work))
3518 + if (test_bit(SC_OP_HW_RESET, &sc->sc_flags))
3519 break;
3520
3521 status = ath9k_hw_txprocdesc(ah, NULL, (void *)&ts);
3522 --- a/drivers/net/wireless/b43/xmit.c
3523 +++ b/drivers/net/wireless/b43/xmit.c
3524 @@ -663,7 +663,7 @@ void b43_rx(struct b43_wldev *dev, struc
3525 u32 uninitialized_var(macstat);
3526 u16 chanid;
3527 u16 phytype;
3528 - int padding;
3529 + int padding, rate_idx;
3530
3531 memset(&status, 0, sizeof(status));
3532
3533 @@ -766,16 +766,17 @@ void b43_rx(struct b43_wldev *dev, struc
3534 }
3535
3536 if (phystat0 & B43_RX_PHYST0_OFDM)
3537 - status.rate_idx = b43_plcp_get_bitrate_idx_ofdm(plcp,
3538 + rate_idx = b43_plcp_get_bitrate_idx_ofdm(plcp,
3539 phytype == B43_PHYTYPE_A);
3540 else
3541 - status.rate_idx = b43_plcp_get_bitrate_idx_cck(plcp);
3542 - if (unlikely(status.rate_idx == -1)) {
3543 + rate_idx = b43_plcp_get_bitrate_idx_cck(plcp);
3544 + if (unlikely(rate_idx == -1)) {
3545 /* PLCP seems to be corrupted.
3546 * Drop the frame, if we are not interested in corrupted frames. */
3547 if (!(dev->wl->filter_flags & FIF_PLCPFAIL))
3548 goto drop;
3549 }
3550 + status.rate_idx = rate_idx;
3551 status.antenna = !!(phystat0 & B43_RX_PHYST0_ANT);
3552
3553 /*
3554 --- a/drivers/net/wireless/libertas/cfg.c
3555 +++ b/drivers/net/wireless/libertas/cfg.c
3556 @@ -2182,13 +2182,15 @@ int lbs_reg_notifier(struct wiphy *wiphy
3557 struct regulatory_request *request)
3558 {
3559 struct lbs_private *priv = wiphy_priv(wiphy);
3560 - int ret;
3561 + int ret = 0;
3562
3563 lbs_deb_enter_args(LBS_DEB_CFG80211, "cfg80211 regulatory domain "
3564 "callback for domain %c%c\n", request->alpha2[0],
3565 request->alpha2[1]);
3566
3567 - ret = lbs_set_11d_domain_info(priv, request, wiphy->bands);
3568 + memcpy(priv->country_code, request->alpha2, sizeof(request->alpha2));
3569 + if (lbs_iface_active(priv))
3570 + ret = lbs_set_11d_domain_info(priv);
3571
3572 lbs_deb_leave(LBS_DEB_CFG80211);
3573 return ret;
3574 --- a/drivers/net/wireless/libertas/cmd.c
3575 +++ b/drivers/net/wireless/libertas/cmd.c
3576 @@ -733,15 +733,13 @@ int lbs_get_rssi(struct lbs_private *pri
3577 * to the firmware
3578 *
3579 * @priv: pointer to &struct lbs_private
3580 - * @request: cfg80211 regulatory request structure
3581 - * @bands: the device's supported bands and channels
3582 *
3583 * returns: 0 on success, error code on failure
3584 */
3585 -int lbs_set_11d_domain_info(struct lbs_private *priv,
3586 - struct regulatory_request *request,
3587 - struct ieee80211_supported_band **bands)
3588 +int lbs_set_11d_domain_info(struct lbs_private *priv)
3589 {
3590 + struct wiphy *wiphy = priv->wdev->wiphy;
3591 + struct ieee80211_supported_band **bands = wiphy->bands;
3592 struct cmd_ds_802_11d_domain_info cmd;
3593 struct mrvl_ie_domain_param_set *domain = &cmd.domain;
3594 struct ieee80211_country_ie_triplet *t;
3595 @@ -752,21 +750,23 @@ int lbs_set_11d_domain_info(struct lbs_p
3596 u8 first_channel = 0, next_chan = 0, max_pwr = 0;
3597 u8 i, flag = 0;
3598 size_t triplet_size;
3599 - int ret;
3600 + int ret = 0;
3601
3602 lbs_deb_enter(LBS_DEB_11D);
3603 + if (!priv->country_code[0])
3604 + goto out;
3605
3606 memset(&cmd, 0, sizeof(cmd));
3607 cmd.action = cpu_to_le16(CMD_ACT_SET);
3608
3609 lbs_deb_11d("Setting country code '%c%c'\n",
3610 - request->alpha2[0], request->alpha2[1]);
3611 + priv->country_code[0], priv->country_code[1]);
3612
3613 domain->header.type = cpu_to_le16(TLV_TYPE_DOMAIN);
3614
3615 /* Set country code */
3616 - domain->country_code[0] = request->alpha2[0];
3617 - domain->country_code[1] = request->alpha2[1];
3618 + domain->country_code[0] = priv->country_code[0];
3619 + domain->country_code[1] = priv->country_code[1];
3620 domain->country_code[2] = ' ';
3621
3622 /* Now set up the channel triplets; firmware is somewhat picky here
3623 @@ -848,6 +848,7 @@ int lbs_set_11d_domain_info(struct lbs_p
3624
3625 ret = lbs_cmd_with_response(priv, CMD_802_11D_DOMAIN_INFO, &cmd);
3626
3627 +out:
3628 lbs_deb_leave_args(LBS_DEB_11D, "ret %d", ret);
3629 return ret;
3630 }
3631 @@ -1019,9 +1020,9 @@ static void lbs_submit_command(struct lb
3632 if (ret) {
3633 netdev_info(priv->dev, "DNLD_CMD: hw_host_to_card failed: %d\n",
3634 ret);
3635 - /* Let the timer kick in and retry, and potentially reset
3636 - the whole thing if the condition persists */
3637 - timeo = HZ/4;
3638 + /* Reset dnld state machine, report failure */
3639 + priv->dnld_sent = DNLD_RES_RECEIVED;
3640 + lbs_complete_command(priv, cmdnode, ret);
3641 }
3642
3643 if (command == CMD_802_11_DEEP_SLEEP) {
3644 --- a/drivers/net/wireless/libertas/cmd.h
3645 +++ b/drivers/net/wireless/libertas/cmd.h
3646 @@ -128,9 +128,7 @@ int lbs_set_monitor_mode(struct lbs_priv
3647
3648 int lbs_get_rssi(struct lbs_private *priv, s8 *snr, s8 *nf);
3649
3650 -int lbs_set_11d_domain_info(struct lbs_private *priv,
3651 - struct regulatory_request *request,
3652 - struct ieee80211_supported_band **bands);
3653 +int lbs_set_11d_domain_info(struct lbs_private *priv);
3654
3655 int lbs_get_reg(struct lbs_private *priv, u16 reg, u16 offset, u32 *value);
3656
3657 --- a/drivers/net/wireless/libertas/dev.h
3658 +++ b/drivers/net/wireless/libertas/dev.h
3659 @@ -49,6 +49,7 @@ struct lbs_private {
3660 bool wiphy_registered;
3661 struct cfg80211_scan_request *scan_req;
3662 u8 assoc_bss[ETH_ALEN];
3663 + u8 country_code[IEEE80211_COUNTRY_STRING_LEN];
3664 u8 disassoc_reason;
3665
3666 /* Mesh */
3667 --- a/drivers/net/wireless/libertas/if_usb.c
3668 +++ b/drivers/net/wireless/libertas/if_usb.c
3669 @@ -311,7 +311,6 @@ static void if_usb_disconnect(struct usb
3670 cardp->surprise_removed = 1;
3671
3672 if (priv) {
3673 - priv->surpriseremoved = 1;
3674 lbs_stop_card(priv);
3675 lbs_remove_card(priv);
3676 }
3677 --- a/drivers/net/wireless/libertas/main.c
3678 +++ b/drivers/net/wireless/libertas/main.c
3679 @@ -154,6 +154,12 @@ int lbs_start_iface(struct lbs_private *
3680 goto err;
3681 }
3682
3683 + ret = lbs_set_11d_domain_info(priv);
3684 + if (ret) {
3685 + lbs_deb_net("set 11d domain info failed\n");
3686 + goto err;
3687 + }
3688 +
3689 lbs_update_channel(priv);
3690
3691 priv->iface_running = true;
3692 --- a/include/net/cfg80211.h
3693 +++ b/include/net/cfg80211.h
3694 @@ -1504,8 +1504,6 @@ struct cfg80211_gtk_rekey_data {
3695 * interfaces are active this callback should reject the configuration.
3696 * If no interfaces are active or the device is down, the channel should
3697 * be stored for when a monitor interface becomes active.
3698 - * @set_monitor_enabled: Notify driver that there are only monitor
3699 - * interfaces running.
3700 *
3701 * @scan: Request to do a scan. If returning zero, the scan request is given
3702 * the driver, and will be valid until passed to cfg80211_scan_done().
3703 @@ -1612,6 +1610,10 @@ struct cfg80211_gtk_rekey_data {
3704 * @get_et_strings: Ethtool API to get a set of strings to describe stats
3705 * and perhaps other supported types of ethtool data-sets.
3706 * See @ethtool_ops.get_strings
3707 + *
3708 + * @get_channel: Get the current operating channel for the virtual interface.
3709 + * For monitor interfaces, it should return %NULL unless there's a single
3710 + * current monitoring channel.
3711 */
3712 struct cfg80211_ops {
3713 int (*suspend)(struct wiphy *wiphy, struct cfg80211_wowlan *wow);
3714 @@ -1820,7 +1822,10 @@ struct cfg80211_ops {
3715 void (*get_et_strings)(struct wiphy *wiphy, struct net_device *dev,
3716 u32 sset, u8 *data);
3717
3718 - void (*set_monitor_enabled)(struct wiphy *wiphy, bool enabled);
3719 + struct ieee80211_channel *
3720 + (*get_channel)(struct wiphy *wiphy,
3721 + struct wireless_dev *wdev,
3722 + enum nl80211_channel_type *type);
3723 };
3724
3725 /*
3726 --- a/net/mac80211/agg-rx.c
3727 +++ b/net/mac80211/agg-rx.c
3728 @@ -203,6 +203,8 @@ static void ieee80211_send_addba_resp(st
3729 memcpy(mgmt->bssid, sdata->u.mgd.bssid, ETH_ALEN);
3730 else if (sdata->vif.type == NL80211_IFTYPE_ADHOC)
3731 memcpy(mgmt->bssid, sdata->u.ibss.bssid, ETH_ALEN);
3732 + else if (sdata->vif.type == NL80211_IFTYPE_WDS)
3733 + memcpy(mgmt->bssid, da, ETH_ALEN);
3734
3735 mgmt->frame_control = cpu_to_le16(IEEE80211_FTYPE_MGMT |
3736 IEEE80211_STYPE_ACTION);
3737 --- a/net/mac80211/agg-tx.c
3738 +++ b/net/mac80211/agg-tx.c
3739 @@ -81,7 +81,8 @@ static void ieee80211_send_addba_request
3740 memcpy(mgmt->sa, sdata->vif.addr, ETH_ALEN);
3741 if (sdata->vif.type == NL80211_IFTYPE_AP ||
3742 sdata->vif.type == NL80211_IFTYPE_AP_VLAN ||
3743 - sdata->vif.type == NL80211_IFTYPE_MESH_POINT)
3744 + sdata->vif.type == NL80211_IFTYPE_MESH_POINT ||
3745 + sdata->vif.type == NL80211_IFTYPE_WDS)
3746 memcpy(mgmt->bssid, sdata->vif.addr, ETH_ALEN);
3747 else if (sdata->vif.type == NL80211_IFTYPE_STATION)
3748 memcpy(mgmt->bssid, sdata->u.mgd.bssid, ETH_ALEN);
3749 @@ -460,6 +461,7 @@ int ieee80211_start_tx_ba_session(struct
3750 sdata->vif.type != NL80211_IFTYPE_MESH_POINT &&
3751 sdata->vif.type != NL80211_IFTYPE_AP_VLAN &&
3752 sdata->vif.type != NL80211_IFTYPE_AP &&
3753 + sdata->vif.type != NL80211_IFTYPE_WDS &&
3754 sdata->vif.type != NL80211_IFTYPE_ADHOC)
3755 return -EINVAL;
3756
3757 --- a/net/mac80211/cfg.c
3758 +++ b/net/mac80211/cfg.c
3759 @@ -2982,14 +2982,14 @@ static int ieee80211_probe_client(struct
3760 return 0;
3761 }
3762
3763 -static void ieee80211_set_monitor_enabled(struct wiphy *wiphy, bool enabled)
3764 +static struct ieee80211_channel *
3765 +ieee80211_cfg_get_channel(struct wiphy *wiphy, struct wireless_dev *wdev,
3766 + enum nl80211_channel_type *type)
3767 {
3768 struct ieee80211_local *local = wiphy_priv(wiphy);
3769
3770 - if (enabled)
3771 - WARN_ON(ieee80211_add_virtual_monitor(local));
3772 - else
3773 - ieee80211_del_virtual_monitor(local);
3774 + *type = local->_oper_channel_type;
3775 + return local->oper_channel;
3776 }
3777
3778 #ifdef CONFIG_PM
3779 @@ -3066,11 +3066,11 @@ struct cfg80211_ops mac80211_config_ops
3780 .tdls_mgmt = ieee80211_tdls_mgmt,
3781 .probe_client = ieee80211_probe_client,
3782 .set_noack_map = ieee80211_set_noack_map,
3783 - .set_monitor_enabled = ieee80211_set_monitor_enabled,
3784 #ifdef CONFIG_PM
3785 .set_wakeup = ieee80211_set_wakeup,
3786 #endif
3787 .get_et_sset_count = ieee80211_get_et_sset_count,
3788 .get_et_stats = ieee80211_get_et_stats,
3789 .get_et_strings = ieee80211_get_et_strings,
3790 + .get_channel = ieee80211_cfg_get_channel,
3791 };
3792 --- a/net/mac80211/debugfs_sta.c
3793 +++ b/net/mac80211/debugfs_sta.c
3794 @@ -63,11 +63,11 @@ static ssize_t sta_flags_read(struct fil
3795 test_sta_flag(sta, WLAN_STA_##flg) ? #flg "\n" : ""
3796
3797 int res = scnprintf(buf, sizeof(buf),
3798 - "%s%s%s%s%s%s%s%s%s%s%s%s%s%s%s%s%s%s%s%s",
3799 + "%s%s%s%s%s%s%s%s%s%s%s%s%s%s%s%s%s%s%s",
3800 TEST(AUTH), TEST(ASSOC), TEST(PS_STA),
3801 TEST(PS_DRIVER), TEST(AUTHORIZED),
3802 TEST(SHORT_PREAMBLE),
3803 - TEST(WME), TEST(WDS), TEST(CLEAR_PS_FILT),
3804 + TEST(WME), TEST(CLEAR_PS_FILT),
3805 TEST(MFP), TEST(BLOCK_BA), TEST(PSPOLL),
3806 TEST(UAPSD), TEST(SP), TEST(TDLS_PEER),
3807 TEST(TDLS_PEER_AUTH), TEST(4ADDR_EVENT),
3808 --- a/net/mac80211/ieee80211_i.h
3809 +++ b/net/mac80211/ieee80211_i.h
3810 @@ -1496,10 +1496,6 @@ int ieee80211_add_srates_ie(struct ieee8
3811 int ieee80211_add_ext_srates_ie(struct ieee80211_sub_if_data *sdata,
3812 struct sk_buff *skb, bool need_basic);
3813
3814 -/* virtual monitor */
3815 -int ieee80211_add_virtual_monitor(struct ieee80211_local *local);
3816 -void ieee80211_del_virtual_monitor(struct ieee80211_local *local);
3817 -
3818 /* channel management */
3819 enum ieee80211_chan_mode {
3820 CHAN_MODE_UNDEFINED,
3821 --- a/net/mac80211/iface.c
3822 +++ b/net/mac80211/iface.c
3823 @@ -331,7 +331,7 @@ static void ieee80211_set_default_queues
3824 sdata->vif.cab_queue = IEEE80211_INVAL_HW_QUEUE;
3825 }
3826
3827 -int ieee80211_add_virtual_monitor(struct ieee80211_local *local)
3828 +static int ieee80211_add_virtual_monitor(struct ieee80211_local *local)
3829 {
3830 struct ieee80211_sub_if_data *sdata;
3831 int ret = 0;
3832 @@ -377,7 +377,7 @@ int ieee80211_add_virtual_monitor(struct
3833 return ret;
3834 }
3835
3836 -void ieee80211_del_virtual_monitor(struct ieee80211_local *local)
3837 +static void ieee80211_del_virtual_monitor(struct ieee80211_local *local)
3838 {
3839 struct ieee80211_sub_if_data *sdata;
3840
3841 @@ -410,7 +410,6 @@ static int ieee80211_do_open(struct net_
3842 {
3843 struct ieee80211_sub_if_data *sdata = IEEE80211_DEV_TO_SUB_IF(dev);
3844 struct ieee80211_local *local = sdata->local;
3845 - struct sta_info *sta;
3846 u32 changed = 0;
3847 int res;
3848 u32 hw_reconf_flags = 0;
3849 @@ -497,6 +496,12 @@ static int ieee80211_do_open(struct net_
3850 break;
3851 }
3852
3853 + if (local->monitors == 0 && local->open_count == 0) {
3854 + res = ieee80211_add_virtual_monitor(local);
3855 + if (res)
3856 + goto err_stop;
3857 + }
3858 +
3859 /* must be before the call to ieee80211_configure_filter */
3860 local->monitors++;
3861 if (local->monitors == 1) {
3862 @@ -511,6 +516,8 @@ static int ieee80211_do_open(struct net_
3863 break;
3864 default:
3865 if (coming_up) {
3866 + ieee80211_del_virtual_monitor(local);
3867 +
3868 res = drv_add_interface(local, sdata);
3869 if (res)
3870 goto err_stop;
3871 @@ -548,28 +555,6 @@ static int ieee80211_do_open(struct net_
3872
3873 set_bit(SDATA_STATE_RUNNING, &sdata->state);
3874
3875 - if (sdata->vif.type == NL80211_IFTYPE_WDS) {
3876 - /* Create STA entry for the WDS peer */
3877 - sta = sta_info_alloc(sdata, sdata->u.wds.remote_addr,
3878 - GFP_KERNEL);
3879 - if (!sta) {
3880 - res = -ENOMEM;
3881 - goto err_del_interface;
3882 - }
3883 -
3884 - sta_info_pre_move_state(sta, IEEE80211_STA_AUTH);
3885 - sta_info_pre_move_state(sta, IEEE80211_STA_ASSOC);
3886 - sta_info_pre_move_state(sta, IEEE80211_STA_AUTHORIZED);
3887 -
3888 - res = sta_info_insert(sta);
3889 - if (res) {
3890 - /* STA has been freed */
3891 - goto err_del_interface;
3892 - }
3893 -
3894 - rate_control_rate_init(sta);
3895 - }
3896 -
3897 /*
3898 * set_multicast_list will be invoked by the networking core
3899 * which will check whether any increments here were done in
3900 @@ -750,6 +735,7 @@ static void ieee80211_do_stop(struct iee
3901 if (local->monitors == 0) {
3902 local->hw.conf.flags &= ~IEEE80211_CONF_MONITOR;
3903 hw_reconf_flags |= IEEE80211_CONF_CHANGE_MONITOR;
3904 + ieee80211_del_virtual_monitor(local);
3905 }
3906
3907 ieee80211_adjust_monitor_flags(sdata, -1);
3908 @@ -823,6 +809,9 @@ static void ieee80211_do_stop(struct iee
3909 }
3910 }
3911 spin_unlock_irqrestore(&local->queue_stop_reason_lock, flags);
3912 +
3913 + if (local->monitors == local->open_count && local->monitors > 0)
3914 + ieee80211_add_virtual_monitor(local);
3915 }
3916
3917 static int ieee80211_stop(struct net_device *dev)
3918 @@ -959,6 +948,72 @@ static void ieee80211_if_setup(struct ne
3919 dev->destructor = free_netdev;
3920 }
3921
3922 +static void ieee80211_wds_rx_queued_mgmt(struct ieee80211_sub_if_data *sdata,
3923 + struct sk_buff *skb)
3924 +{
3925 + struct ieee80211_local *local = sdata->local;
3926 + struct ieee80211_rx_status *rx_status;
3927 + struct ieee802_11_elems elems;
3928 + struct ieee80211_mgmt *mgmt;
3929 + struct sta_info *sta;
3930 + size_t baselen;
3931 + u32 rates = 0;
3932 + u16 stype;
3933 + bool new = false;
3934 + enum ieee80211_band band = local->hw.conf.channel->band;
3935 + struct ieee80211_supported_band *sband = local->hw.wiphy->bands[band];
3936 +
3937 + rx_status = IEEE80211_SKB_RXCB(skb);
3938 + mgmt = (struct ieee80211_mgmt *) skb->data;
3939 + stype = le16_to_cpu(mgmt->frame_control) & IEEE80211_FCTL_STYPE;
3940 +
3941 + if (stype != IEEE80211_STYPE_BEACON)
3942 + return;
3943 +
3944 + baselen = (u8 *) mgmt->u.probe_resp.variable - (u8 *) mgmt;
3945 + if (baselen > skb->len)
3946 + return;
3947 +
3948 + ieee802_11_parse_elems(mgmt->u.probe_resp.variable,
3949 + skb->len - baselen, &elems);
3950 +
3951 + rates = ieee80211_sta_get_rates(local, &elems, band, NULL);
3952 +
3953 + rcu_read_lock();
3954 +
3955 + sta = sta_info_get(sdata, sdata->u.wds.remote_addr);
3956 +
3957 + if (!sta) {
3958 + rcu_read_unlock();
3959 + sta = sta_info_alloc(sdata, sdata->u.wds.remote_addr,
3960 + GFP_KERNEL);
3961 + if (!sta)
3962 + return;
3963 +
3964 + new = true;
3965 + }
3966 +
3967 + sta->last_rx = jiffies;
3968 + sta->sta.supp_rates[local->hw.conf.channel->band] = rates;
3969 +
3970 + if (elems.ht_cap_elem)
3971 + ieee80211_ht_cap_ie_to_sta_ht_cap(sdata, sband,
3972 + elems.ht_cap_elem, &sta->sta.ht_cap);
3973 +
3974 + if (elems.wmm_param)
3975 + set_sta_flag(sta, WLAN_STA_WME);
3976 +
3977 + if (new) {
3978 + sta_info_pre_move_state(sta, IEEE80211_STA_AUTH);
3979 + sta_info_pre_move_state(sta, IEEE80211_STA_ASSOC);
3980 + sta_info_pre_move_state(sta, IEEE80211_STA_AUTHORIZED);
3981 + rate_control_rate_init(sta);
3982 + sta_info_insert_rcu(sta);
3983 + }
3984 +
3985 + rcu_read_unlock();
3986 +}
3987 +
3988 static void ieee80211_iface_work(struct work_struct *work)
3989 {
3990 struct ieee80211_sub_if_data *sdata =
3991 @@ -1063,6 +1118,9 @@ static void ieee80211_iface_work(struct
3992 break;
3993 ieee80211_mesh_rx_queued_mgmt(sdata, skb);
3994 break;
3995 + case NL80211_IFTYPE_WDS:
3996 + ieee80211_wds_rx_queued_mgmt(sdata, skb);
3997 + break;
3998 default:
3999 WARN(1, "frame for unexpected interface type");
4000 break;
4001 --- a/net/mac80211/offchannel.c
4002 +++ b/net/mac80211/offchannel.c
4003 @@ -324,6 +324,7 @@ void ieee80211_sw_roc_work(struct work_s
4004 container_of(work, struct ieee80211_roc_work, work.work);
4005 struct ieee80211_sub_if_data *sdata = roc->sdata;
4006 struct ieee80211_local *local = sdata->local;
4007 + bool started;
4008
4009 mutex_lock(&local->mtx);
4010
4011 @@ -366,9 +367,10 @@ void ieee80211_sw_roc_work(struct work_s
4012 /* finish this ROC */
4013 finish:
4014 list_del(&roc->list);
4015 + started = roc->started;
4016 ieee80211_roc_notify_destroy(roc);
4017
4018 - if (roc->started) {
4019 + if (started) {
4020 drv_flush(local, false);
4021
4022 local->tmp_channel = NULL;
4023 @@ -379,7 +381,7 @@ void ieee80211_sw_roc_work(struct work_s
4024
4025 ieee80211_recalc_idle(local);
4026
4027 - if (roc->started)
4028 + if (started)
4029 ieee80211_start_next_roc(local);
4030 }
4031
4032 --- a/net/mac80211/rx.c
4033 +++ b/net/mac80211/rx.c
4034 @@ -2239,6 +2239,7 @@ ieee80211_rx_h_action(struct ieee80211_r
4035 sdata->vif.type != NL80211_IFTYPE_MESH_POINT &&
4036 sdata->vif.type != NL80211_IFTYPE_AP_VLAN &&
4037 sdata->vif.type != NL80211_IFTYPE_AP &&
4038 + sdata->vif.type != NL80211_IFTYPE_WDS &&
4039 sdata->vif.type != NL80211_IFTYPE_ADHOC)
4040 break;
4041
4042 @@ -2456,14 +2457,15 @@ ieee80211_rx_h_mgmt(struct ieee80211_rx_
4043
4044 if (!ieee80211_vif_is_mesh(&sdata->vif) &&
4045 sdata->vif.type != NL80211_IFTYPE_ADHOC &&
4046 - sdata->vif.type != NL80211_IFTYPE_STATION)
4047 + sdata->vif.type != NL80211_IFTYPE_STATION &&
4048 + sdata->vif.type != NL80211_IFTYPE_WDS)
4049 return RX_DROP_MONITOR;
4050
4051 switch (stype) {
4052 case cpu_to_le16(IEEE80211_STYPE_AUTH):
4053 case cpu_to_le16(IEEE80211_STYPE_BEACON):
4054 case cpu_to_le16(IEEE80211_STYPE_PROBE_RESP):
4055 - /* process for all: mesh, mlme, ibss */
4056 + /* process for all: mesh, mlme, ibss, wds */
4057 break;
4058 case cpu_to_le16(IEEE80211_STYPE_ASSOC_RESP):
4059 case cpu_to_le16(IEEE80211_STYPE_REASSOC_RESP):
4060 @@ -2788,10 +2790,16 @@ static int prepare_for_handlers(struct i
4061 }
4062 break;
4063 case NL80211_IFTYPE_WDS:
4064 - if (bssid || !ieee80211_is_data(hdr->frame_control))
4065 - return 0;
4066 if (!ether_addr_equal(sdata->u.wds.remote_addr, hdr->addr2))
4067 return 0;
4068 +
4069 + if (ieee80211_is_data(hdr->frame_control) ||
4070 + ieee80211_is_action(hdr->frame_control)) {
4071 + if (compare_ether_addr(sdata->vif.addr, hdr->addr1))
4072 + return 0;
4073 + } else if (!ieee80211_is_beacon(hdr->frame_control))
4074 + return 0;
4075 +
4076 break;
4077 default:
4078 /* should never get here */
4079 --- a/net/mac80211/sta_info.h
4080 +++ b/net/mac80211/sta_info.h
4081 @@ -32,7 +32,6 @@
4082 * @WLAN_STA_SHORT_PREAMBLE: Station is capable of receiving short-preamble
4083 * frames.
4084 * @WLAN_STA_WME: Station is a QoS-STA.
4085 - * @WLAN_STA_WDS: Station is one of our WDS peers.
4086 * @WLAN_STA_CLEAR_PS_FILT: Clear PS filter in hardware (using the
4087 * IEEE80211_TX_CTL_CLEAR_PS_FILT control flag) when the next
4088 * frame to this station is transmitted.
4089 @@ -64,7 +63,6 @@ enum ieee80211_sta_info_flags {
4090 WLAN_STA_AUTHORIZED,
4091 WLAN_STA_SHORT_PREAMBLE,
4092 WLAN_STA_WME,
4093 - WLAN_STA_WDS,
4094 WLAN_STA_CLEAR_PS_FILT,
4095 WLAN_STA_MFP,
4096 WLAN_STA_BLOCK_BA,
4097 --- a/net/wireless/chan.c
4098 +++ b/net/wireless/chan.c
4099 @@ -82,7 +82,6 @@ int cfg80211_set_monitor_channel(struct
4100 int freq, enum nl80211_channel_type chantype)
4101 {
4102 struct ieee80211_channel *chan;
4103 - int err;
4104
4105 if (!rdev->ops->set_monitor_channel)
4106 return -EOPNOTSUPP;
4107 @@ -93,13 +92,7 @@ int cfg80211_set_monitor_channel(struct
4108 if (!chan)
4109 return -EINVAL;
4110
4111 - err = rdev->ops->set_monitor_channel(&rdev->wiphy, chan, chantype);
4112 - if (!err) {
4113 - rdev->monitor_channel = chan;
4114 - rdev->monitor_channel_type = chantype;
4115 - }
4116 -
4117 - return err;
4118 + return rdev->ops->set_monitor_channel(&rdev->wiphy, chan, chantype);
4119 }
4120
4121 void
4122 @@ -134,9 +127,16 @@ cfg80211_get_chan_state(struct wireless_
4123 break;
4124 case NL80211_IFTYPE_AP:
4125 case NL80211_IFTYPE_P2P_GO:
4126 + if (wdev->beacon_interval) {
4127 + *chan = wdev->channel;
4128 + *chanmode = CHAN_MODE_SHARED;
4129 + }
4130 + return;
4131 case NL80211_IFTYPE_MESH_POINT:
4132 - *chan = wdev->channel;
4133 - *chanmode = CHAN_MODE_SHARED;
4134 + if (wdev->mesh_id_len) {
4135 + *chan = wdev->channel;
4136 + *chanmode = CHAN_MODE_SHARED;