mac80211: add initial support for AR9330
[openwrt/svn-archive/archive.git] / package / mac80211 / patches / 545-ath9k-initialize-mode-registers-for-AR9330.patch
1 diff --git a/drivers/net/wireless/ath/ath9k/ar9003_hw.c b/drivers/net/wireless/ath/ath9k/ar9003_hw.c
2 index 392bf0f..dc0ad4a 100644
3 --- a/drivers/net/wireless/ath/ath9k/ar9003_hw.c
4 +++ b/drivers/net/wireless/ath/ath9k/ar9003_hw.c
5 @@ -19,6 +19,8 @@
6 #include "ar9003_2p2_initvals.h"
7 #include "ar9485_initvals.h"
8 #include "ar9340_initvals.h"
9 +#include "ar9330_1p1_initvals.h"
10 +#include "ar9330_1p2_initvals.h"
11
12 /* General hardware code for the AR9003 hadware family */
13
14 @@ -29,7 +31,113 @@
15 */
16 static void ar9003_hw_init_mode_regs(struct ath_hw *ah)
17 {
18 - if (AR_SREV_9340(ah)) {
19 + if (AR_SREV_9330_11(ah)) {
20 + /* mac */
21 + INIT_INI_ARRAY(&ah->iniMac[ATH_INI_PRE], NULL, 0, 0);
22 + INIT_INI_ARRAY(&ah->iniMac[ATH_INI_CORE],
23 + ar9331_1p1_mac_core,
24 + ARRAY_SIZE(ar9331_1p1_mac_core), 2);
25 + INIT_INI_ARRAY(&ah->iniMac[ATH_INI_POST],
26 + ar9331_1p1_mac_postamble,
27 + ARRAY_SIZE(ar9331_1p1_mac_postamble), 5);
28 +
29 + /* bb */
30 + INIT_INI_ARRAY(&ah->iniBB[ATH_INI_PRE], NULL, 0, 0);
31 + INIT_INI_ARRAY(&ah->iniBB[ATH_INI_CORE],
32 + ar9331_1p1_baseband_core,
33 + ARRAY_SIZE(ar9331_1p1_baseband_core), 2);
34 + INIT_INI_ARRAY(&ah->iniBB[ATH_INI_POST],
35 + ar9331_1p1_baseband_postamble,
36 + ARRAY_SIZE(ar9331_1p1_baseband_postamble), 5);
37 +
38 + /* radio */
39 + INIT_INI_ARRAY(&ah->iniRadio[ATH_INI_PRE], NULL, 0, 0);
40 + INIT_INI_ARRAY(&ah->iniRadio[ATH_INI_CORE],
41 + ar9331_1p1_radio_core,
42 + ARRAY_SIZE(ar9331_1p1_radio_core), 2);
43 + INIT_INI_ARRAY(&ah->iniRadio[ATH_INI_POST], NULL, 0, 0);
44 +
45 + /* soc */
46 + INIT_INI_ARRAY(&ah->iniSOC[ATH_INI_PRE],
47 + ar9331_1p1_soc_preamble,
48 + ARRAY_SIZE(ar9331_1p1_soc_preamble), 2);
49 + INIT_INI_ARRAY(&ah->iniSOC[ATH_INI_CORE], NULL, 0, 0);
50 + INIT_INI_ARRAY(&ah->iniSOC[ATH_INI_POST],
51 + ar9331_1p1_soc_postamble,
52 + ARRAY_SIZE(ar9331_1p1_soc_postamble), 2);
53 +
54 + /* rx/tx gain */
55 + INIT_INI_ARRAY(&ah->iniModesRxGain,
56 + ar9331_common_rx_gain_1p1,
57 + ARRAY_SIZE(ar9331_common_rx_gain_1p1), 2);
58 + INIT_INI_ARRAY(&ah->iniModesTxGain,
59 + ar9331_modes_lowest_ob_db_tx_gain_1p1,
60 + ARRAY_SIZE(ar9331_modes_lowest_ob_db_tx_gain_1p1),
61 + 5);
62 +
63 + /* additional clock settings */
64 + if (ah->is_clk_25mhz)
65 + INIT_INI_ARRAY(&ah->iniModesAdditional,
66 + ar9331_1p1_xtal_25M,
67 + ARRAY_SIZE(ar9331_1p1_xtal_25M), 2);
68 + else
69 + INIT_INI_ARRAY(&ah->iniModesAdditional,
70 + ar9331_1p1_xtal_40M,
71 + ARRAY_SIZE(ar9331_1p1_xtal_40M), 2);
72 + } else if (AR_SREV_9330_12(ah)) {
73 + /* mac */
74 + INIT_INI_ARRAY(&ah->iniMac[ATH_INI_PRE], NULL, 0, 0);
75 + INIT_INI_ARRAY(&ah->iniMac[ATH_INI_CORE],
76 + ar9331_1p2_mac_core,
77 + ARRAY_SIZE(ar9331_1p2_mac_core), 2);
78 + INIT_INI_ARRAY(&ah->iniMac[ATH_INI_POST],
79 + ar9331_1p2_mac_postamble,
80 + ARRAY_SIZE(ar9331_1p2_mac_postamble), 5);
81 +
82 + /* bb */
83 + INIT_INI_ARRAY(&ah->iniBB[ATH_INI_PRE], NULL, 0, 0);
84 + INIT_INI_ARRAY(&ah->iniBB[ATH_INI_CORE],
85 + ar9331_1p2_baseband_core,
86 + ARRAY_SIZE(ar9331_1p2_baseband_core), 2);
87 + INIT_INI_ARRAY(&ah->iniBB[ATH_INI_POST],
88 + ar9331_1p2_baseband_postamble,
89 + ARRAY_SIZE(ar9331_1p2_baseband_postamble), 5);
90 +
91 + /* radio */
92 + INIT_INI_ARRAY(&ah->iniRadio[ATH_INI_PRE], NULL, 0, 0);
93 + INIT_INI_ARRAY(&ah->iniRadio[ATH_INI_CORE],
94 + ar9331_1p2_radio_core,
95 + ARRAY_SIZE(ar9331_1p2_radio_core), 2);
96 + INIT_INI_ARRAY(&ah->iniRadio[ATH_INI_POST], NULL, 0, 0);
97 +
98 + /* soc */
99 + INIT_INI_ARRAY(&ah->iniSOC[ATH_INI_PRE],
100 + ar9331_1p2_soc_preamble,
101 + ARRAY_SIZE(ar9331_1p2_soc_preamble), 2);
102 + INIT_INI_ARRAY(&ah->iniSOC[ATH_INI_CORE], NULL, 0, 0);
103 + INIT_INI_ARRAY(&ah->iniSOC[ATH_INI_POST],
104 + ar9331_1p2_soc_postamble,
105 + ARRAY_SIZE(ar9331_1p2_soc_postamble), 2);
106 +
107 + /* rx/tx gain */
108 + INIT_INI_ARRAY(&ah->iniModesRxGain,
109 + ar9331_common_rx_gain_1p2,
110 + ARRAY_SIZE(ar9331_common_rx_gain_1p2), 2);
111 + INIT_INI_ARRAY(&ah->iniModesTxGain,
112 + ar9331_modes_lowest_ob_db_tx_gain_1p2,
113 + ARRAY_SIZE(ar9331_modes_lowest_ob_db_tx_gain_1p2),
114 + 5);
115 +
116 + /* additional clock settings */
117 + if (ah->is_clk_25mhz)
118 + INIT_INI_ARRAY(&ah->iniModesAdditional,
119 + ar9331_1p2_xtal_25M,
120 + ARRAY_SIZE(ar9331_1p2_xtal_25M), 2);
121 + else
122 + INIT_INI_ARRAY(&ah->iniModesAdditional,
123 + ar9331_1p2_xtal_40M,
124 + ARRAY_SIZE(ar9331_1p2_xtal_40M), 2);
125 + } else if (AR_SREV_9340(ah)) {
126 /* mac */
127 INIT_INI_ARRAY(&ah->iniMac[ATH_INI_PRE], NULL, 0, 0);
128 INIT_INI_ARRAY(&ah->iniMac[ATH_INI_CORE],
129 diff --git a/drivers/net/wireless/ath/ath9k/ar9003_phy.c b/drivers/net/wireless/ath/ath9k/ar9003_phy.c
130 index 892c48b..48893f1 100644
131 --- a/drivers/net/wireless/ath/ath9k/ar9003_phy.c
132 +++ b/drivers/net/wireless/ath/ath9k/ar9003_phy.c
133 @@ -659,6 +659,9 @@ static int ar9003_hw_process_ini(struct ath_hw *ah,
134 REG_WRITE_ARRAY(&ah->iniModesAdditional,
135 modesIndex, regWrites);
136
137 + if (AR_SREV_9300(ah))
138 + REG_WRITE_ARRAY(&ah->iniModesAdditional, 1, regWrites);
139 +
140 if (AR_SREV_9340(ah) && !ah->is_clk_25mhz)
141 REG_WRITE_ARRAY(&ah->iniModesAdditional_40M, 1, regWrites);
142