package/mac80211/patches/551-ath9k_isr_optimization.patch

   1 --- a/drivers/net/wireless/ath/ath9k/ar9002_mac.c
   2 +++ b/drivers/net/wireless/ath/ath9k/ar9002_mac.c
   3 @@ -90,13 +90,10 @@ static bool ar9002_hw_get_isr(struct ath
   4
   5                 *masked = isr & ATH9K_INT_COMMON;
   6
   7 -               if (ah->config.rx_intr_mitigation) {
   8 -                       if (isr & (AR_ISR_RXMINTR | AR_ISR_RXINTM))
   9 -                               *masked |= ATH9K_INT_RX;
  10 -               }
  11 -
  12 -               if (isr & (AR_ISR_RXOK | AR_ISR_RXERR))
  13 +               if (isr & (AR_ISR_RXMINTR | AR_ISR_RXINTM |
  14 +                          AR_ISR_RXOK | AR_ISR_RXERR))
  15                         *masked |= ATH9K_INT_RX;
  16 +
  17                 if (isr &
  18                     (AR_ISR_TXOK | AR_ISR_TXDESC | AR_ISR_TXERR |
  19                      AR_ISR_TXEOL)) {
  20 @@ -118,14 +115,6 @@ static bool ar9002_hw_get_isr(struct ath
  21                                   "receive FIFO overrun interrupt\n");
  22                 }
  23
  24 -               if (!AR_SREV_9100(ah)) {
  25 -                       if (!(pCap->hw_caps & ATH9K_HW_CAP_AUTOSLEEP)) {
  26 -                               u32 isr5 = REG_READ(ah, AR_ISR_S5_S);
  27 -                               if (isr5 & AR_ISR_S5_TIM_TIMER)
  28 -                                       *masked |= ATH9K_INT_TIM_TIMER;
  29 -                       }
  30 -               }
  31 -
  32                 *masked |= mask2;
  33         }
  34
  35 @@ -136,17 +125,18 @@ static bool ar9002_hw_get_isr(struct ath
  36                 u32 s5_s;
  37
  38                 s5_s = REG_READ(ah, AR_ISR_S5_S);
  39 -               if (isr & AR_ISR_GENTMR) {
  40 -                       ah->intr_gen_timer_trigger =
  41 +               ah->intr_gen_timer_trigger =
  42                                 MS(s5_s, AR_ISR_S5_GENTIMER_TRIG);
  43
  44 -                       ah->intr_gen_timer_thresh =
  45 -                               MS(s5_s, AR_ISR_S5_GENTIMER_THRESH);
  46 +               ah->intr_gen_timer_thresh =
  47 +                       MS(s5_s, AR_ISR_S5_GENTIMER_THRESH);
  48
  49 -                       if (ah->intr_gen_timer_trigger)
  50 -                               *masked |= ATH9K_INT_GENTIMER;
  51 +               if (ah->intr_gen_timer_trigger)
  52 +                       *masked |= ATH9K_INT_GENTIMER;
  53
  54 -               }
  55 +               if ((s5_s & AR_ISR_S5_TIM_TIMER) &&
  56 +                   !(pCap->hw_caps & ATH9K_HW_CAP_AUTOSLEEP))
  57 +                       *masked |= ATH9K_INT_TIM_TIMER;
  58         }
  59
  60         if (sync_cause) {