ath9k: fold patches that were merged upstream into 300-pending_work.patch
[openwrt/svn-archive/archive.git] / package / mac80211 / patches / 552-ath9k_remove_tx_indexoffset.patch
1 --- a/drivers/net/wireless/ath/ath9k/eeprom_4k.c
2 +++ b/drivers/net/wireless/ath/ath9k/eeprom_4k.c
3 @@ -247,8 +247,7 @@ static u32 ath9k_hw_4k_get_eeprom(struct
4 }
5
6 static void ath9k_hw_set_4k_power_cal_table(struct ath_hw *ah,
7 - struct ath9k_channel *chan,
8 - int16_t *pTxPowerIndexOffset)
9 + struct ath9k_channel *chan)
10 {
11 struct ath_common *common = ath9k_hw_common(ah);
12 struct ar5416_eeprom_4k *pEepData = &ah->eeprom.map4k;
13 @@ -358,8 +357,6 @@ static void ath9k_hw_set_4k_power_cal_ta
14 REGWRITE_BUFFER_FLUSH(ah);
15 }
16 }
17 -
18 - *pTxPowerIndexOffset = 0;
19 }
20
21 static void ath9k_hw_set_4k_power_per_rate_table(struct ath_hw *ah,
22 @@ -582,7 +579,6 @@ static void ath9k_hw_4k_set_txpower(stru
23 struct ar5416_eeprom_4k *pEepData = &ah->eeprom.map4k;
24 struct modal_eep_4k_header *pModal = &pEepData->modalHeader;
25 int16_t ratesArray[Ar5416RateSize];
26 - int16_t txPowerIndexOffset = 0;
27 u8 ht40PowerIncForPdadc = 2;
28 int i;
29
30 @@ -599,11 +595,10 @@ static void ath9k_hw_4k_set_txpower(stru
31 twiceMaxRegulatoryPower,
32 powerLimit);
33
34 - ath9k_hw_set_4k_power_cal_table(ah, chan, &txPowerIndexOffset);
35 + ath9k_hw_set_4k_power_cal_table(ah, chan);
36
37 regulatory->max_power_level = 0;
38 for (i = 0; i < ARRAY_SIZE(ratesArray); i++) {
39 - ratesArray[i] = (int16_t)(txPowerIndexOffset + ratesArray[i]);
40 if (ratesArray[i] > MAX_RATE_POWER)
41 ratesArray[i] = MAX_RATE_POWER;
42
43 --- a/drivers/net/wireless/ath/ath9k/eeprom_9287.c
44 +++ b/drivers/net/wireless/ath/ath9k/eeprom_9287.c
45 @@ -306,8 +306,7 @@ static void ar9287_eeprom_olpc_set_pdadc
46 }
47
48 static void ath9k_hw_set_ar9287_power_cal_table(struct ath_hw *ah,
49 - struct ath9k_channel *chan,
50 - int16_t *pTxPowerIndexOffset)
51 + struct ath9k_channel *chan)
52 {
53 struct cal_data_per_freq_ar9287 *pRawDataset;
54 struct cal_data_op_loop_ar9287 *pRawDatasetOpenLoop;
55 @@ -446,8 +445,6 @@ static void ath9k_hw_set_ar9287_power_ca
56 REGWRITE_BUFFER_FLUSH(ah);
57 }
58 }
59 -
60 - *pTxPowerIndexOffset = 0;
61 }
62
63 static void ath9k_hw_set_ar9287_power_per_rate_table(struct ath_hw *ah,
64 @@ -722,7 +719,6 @@ static void ath9k_hw_ar9287_set_txpower(
65 struct ar9287_eeprom *pEepData = &ah->eeprom.map9287;
66 struct modal_eep_ar9287_header *pModal = &pEepData->modalHeader;
67 int16_t ratesArray[Ar5416RateSize];
68 - int16_t txPowerIndexOffset = 0;
69 u8 ht40PowerIncForPdadc = 2;
70 int i;
71
72 @@ -738,11 +734,10 @@ static void ath9k_hw_ar9287_set_txpower(
73 twiceMaxRegulatoryPower,
74 powerLimit);
75
76 - ath9k_hw_set_ar9287_power_cal_table(ah, chan, &txPowerIndexOffset);
77 + ath9k_hw_set_ar9287_power_cal_table(ah, chan);
78
79 regulatory->max_power_level = 0;
80 for (i = 0; i < ARRAY_SIZE(ratesArray); i++) {
81 - ratesArray[i] = (int16_t)(txPowerIndexOffset + ratesArray[i]);
82 if (ratesArray[i] > MAX_RATE_POWER)
83 ratesArray[i] = MAX_RATE_POWER;
84
85 --- a/drivers/net/wireless/ath/ath9k/eeprom_def.c
86 +++ b/drivers/net/wireless/ath/ath9k/eeprom_def.c
87 @@ -692,8 +692,7 @@ static void ath9k_adjust_pdadc_values(st
88 }
89
90 static void ath9k_hw_set_def_power_cal_table(struct ath_hw *ah,
91 - struct ath9k_channel *chan,
92 - int16_t *pTxPowerIndexOffset)
93 + struct ath9k_channel *chan)
94 {
95 #define SM_PD_GAIN(x) SM(0x38, AR_PHY_TPCRG5_PD_GAIN_BOUNDARY_##x)
96 #define SM_PDGAIN_B(x, y) \
97 @@ -857,7 +856,6 @@ static void ath9k_hw_set_def_power_cal_t
98 }
99 }
100
101 - *pTxPowerIndexOffset = 0;
102 #undef SM_PD_GAIN
103 #undef SM_PDGAIN_B
104 }
105 @@ -1145,7 +1143,6 @@ static void ath9k_hw_def_set_txpower(str
106 struct modal_eep_header *pModal =
107 &(pEepData->modalHeader[IS_CHAN_2GHZ(chan)]);
108 int16_t ratesArray[Ar5416RateSize];
109 - int16_t txPowerIndexOffset = 0;
110 u8 ht40PowerIncForPdadc = 2;
111 int i, cck_ofdm_delta = 0;
112
113 @@ -1162,11 +1159,10 @@ static void ath9k_hw_def_set_txpower(str
114 twiceMaxRegulatoryPower,
115 powerLimit);
116
117 - ath9k_hw_set_def_power_cal_table(ah, chan, &txPowerIndexOffset);
118 + ath9k_hw_set_def_power_cal_table(ah, chan);
119
120 regulatory->max_power_level = 0;
121 for (i = 0; i < ARRAY_SIZE(ratesArray); i++) {
122 - ratesArray[i] = (int16_t)(txPowerIndexOffset + ratesArray[i]);
123 if (ratesArray[i] > MAX_RATE_POWER)
124 ratesArray[i] = MAX_RATE_POWER;
125 if (ratesArray[i] > regulatory->max_power_level)