[mac80211] add support for Rt3352 in rt2x00 driver
[openwrt/svn-archive/archive.git] / package / mac80211 / patches / 620-rt2x00-support-rt3352.patch
1 --- a/drivers/net/wireless/rt2x00/rt2800lib.c
2 +++ b/drivers/net/wireless/rt2x00/rt2800lib.c
3 @@ -1547,6 +1547,7 @@ void rt2800_config_ant(struct rt2x00_dev
4 case 1:
5 if (rt2x00_rt(rt2x00dev, RT3070) ||
6 rt2x00_rt(rt2x00dev, RT3090) ||
7 + rt2x00_rt(rt2x00dev, RT3352) ||
8 rt2x00_rt(rt2x00dev, RT3390)) {
9 rt2x00_eeprom_read(rt2x00dev,
10 EEPROM_NIC_CONF1, &eeprom);
11 @@ -1985,6 +1986,58 @@ static void rt2800_config_channel_rf3290
12 }
13 }
14
15 +static void rt2800_config_channel_rf3322(struct rt2x00_dev *rt2x00dev,
16 + struct ieee80211_conf *conf,
17 + struct rf_channel *rf,
18 + struct channel_info *info)
19 +{
20 + u8 rfcsr;
21 +
22 + rt2800_rfcsr_write(rt2x00dev, 8, rf->rf1);
23 + rt2800_rfcsr_write(rt2x00dev, 9, rf->rf3);
24 +
25 + rt2800_rfcsr_write(rt2x00dev, 11, 0x42);
26 + rt2800_rfcsr_write(rt2x00dev, 12, 0x1C);
27 + rt2800_rfcsr_write(rt2x00dev, 13, 0x00);
28 +
29 + if (info->default_power1 > POWER_BOUND)
30 + rt2800_rfcsr_write(rt2x00dev, 47, POWER_BOUND);
31 + else
32 + rt2800_rfcsr_write(rt2x00dev, 47, info->default_power1);
33 +
34 + if (info->default_power2 > POWER_BOUND)
35 + rt2800_rfcsr_write(rt2x00dev, 48, POWER_BOUND);
36 + else
37 + rt2800_rfcsr_write(rt2x00dev, 48, info->default_power2);
38 +
39 + rt2800_rfcsr_read(rt2x00dev, 17, &rfcsr);
40 + if (rt2x00dev->freq_offset > FREQ_OFFSET_BOUND)
41 + rt2x00_set_field8(&rfcsr, RFCSR17_CODE,
42 + FREQ_OFFSET_BOUND);
43 + else
44 + rt2x00_set_field8(&rfcsr, RFCSR17_CODE, rt2x00dev->freq_offset);
45 +
46 + rt2800_rfcsr_write(rt2x00dev, 17, rfcsr);
47 +
48 + rt2800_rfcsr_read(rt2x00dev, 1, &rfcsr);
49 + rt2x00_set_field8(&rfcsr, RFCSR1_RX0_PD, 1);
50 + rt2x00_set_field8(&rfcsr, RFCSR1_TX0_PD, 1);
51 + rt2x00_set_field8(&rfcsr, RFCSR1_RX1_PD, 1);
52 + rt2x00_set_field8(&rfcsr, RFCSR1_TX1_PD, 1);
53 + rt2x00_set_field8(&rfcsr, RFCSR1_RX2_PD, 0);
54 + rt2x00_set_field8(&rfcsr, RFCSR1_TX2_PD, 0);
55 +
56 + if ( rt2x00dev->default_ant.tx_chain_num == 1 )
57 + rt2x00_set_field8(&rfcsr, RFCSR1_TX1_PD, 0);
58 +
59 + if ( rt2x00dev->default_ant.rx_chain_num == 1 )
60 + rt2x00_set_field8(&rfcsr, RFCSR1_RX1_PD, 0);
61 +
62 + rt2800_rfcsr_write(rt2x00dev, 1, rfcsr);
63 +
64 + rt2800_rfcsr_write(rt2x00dev, 31, 80);
65 +}
66 +
67 static void rt2800_config_channel_rf53xx(struct rt2x00_dev *rt2x00dev,
68 struct ieee80211_conf *conf,
69 struct rf_channel *rf,
70 @@ -2114,6 +2167,9 @@ static void rt2800_config_channel(struct
71 case RF3290:
72 rt2800_config_channel_rf3290(rt2x00dev, conf, rf, info);
73 break;
74 + case RF3322:
75 + rt2800_config_channel_rf3322(rt2x00dev, conf, rf, info);
76 + break;
77 case RF5360:
78 case RF5370:
79 case RF5372:
80 @@ -2126,6 +2182,7 @@ static void rt2800_config_channel(struct
81 }
82
83 if (rt2x00_rf(rt2x00dev, RF3290) ||
84 + rt2x00_rf(rt2x00dev, RF3322) ||
85 rt2x00_rf(rt2x00dev, RF5360) ||
86 rt2x00_rf(rt2x00dev, RF5370) ||
87 rt2x00_rf(rt2x00dev, RF5372) ||
88 @@ -2144,10 +2201,20 @@ static void rt2800_config_channel(struct
89 /*
90 * Change BBP settings
91 */
92 - rt2800_bbp_write(rt2x00dev, 62, 0x37 - rt2x00dev->lna_gain);
93 - rt2800_bbp_write(rt2x00dev, 63, 0x37 - rt2x00dev->lna_gain);
94 - rt2800_bbp_write(rt2x00dev, 64, 0x37 - rt2x00dev->lna_gain);
95 - rt2800_bbp_write(rt2x00dev, 86, 0);
96 + if (rt2x00_rt(rt2x00dev, RT3352))
97 + {
98 + rt2800_bbp_write(rt2x00dev, 27, 0x0);
99 + rt2800_bbp_write(rt2x00dev, 62, 0x26 + rt2x00dev->lna_gain);
100 + rt2800_bbp_write(rt2x00dev, 27, 0x20);
101 + rt2800_bbp_write(rt2x00dev, 62, 0x26 + rt2x00dev->lna_gain);
102 + }
103 + else
104 + {
105 + rt2800_bbp_write(rt2x00dev, 62, 0x37 - rt2x00dev->lna_gain);
106 + rt2800_bbp_write(rt2x00dev, 63, 0x37 - rt2x00dev->lna_gain);
107 + rt2800_bbp_write(rt2x00dev, 64, 0x37 - rt2x00dev->lna_gain);
108 + rt2800_bbp_write(rt2x00dev, 86, 0);
109 + }
110
111 if (rf->channel <= 14) {
112 if (!rt2x00_rt(rt2x00dev, RT5390) &&
113 @@ -2242,6 +2309,16 @@ static void rt2800_config_channel(struct
114 rt2800_register_read(rt2x00dev, CH_IDLE_STA, &reg);
115 rt2800_register_read(rt2x00dev, CH_BUSY_STA, &reg);
116 rt2800_register_read(rt2x00dev, CH_BUSY_STA_SEC, &reg);
117 +
118 + /*
119 + * Clear update flag
120 + */
121 + if (rt2x00_rt(rt2x00dev, RT3352))
122 + {
123 + rt2800_bbp_read(rt2x00dev, 49, &bbp);
124 + rt2x00_set_field8(&bbp, BBP49_UPDATE_FLAG, 0);
125 + rt2800_bbp_write(rt2x00dev, 49, bbp);
126 + }
127 }
128
129 static int rt2800_get_gain_calibration_delta(struct rt2x00_dev *rt2x00dev)
130 @@ -2893,11 +2970,15 @@ static int rt2800_init_registers(struct
131 if (rt2x00_rt(rt2x00dev, RT3071) ||
132 rt2x00_rt(rt2x00dev, RT3090) ||
133 rt2x00_rt(rt2x00dev, RT3290) ||
134 + rt2x00_rt(rt2x00dev, RT3352) ||
135 rt2x00_rt(rt2x00dev, RT3390)) {
136
137 if (rt2x00_rt(rt2x00dev, RT3290))
138 rt2800_register_write(rt2x00dev, TX_SW_CFG0,
139 0x00000404);
140 + else if (rt2x00_rt(rt2x00dev, RT3352))
141 + rt2800_register_write(rt2x00dev, TX_SW_CFG0,
142 + 0x00000402);
143 else
144 rt2800_register_write(rt2x00dev, TX_SW_CFG0,
145 0x00000400);
146 @@ -3310,6 +3391,11 @@ static int rt2800_init_bbp(struct rt2x00
147 rt2800_wait_bbp_ready(rt2x00dev)))
148 return -EACCES;
149
150 + if (rt2x00_rt(rt2x00dev, RT3352)) {
151 + rt2800_bbp_write(rt2x00dev, 3, 0x00);
152 + rt2800_bbp_write(rt2x00dev, 4, 0x50);
153 + }
154 +
155 if (rt2x00_rt(rt2x00dev, RT3290) ||
156 rt2x00_rt(rt2x00dev, RT5390) ||
157 rt2x00_rt(rt2x00dev, RT5392)) {
158 @@ -3320,15 +3406,20 @@ static int rt2800_init_bbp(struct rt2x00
159
160 if (rt2800_is_305x_soc(rt2x00dev) ||
161 rt2x00_rt(rt2x00dev, RT3290) ||
162 + rt2x00_rt(rt2x00dev, RT3352) ||
163 rt2x00_rt(rt2x00dev, RT3572) ||
164 rt2x00_rt(rt2x00dev, RT5390) ||
165 rt2x00_rt(rt2x00dev, RT5392))
166 rt2800_bbp_write(rt2x00dev, 31, 0x08);
167
168 + if (rt2x00_rt(rt2x00dev, RT3352))
169 + rt2800_bbp_write(rt2x00dev, 47, 0x48);
170 +
171 rt2800_bbp_write(rt2x00dev, 65, 0x2c);
172 rt2800_bbp_write(rt2x00dev, 66, 0x38);
173
174 if (rt2x00_rt(rt2x00dev, RT3290) ||
175 + rt2x00_rt(rt2x00dev, RT3352) ||
176 rt2x00_rt(rt2x00dev, RT5390) ||
177 rt2x00_rt(rt2x00dev, RT5392))
178 rt2800_bbp_write(rt2x00dev, 68, 0x0b);
179 @@ -3337,6 +3428,7 @@ static int rt2800_init_bbp(struct rt2x00
180 rt2800_bbp_write(rt2x00dev, 69, 0x16);
181 rt2800_bbp_write(rt2x00dev, 73, 0x12);
182 } else if (rt2x00_rt(rt2x00dev, RT3290) ||
183 + rt2x00_rt(rt2x00dev, RT3352) ||
184 rt2x00_rt(rt2x00dev, RT5390) ||
185 rt2x00_rt(rt2x00dev, RT5392)) {
186 rt2800_bbp_write(rt2x00dev, 69, 0x12);
187 @@ -3368,6 +3460,10 @@ static int rt2800_init_bbp(struct rt2x00
188 } else if (rt2800_is_305x_soc(rt2x00dev)) {
189 rt2800_bbp_write(rt2x00dev, 78, 0x0e);
190 rt2800_bbp_write(rt2x00dev, 80, 0x08);
191 + } else if (rt2x00_rt(rt2x00dev, RT3352)) {
192 + rt2800_bbp_write(rt2x00dev, 78, 0x0e);
193 + rt2800_bbp_write(rt2x00dev, 80, 0x08);
194 + rt2800_bbp_write(rt2x00dev, 81, 0x37);
195 } else {
196 rt2800_bbp_write(rt2x00dev, 81, 0x37);
197 }
198 @@ -3397,18 +3493,21 @@ static int rt2800_init_bbp(struct rt2x00
199 rt2800_bbp_write(rt2x00dev, 84, 0x99);
200
201 if (rt2x00_rt(rt2x00dev, RT3290) ||
202 + rt2x00_rt(rt2x00dev, RT3352) ||
203 rt2x00_rt(rt2x00dev, RT5390) ||
204 rt2x00_rt(rt2x00dev, RT5392))
205 rt2800_bbp_write(rt2x00dev, 86, 0x38);
206 else
207 rt2800_bbp_write(rt2x00dev, 86, 0x00);
208
209 - if (rt2x00_rt(rt2x00dev, RT5392))
210 + if (rt2x00_rt(rt2x00dev, RT5392) ||
211 + rt2x00_rt(rt2x00dev, RT3352))
212 rt2800_bbp_write(rt2x00dev, 88, 0x90);
213
214 rt2800_bbp_write(rt2x00dev, 91, 0x04);
215
216 if (rt2x00_rt(rt2x00dev, RT3290) ||
217 + rt2x00_rt(rt2x00dev, RT3352) ||
218 rt2x00_rt(rt2x00dev, RT5390) ||
219 rt2x00_rt(rt2x00dev, RT5392))
220 rt2800_bbp_write(rt2x00dev, 92, 0x02);
221 @@ -3425,6 +3524,7 @@ static int rt2800_init_bbp(struct rt2x00
222 rt2x00_rt_rev_gte(rt2x00dev, RT3090, REV_RT3090E) ||
223 rt2x00_rt_rev_gte(rt2x00dev, RT3390, REV_RT3390E) ||
224 rt2x00_rt(rt2x00dev, RT3290) ||
225 + rt2x00_rt(rt2x00dev, RT3352) ||
226 rt2x00_rt(rt2x00dev, RT3572) ||
227 rt2x00_rt(rt2x00dev, RT5390) ||
228 rt2x00_rt(rt2x00dev, RT5392) ||
229 @@ -3434,6 +3534,7 @@ static int rt2800_init_bbp(struct rt2x00
230 rt2800_bbp_write(rt2x00dev, 103, 0x00);
231
232 if (rt2x00_rt(rt2x00dev, RT3290) ||
233 + rt2x00_rt(rt2x00dev, RT3352) ||
234 rt2x00_rt(rt2x00dev, RT5390) ||
235 rt2x00_rt(rt2x00dev, RT5392))
236 rt2800_bbp_write(rt2x00dev, 104, 0x92);
237 @@ -3442,6 +3543,8 @@ static int rt2800_init_bbp(struct rt2x00
238 rt2800_bbp_write(rt2x00dev, 105, 0x01);
239 else if (rt2x00_rt(rt2x00dev, RT3290))
240 rt2800_bbp_write(rt2x00dev, 105, 0x1c);
241 + else if (rt2x00_rt(rt2x00dev, RT3352))
242 + rt2800_bbp_write(rt2x00dev, 105, 0x34);
243 else if (rt2x00_rt(rt2x00dev, RT5390) ||
244 rt2x00_rt(rt2x00dev, RT5392))
245 rt2800_bbp_write(rt2x00dev, 105, 0x3c);
246 @@ -3451,11 +3554,16 @@ static int rt2800_init_bbp(struct rt2x00
247 if (rt2x00_rt(rt2x00dev, RT3290) ||
248 rt2x00_rt(rt2x00dev, RT5390))
249 rt2800_bbp_write(rt2x00dev, 106, 0x03);
250 + else if (rt2x00_rt(rt2x00dev, RT3352))
251 + rt2800_bbp_write(rt2x00dev, 106, 0x05);
252 else if (rt2x00_rt(rt2x00dev, RT5392))
253 rt2800_bbp_write(rt2x00dev, 106, 0x12);
254 else
255 rt2800_bbp_write(rt2x00dev, 106, 0x35);
256
257 + if (rt2x00_rt(rt2x00dev, RT3352))
258 + rt2800_bbp_write(rt2x00dev, 120, 0x50);
259 +
260 if (rt2x00_rt(rt2x00dev, RT3290) ||
261 rt2x00_rt(rt2x00dev, RT5390) ||
262 rt2x00_rt(rt2x00dev, RT5392))
263 @@ -3466,6 +3574,9 @@ static int rt2800_init_bbp(struct rt2x00
264 rt2800_bbp_write(rt2x00dev, 135, 0xf6);
265 }
266
267 + if (rt2x00_rt(rt2x00dev, RT3352))
268 + rt2800_bbp_write(rt2x00dev, 137, 0x0F);
269 +
270 if (rt2x00_rt(rt2x00dev, RT3071) ||
271 rt2x00_rt(rt2x00dev, RT3090) ||
272 rt2x00_rt(rt2x00dev, RT3390) ||
273 @@ -3506,6 +3617,28 @@ static int rt2800_init_bbp(struct rt2x00
274 rt2800_bbp_write(rt2x00dev, 3, value);
275 }
276
277 + if (rt2x00_rt(rt2x00dev, RT3352)) {
278 + rt2800_bbp_write(rt2x00dev, 163, 0xBD);
279 + /* Set ITxBF timeout to 0x9C40=1000msec */
280 + rt2800_bbp_write(rt2x00dev, 179, 0x02);
281 + rt2800_bbp_write(rt2x00dev, 180, 0x00);
282 + rt2800_bbp_write(rt2x00dev, 182, 0x40);
283 + rt2800_bbp_write(rt2x00dev, 180, 0x01);
284 + rt2800_bbp_write(rt2x00dev, 182, 0x9C);
285 + rt2800_bbp_write(rt2x00dev, 179, 0x00);
286 + /* Reprogram the inband interface to put right values in RXWI */
287 + rt2800_bbp_write(rt2x00dev, 142, 0x04);
288 + rt2800_bbp_write(rt2x00dev, 143, 0x3b);
289 + rt2800_bbp_write(rt2x00dev, 142, 0x06);
290 + rt2800_bbp_write(rt2x00dev, 143, 0xA0);
291 + rt2800_bbp_write(rt2x00dev, 142, 0x07);
292 + rt2800_bbp_write(rt2x00dev, 143, 0xA1);
293 + rt2800_bbp_write(rt2x00dev, 142, 0x08);
294 + rt2800_bbp_write(rt2x00dev, 143, 0xA2);
295 +
296 + rt2800_bbp_write(rt2x00dev, 148, 0xC8);
297 + }
298 +
299 if (rt2x00_rt(rt2x00dev, RT5390) ||
300 rt2x00_rt(rt2x00dev, RT5392)) {
301 int ant, div_mode;
302 @@ -3639,6 +3772,7 @@ static int rt2800_init_rfcsr(struct rt2x
303 !rt2x00_rt(rt2x00dev, RT3071) &&
304 !rt2x00_rt(rt2x00dev, RT3090) &&
305 !rt2x00_rt(rt2x00dev, RT3290) &&
306 + !rt2x00_rt(rt2x00dev, RT3352) &&
307 !rt2x00_rt(rt2x00dev, RT3390) &&
308 !rt2x00_rt(rt2x00dev, RT3572) &&
309 !rt2x00_rt(rt2x00dev, RT5390) &&
310 @@ -3835,6 +3969,71 @@ static int rt2800_init_rfcsr(struct rt2x
311 rt2800_rfcsr_write(rt2x00dev, 30, 0x00);
312 rt2800_rfcsr_write(rt2x00dev, 31, 0x00);
313 return 0;
314 + } else if (rt2x00_rt(rt2x00dev, RT3352)) {
315 + rt2800_rfcsr_write(rt2x00dev, 0, 0xF0);
316 + rt2800_rfcsr_write(rt2x00dev, 1, 0x23);
317 + rt2800_rfcsr_write(rt2x00dev, 2, 0x50);
318 + rt2800_rfcsr_write(rt2x00dev, 3, 0x18);
319 + rt2800_rfcsr_write(rt2x00dev, 4, 0x00);
320 + rt2800_rfcsr_write(rt2x00dev, 5, 0x00);
321 + rt2800_rfcsr_write(rt2x00dev, 6, 0x33);
322 + rt2800_rfcsr_write(rt2x00dev, 7, 0x00);
323 + rt2800_rfcsr_write(rt2x00dev, 8, 0xF1);
324 + rt2800_rfcsr_write(rt2x00dev, 9, 0x02);
325 + rt2800_rfcsr_write(rt2x00dev, 10, 0xD2);
326 + rt2800_rfcsr_write(rt2x00dev, 11, 0x42);
327 + rt2800_rfcsr_write(rt2x00dev, 12, 0x1C);
328 + rt2800_rfcsr_write(rt2x00dev, 13, 0x00);
329 + rt2800_rfcsr_write(rt2x00dev, 14, 0x5A);
330 + rt2800_rfcsr_write(rt2x00dev, 15, 0x00);
331 + rt2800_rfcsr_write(rt2x00dev, 16, 0x01);
332 +/* rt2800_rfcsr_write(rt2x00dev, 17, 0x1A); */
333 + rt2800_rfcsr_write(rt2x00dev, 18, 0x45);
334 + rt2800_rfcsr_write(rt2x00dev, 19, 0x02);
335 + rt2800_rfcsr_write(rt2x00dev, 20, 0x00);
336 + rt2800_rfcsr_write(rt2x00dev, 21, 0x00);
337 + rt2800_rfcsr_write(rt2x00dev, 22, 0x00);
338 + rt2800_rfcsr_write(rt2x00dev, 23, 0x00);
339 + rt2800_rfcsr_write(rt2x00dev, 24, 0x00);
340 + rt2800_rfcsr_write(rt2x00dev, 25, 0x80);
341 + rt2800_rfcsr_write(rt2x00dev, 26, 0x00);
342 + rt2800_rfcsr_write(rt2x00dev, 27, 0x03);
343 + rt2800_rfcsr_write(rt2x00dev, 28, 0x03);
344 + rt2800_rfcsr_write(rt2x00dev, 29, 0x00);
345 + rt2800_rfcsr_write(rt2x00dev, 30, 0x10);
346 + rt2800_rfcsr_write(rt2x00dev, 31, 0x80);
347 + rt2800_rfcsr_write(rt2x00dev, 32, 0x80);
348 + rt2800_rfcsr_write(rt2x00dev, 33, 0x00);
349 + rt2800_rfcsr_write(rt2x00dev, 34, 0x01);
350 + rt2800_rfcsr_write(rt2x00dev, 35, 0x03);
351 + rt2800_rfcsr_write(rt2x00dev, 36, 0xBD);
352 + rt2800_rfcsr_write(rt2x00dev, 37, 0x3C);
353 + rt2800_rfcsr_write(rt2x00dev, 38, 0x5F);
354 + rt2800_rfcsr_write(rt2x00dev, 39, 0xC5);
355 + rt2800_rfcsr_write(rt2x00dev, 40, 0x33);
356 + rt2800_rfcsr_write(rt2x00dev, 41, 0x5B);
357 + rt2800_rfcsr_write(rt2x00dev, 42, 0x5B);
358 + rt2800_rfcsr_write(rt2x00dev, 43, 0xDB);
359 + rt2800_rfcsr_write(rt2x00dev, 44, 0xDB);
360 + rt2800_rfcsr_write(rt2x00dev, 45, 0xDB);
361 + rt2800_rfcsr_write(rt2x00dev, 46, 0xDD);
362 + rt2800_rfcsr_write(rt2x00dev, 47, 0x0D);
363 + rt2800_rfcsr_write(rt2x00dev, 48, 0x14);
364 + rt2800_rfcsr_write(rt2x00dev, 49, 0x00);
365 + rt2800_rfcsr_write(rt2x00dev, 50, 0x2D);
366 + rt2800_rfcsr_write(rt2x00dev, 51, 0x7F);
367 + rt2800_rfcsr_write(rt2x00dev, 52, 0x00);
368 + rt2800_rfcsr_write(rt2x00dev, 53, 0x52);
369 + rt2800_rfcsr_write(rt2x00dev, 54, 0x1B);
370 + rt2800_rfcsr_write(rt2x00dev, 55, 0x7F);
371 + rt2800_rfcsr_write(rt2x00dev, 56, 0x00);
372 + rt2800_rfcsr_write(rt2x00dev, 57, 0x52);
373 + rt2800_rfcsr_write(rt2x00dev, 58, 0x1B);
374 + rt2800_rfcsr_write(rt2x00dev, 59, 0x00);
375 + rt2800_rfcsr_write(rt2x00dev, 60, 0x00);
376 + rt2800_rfcsr_write(rt2x00dev, 61, 0x00);
377 + rt2800_rfcsr_write(rt2x00dev, 62, 0x00);
378 + rt2800_rfcsr_write(rt2x00dev, 63, 0x00);
379 } else if (rt2x00_rt(rt2x00dev, RT5390)) {
380 rt2800_rfcsr_write(rt2x00dev, 1, 0x0f);
381 rt2800_rfcsr_write(rt2x00dev, 2, 0x80);
382 @@ -4035,6 +4234,7 @@ static int rt2800_init_rfcsr(struct rt2x
383 rt2800_init_rx_filter(rt2x00dev, true, 0x27, 0x19);
384 } else if (rt2x00_rt(rt2x00dev, RT3071) ||
385 rt2x00_rt(rt2x00dev, RT3090) ||
386 + rt2x00_rt(rt2x00dev, RT3352) ||
387 rt2x00_rt(rt2x00dev, RT3390) ||
388 rt2x00_rt(rt2x00dev, RT3572)) {
389 drv_data->calibration_bw20 =
390 @@ -4493,6 +4693,7 @@ int rt2800_init_eeprom(struct rt2x00_dev
391 case RT3071:
392 case RT3090:
393 case RT3290:
394 + case RT3352:
395 case RT3390:
396 case RT3572:
397 case RT5390:
398 @@ -4515,6 +4716,7 @@ int rt2800_init_eeprom(struct rt2x00_dev
399 case RF3052:
400 case RF3290:
401 case RF3320:
402 + case RF3322:
403 case RF5360:
404 case RF5370:
405 case RF5372:
406 @@ -4539,6 +4741,7 @@ int rt2800_init_eeprom(struct rt2x00_dev
407
408 if (rt2x00_rt(rt2x00dev, RT3070) ||
409 rt2x00_rt(rt2x00dev, RT3090) ||
410 + rt2x00_rt(rt2x00dev, RT3352) ||
411 rt2x00_rt(rt2x00dev, RT3390)) {
412 value = rt2x00_get_field16(eeprom,
413 EEPROM_NIC_CONF1_ANT_DIVERSITY);
414 @@ -4832,6 +5035,7 @@ int rt2800_probe_hw_mode(struct rt2x00_d
415 rt2x00_rf(rt2x00dev, RF3022) ||
416 rt2x00_rf(rt2x00dev, RF3290) ||
417 rt2x00_rf(rt2x00dev, RF3320) ||
418 + rt2x00_rf(rt2x00dev, RF3322) ||
419 rt2x00_rf(rt2x00dev, RF5360) ||
420 rt2x00_rf(rt2x00dev, RF5370) ||
421 rt2x00_rf(rt2x00dev, RF5372) ||
422 --- a/drivers/net/wireless/rt2x00/rt2x00.h
423 +++ b/drivers/net/wireless/rt2x00/rt2x00.h
424 @@ -189,6 +189,7 @@ struct rt2x00_chip {
425 #define RT3071 0x3071
426 #define RT3090 0x3090 /* 2.4GHz PCIe */
427 #define RT3290 0x3290
428 +#define RT3352 0x3352 /* WSOC */
429 #define RT3390 0x3390
430 #define RT3572 0x3572
431 #define RT3593 0x3593
432 --- a/drivers/net/wireless/rt2x00/rt2800.h
433 +++ b/drivers/net/wireless/rt2x00/rt2800.h
434 @@ -1936,6 +1936,11 @@ struct mac_iveiv_entry {
435 #define BBP47_TSSI_ADC6 FIELD8(0x80)
436
437 /*
438 + * BBP 49
439 + */
440 +#define BBP49_UPDATE_FLAG FIELD8(0x01)
441 +
442 +/*
443 * BBP 109
444 */
445 #define BBP109_TX0_POWER FIELD8(0x0f)