mac80211: brcmsmac update to version from wireless-testing tag master-2012-05-16-2
[openwrt/svn-archive/archive.git] / package / mac80211 / patches / 872-brcmsmac-add-some-conditions-for-the-bcm4716-again.patch
1 --- a/drivers/net/wireless/brcm80211/brcmsmac/main.c
2 +++ b/drivers/net/wireless/brcm80211/brcmsmac/main.c
3 @@ -1944,7 +1944,8 @@ static bool brcms_b_radio_read_hwdisable
4 * accesses phyreg throughput mac. This can be skipped since
5 * only mac reg is accessed below
6 */
7 - flags |= SICF_PCLKE;
8 + if (D11REV_GE(wlc_hw->corerev, 18))
9 + flags |= SICF_PCLKE;
10
11 /*
12 * TODO: test suspend/resume
13 @@ -2025,7 +2026,8 @@ void brcms_b_corereset(struct brcms_hard
14 * phyreg throughput mac, AND phy_reset is skipped at early stage when
15 * band->pi is invalid. need to enable PHY CLK
16 */
17 - flags |= SICF_PCLKE;
18 + if (D11REV_GE(wlc_hw->corerev, 18))
19 + flags |= SICF_PCLKE;
20
21 /*
22 * reset the core
23 --- a/drivers/net/wireless/brcm80211/brcmsmac/phy/phy_n.c
24 +++ b/drivers/net/wireless/brcm80211/brcmsmac/phy/phy_n.c
25 @@ -17895,6 +17895,9 @@ static u32 *wlc_phy_get_ipa_gaintbl_nphy
26 nphy_tpc_txgain_ipa_2g_2057rev7;
27 } else if (NREV_IS(pi->pubpi.phy_rev, 6)) {
28 tx_pwrctrl_tbl = nphy_tpc_txgain_ipa_rev6;
29 + if (pi->sh->chip == BCM47162_CHIP_ID) {
30 + tx_pwrctrl_tbl = nphy_tpc_txgain_ipa_rev5;
31 + }
32 } else if (NREV_IS(pi->pubpi.phy_rev, 5)) {
33 tx_pwrctrl_tbl = nphy_tpc_txgain_ipa_rev5;
34 } else {
35 @@ -19256,8 +19259,14 @@ static void wlc_phy_spurwar_nphy(struct
36 case 38:
37 case 102:
38 case 118:
39 - nphy_adj_tone_id_buf[0] = 0;
40 - nphy_adj_noise_var_buf[0] = 0x0;
41 + if ((pi->sh->chip == BCM4716_CHIP_ID) &&
42 + (pi->sh->chippkg == BCM4717_PKG_ID)) {
43 + nphy_adj_tone_id_buf[0] = 32;
44 + nphy_adj_noise_var_buf[0] = 0x21f;
45 + } else {
46 + nphy_adj_tone_id_buf[0] = 0;
47 + nphy_adj_noise_var_buf[0] = 0x0;
48 + }
49 break;
50 case 134:
51 nphy_adj_tone_id_buf[0] = 32;
52 @@ -20697,12 +20706,22 @@ wlc_phy_chanspec_radio2056_setup(struct
53 write_radio_reg(pi, RADIO_2056_SYN_PLL_LOOPFILTER2 |
54 RADIO_2056_SYN, 0x1f);
55
56 - write_radio_reg(pi,
57 - RADIO_2056_SYN_PLL_LOOPFILTER4 |
58 - RADIO_2056_SYN, 0xb);
59 - write_radio_reg(pi,
60 - RADIO_2056_SYN_PLL_CP2 |
61 - RADIO_2056_SYN, 0x14);
62 + if ((pi->sh->chip == BCM4716_CHIP_ID) ||
63 + (pi->sh->chip == BCM47162_CHIP_ID)) {
64 + write_radio_reg(pi,
65 + RADIO_2056_SYN_PLL_LOOPFILTER4 |
66 + RADIO_2056_SYN, 0x14);
67 + write_radio_reg(pi,
68 + RADIO_2056_SYN_PLL_CP2 |
69 + RADIO_2056_SYN, 0x00);
70 + } else {
71 + write_radio_reg(pi,
72 + RADIO_2056_SYN_PLL_LOOPFILTER4 |
73 + RADIO_2056_SYN, 0xb);
74 + write_radio_reg(pi,
75 + RADIO_2056_SYN_PLL_CP2 |
76 + RADIO_2056_SYN, 0x14);
77 + }
78 }
79 }
80
81 @@ -20749,24 +20768,33 @@ wlc_phy_chanspec_radio2056_setup(struct
82 WRITE_RADIO_REG2(pi, RADIO_2056, TX, core,
83 PADG_IDAC, 0xcc);
84
85 - bias = 0x25;
86 - cascbias = 0x20;
87 + if ((pi->sh->chip == BCM4716_CHIP_ID) ||
88 + (pi->sh->chip ==
89 + BCM47162_CHIP_ID)) {
90 + bias = 0x40;
91 + cascbias = 0x45;
92 + pag_boost_tune = 0x5;
93 + pgag_boost_tune = 0x33;
94 + padg_boost_tune = 0x77;
95 + mixg_boost_tune = 0x55;
96 + } else {
97 + bias = 0x25;
98 + cascbias = 0x20;
99
100 - if ((pi->sh->chip ==
101 - BCM43224_CHIP_ID)
102 - || (pi->sh->chip ==
103 - BCM43225_CHIP_ID)) {
104 - if (pi->sh->chippkg ==
105 - BCM43224_FAB_SMIC) {
106 - bias = 0x2a;
107 - cascbias = 0x38;
108 + if ((pi->sh->chip == BCM43224_CHIP_ID)
109 + || (pi->sh->chip == BCM43225_CHIP_ID)) {
110 + if (pi->sh->chippkg ==
111 + BCM43224_FAB_SMIC) {
112 + bias = 0x2a;
113 + cascbias = 0x38;
114 + }
115 }
116 - }
117
118 - pag_boost_tune = 0x4;
119 - pgag_boost_tune = 0x03;
120 - padg_boost_tune = 0x77;
121 - mixg_boost_tune = 0x65;
122 + pag_boost_tune = 0x4;
123 + pgag_boost_tune = 0x03;
124 + padg_boost_tune = 0x77;
125 + mixg_boost_tune = 0x65;
126 + }
127
128 WRITE_RADIO_REG2(pi, RADIO_2056, TX, core,
129 INTPAG_IMAIN_STAT, bias);
130 @@ -21180,19 +21208,27 @@ wlc_phy_chanspec_nphy_setup(struct brcms
131 } else if (NREV_GE(pi->pubpi.phy_rev, 7)) {
132 if (val == 54)
133 spuravoid = 1;
134 - } else {
135 - if (pi->nphy_aband_spurwar_en &&
136 - ((val == 38) || (val == 102)
137 - || (val == 118)))
138 + } else if (pi->nphy_aband_spurwar_en &&
139 + ((val == 38) || (val == 102) || (val == 118))) {
140 + if ((pi->sh->chip == BCM4716_CHIP_ID)
141 + && (pi->sh->chippkg == BCM4717_PKG_ID)) {
142 + spuravoid = 0;
143 + } else {
144 spuravoid = 1;
145 + }
146 }
147
148 if (pi->phy_spuravoid == SPURAVOID_FORCEON)
149 spuravoid = 1;
150
151 - wlapi_bmac_core_phypll_ctl(pi->sh->physhim, false);
152 - si_pmu_spuravoid_pllupdate(pi->sh->sih, spuravoid);
153 - wlapi_bmac_core_phypll_ctl(pi->sh->physhim, true);
154 + if ((pi->sh->chip == BCM4716_CHIP_ID) ||
155 + (pi->sh->chip == BCM47162_CHIP_ID)) {
156 + si_pmu_spuravoid_pllupdate(pi->sh->sih, spuravoid);
157 + } else {
158 + wlapi_bmac_core_phypll_ctl(pi->sh->physhim, false);
159 + si_pmu_spuravoid_pllupdate(pi->sh->sih, spuravoid);
160 + wlapi_bmac_core_phypll_ctl(pi->sh->physhim, true);
161 + }
162
163 if ((pi->sh->chip == BCM43224_CHIP_ID) ||
164 (pi->sh->chip == BCM43225_CHIP_ID)) {
165 @@ -21211,7 +21247,10 @@ wlc_phy_chanspec_nphy_setup(struct brcms
166 }
167 }
168
169 - wlapi_bmac_core_phypll_reset(pi->sh->physhim);
170 + if (!((pi->sh->chip == BCM4716_CHIP_ID) ||
171 + (pi->sh->chip == BCM47162_CHIP_ID))) {
172 + wlapi_bmac_core_phypll_reset(pi->sh->physhim);
173 + }
174
175 mod_phy_reg(pi, 0x01, (0x1 << 15),
176 ((spuravoid > 0) ? (0x1 << 15) : 0));
177 @@ -24925,14 +24964,20 @@ wlc_phy_a2_nphy(struct brcms_phy *pi, st
178 if (txgains->useindex) {
179 phy_a4 = 15 - ((txgains->index) >> 3);
180 if (CHSPEC_IS2G(pi->radio_chanspec)) {
181 - if (NREV_GE(pi->pubpi.phy_rev, 6))
182 + if (NREV_GE(pi->pubpi.phy_rev, 6)) {
183 phy_a5 = 0x00f7 | (phy_a4 << 8);
184 -
185 - else
186 - if (NREV_IS(pi->pubpi.phy_rev, 5))
187 + if (pi->sh->chip ==
188 + BCM47162_CHIP_ID) {
189 + phy_a5 =
190 + 0x10f7 | (phy_a4 <<
191 + 8);
192 + }
193 + } else
194 + if (NREV_IS(pi->pubpi.phy_rev, 5)) {
195 phy_a5 = 0x10f7 | (phy_a4 << 8);
196 - else
197 + } else {
198 phy_a5 = 0x50f7 | (phy_a4 << 8);
199 + }
200 } else {
201 phy_a5 = 0x70f7 | (phy_a4 << 8);
202 }