Backported r12989 for 8.09
[openwrt/svn-archive/archive.git] / package / madwifi / patches-testing / 316-ani_fix.patch
1 --- a/ath/if_ath.c
2 +++ b/ath/if_ath.c
3 @@ -343,6 +343,8 @@
4 unsigned int param, unsigned int value);
5
6 static u_int32_t ath_get_real_maxtxpower(struct ath_softc *sc);
7 +static int ath_setintmit(struct ath_softc *sc);
8 +static u_int32_t ath_calcrxfilter(struct ath_softc *sc);
9
10 #ifdef AR_DEBUG
11 static int ath_txq_check(struct ath_softc *sc, struct ath_txq *txq, const char *msg);
12 @@ -356,7 +358,6 @@
13 static char *ratectl = DEF_RATE_CTL;
14 static int rfkill = 0;
15 static int hal_tpc = 0;
16 -static int intmit = 0;
17 static int countrycode = CTRY_DEFAULT;
18 static int maxvaps = ATH_MAXVAPS_DEFAULT;
19 static int outdoor = 0;
20 @@ -398,7 +399,6 @@
21 #endif
22 MODULE_PARM(autocreate, "s");
23 MODULE_PARM(ratectl, "s");
24 -MODULE_PARM(intmit, "i");
25 #else
26 #include <linux/moduleparam.h>
27 module_param(beacon_cal, int, 0600);
28 @@ -412,7 +412,6 @@
29 #endif
30 module_param(autocreate, charp, 0600);
31 module_param(ratectl, charp, 0600);
32 -module_param(intmit, int, 0600);
33 #endif
34 MODULE_PARM_DESC(countrycode, "Override default country code. Default is 0.");
35 MODULE_PARM_DESC(maxvaps, "Maximum VAPs. Default is 4.");
36 @@ -428,7 +427,6 @@
37 "'none' to disable");
38 MODULE_PARM_DESC(ratectl, "Rate control algorithm [amrr|minstrel|onoe|sample], "
39 "defaults to '" DEF_RATE_CTL "'");
40 -MODULE_PARM_DESC(intmit, "Enable interference mitigation by default. Default is 0.");
41
42 #ifdef AR_DEBUG
43 static int ath_debug = 0;
44 @@ -585,23 +583,13 @@
45 if (ath_hal_hastxpowlimit(ah)) {
46 ic->ic_caps |= IEEE80211_C_TXPMGT;
47 }
48 - /* Interference mitigation/ambient noise immunity (ANI).
49 - * In modes other than HAL_M_STA, it causes receive sensitivity
50 - * problems for OFDM. */
51 + /* Interference mitigation/ambient noise immunity (ANI). */
52 sc->sc_hasintmit = ath_hal_hasintmit(ah);
53 - sc->sc_useintmit = (intmit && sc->sc_hasintmit);
54 - if (!sc->sc_hasintmit && intmit) {
55 - WPRINTF(sc, "Interference mitigation was requested, but is not"
56 - "supported by the HAL/hardware.\n");
57 - intmit = 0; /* Stop use in future ath_attach(). */
58 - }
59 - else {
60 - ath_hal_setintmit(ah, sc->sc_useintmit);
61 - DPRINTF(sc, ATH_DEBUG_ANY, "Interference mitigation is "
62 - "supported. Currently %s.\n",
63 - (sc->sc_useintmit ? "enabled" : "disabled"));
64 - }
65
66 + /* auto, mode dependent */
67 + sc->sc_useintmit = -1;
68 + sc->sc_noise_immunity = -1;
69 + sc->sc_ofdm_weak_det = -1;
70 sc->sc_dmasize_stomp = 0;
71
72 /*
73 @@ -614,15 +602,6 @@
74 sc->sc_mrretry = ath_hal_setupxtxdesc(ah, NULL, 0,0, 0,0, 0,0);
75
76 /*
77 - * Check if the device has hardware counters for PHY
78 - * errors. If so we need to enable the MIB interrupt
79 - * so we can act on stat triggers.
80 - */
81 - sc->sc_needmib = ath_hal_hwphycounters(ah) &&
82 - sc->sc_hasintmit &&
83 - sc->sc_useintmit;
84 -
85 - /*
86 * Get the hardware key cache size.
87 */
88 sc->sc_keymax = ath_hal_keycachesize(ah);
89 @@ -1593,37 +1572,6 @@
90 ath_init(dev);
91 }
92
93 -/* NB: Int. mit. was not implemented so that it could be enabled/disabled,
94 - * and actually in 0.9.30.13 HAL it really can't even be disabled because
95 - * it will start adjusting registers even when we turn off the capability
96 - * in the HAL.
97 - *
98 - * NB: This helper function basically clobbers all the related registers
99 - * if we have disabled int. mit. cap, allowing us to turn it on and off and
100 - * work around the bug preventing it from being disabled. */
101 -static inline void ath_override_intmit_if_disabled(struct ath_softc *sc) {
102 - /* Restore int. mit. registers if they were turned off. */
103 - if (sc->sc_hasintmit && !sc->sc_useintmit)
104 - ath_hal_restore_default_intmit(sc->sc_ah);
105 - /* Sanity check... remove later. */
106 - if (!sc->sc_useintmit) {
107 - ath_hal_verify_default_intmit(sc->sc_ah);
108 - /* If we don't have int. mit. and we don't have DFS on channel,
109 - * it is safe to filter error packets. */
110 - if (!ath_radar_is_dfs_required(sc, &sc->sc_curchan)) {
111 - ath_hal_setrxfilter(sc->sc_ah,
112 - ath_hal_getrxfilter(sc->sc_ah) &
113 - ~HAL_RX_FILTER_PHYERR);
114 - }
115 - }
116 - else {
117 - /* Make sure that we have errors in RX filter because ANI needs
118 - * them. */
119 - ath_hal_setrxfilter(sc->sc_ah,
120 - ath_hal_getrxfilter(sc->sc_ah) | HAL_RX_FILTER_PHYERR);
121 - }
122 -}
123 -
124 static HAL_BOOL ath_hw_reset(struct ath_softc *sc, HAL_OPMODE opmode,
125 HAL_CHANNEL *channel, HAL_BOOL bChannelChange,
126 HAL_STATUS *status)
127 @@ -1698,11 +1646,7 @@
128 ath_hal_settpc(sc->sc_ah, hal_tpc);
129 }
130 #endif
131 -#if 0 /* Setting via HAL does not work, so it is done manually below. */
132 - if (sc->sc_hasintmit)
133 - ath_hal_setintmit(sc->sc_ah, sc->sc_useintmit);
134 -#endif
135 - ath_override_intmit_if_disabled(sc);
136 + ath_setintmit(sc);
137 if (sc->sc_dmasize_stomp)
138 ath_hal_set_dmasize_pcie(sc->sc_ah);
139 if (sc->sc_softled)
140 @@ -2496,7 +2440,6 @@
141
142 /* Let the HAL handle the event. */
143 ath_hal_mibevent(ah, &sc->sc_halstats);
144 - ath_override_intmit_if_disabled(sc);
145 }
146 }
147 if (needmark)
148 @@ -2564,6 +2507,55 @@
149 return flags;
150 }
151
152 +static int ath_setintmit(struct ath_softc *sc)
153 +{
154 + struct ath_hal *ah = sc->sc_ah;
155 + int ret;
156 + int val;
157 +
158 + if (!sc->sc_hasintmit)
159 + return 0;
160 +
161 + switch(sc->sc_useintmit) {
162 + case 0: /* disabled */
163 + case 1: /* enabled */
164 + val = sc->sc_useintmit;
165 + break;
166 + default:
167 + if (sc->sc_opmode != IEEE80211_M_MONITOR)
168 + val = 1;
169 + else
170 + val = 0;
171 + break;
172 + }
173 + ret = ath_hal_setintmit(ah, val);
174 + if (val)
175 + goto done;
176 +
177 + /* manual settings */
178 + if ((sc->sc_noise_immunity >= 0) && (sc->sc_noise_immunity <= 5))
179 + ath_hal_setcapability(ah, HAL_CAP_INTMIT, 2, sc->sc_noise_immunity, NULL);
180 + if ((sc->sc_ofdm_weak_det == 0) || (sc->sc_ofdm_weak_det == 1))
181 + ath_hal_setcapability(ah, HAL_CAP_INTMIT, 3, sc->sc_ofdm_weak_det, NULL);
182 +
183 +done:
184 + if (!sc->sc_imask)
185 + goto out;
186 +
187 + /* MIB interrupt handling */
188 + sc->sc_needmib = ath_hal_hwphycounters(ah) &&
189 + sc->sc_useintmit;
190 + if (sc->sc_needmib)
191 + sc->sc_imask |= HAL_INT_MIB;
192 + else
193 + sc->sc_imask &= ~HAL_INT_MIB;
194 + ath_hal_intrset(sc->sc_ah, sc->sc_imask);
195 + ath_calcrxfilter(sc);
196 +
197 +out:
198 + return ret;
199 +}
200 +
201 /*
202 * Context: process context
203 */
204 @@ -4249,8 +4241,7 @@
205 u_int32_t rfilt;
206
207 /* Preserve the current Phy. radar and err. filters. */
208 - rfilt = (ath_hal_getrxfilter(ah) &
209 - (HAL_RX_FILTER_PHYERR | HAL_RX_FILTER_PHYRADAR)) |
210 + rfilt = (ath_hal_getrxfilter(ah) & HAL_RX_FILTER_PHYRADAR) |
211 HAL_RX_FILTER_UCAST | HAL_RX_FILTER_BCAST |
212 HAL_RX_FILTER_MCAST;
213 if (ic->ic_opmode != IEEE80211_M_STA)
214 @@ -4266,6 +4257,8 @@
215 if (sc->sc_nmonvaps > 0)
216 rfilt |= (HAL_RX_FILTER_CONTROL | HAL_RX_FILTER_BEACON |
217 HAL_RX_FILTER_PROBEREQ | HAL_RX_FILTER_PROM);
218 + if (sc->sc_hasintmit && !sc->sc_needmib && ath_hal_getintmit(ah, NULL))
219 + rfilt |= HAL_RX_FILTER_PHYERR;
220 if (sc->sc_curchan.privFlags & CHANNEL_DFS)
221 rfilt |= (HAL_RX_FILTER_PHYERR | HAL_RX_FILTER_PHYRADAR);
222 return rfilt;
223 @@ -6810,8 +6803,7 @@
224 dev->quota -= bf_processed;
225 #endif
226
227 - if (sc->sc_useintmit)
228 - ath_hal_rxmonitor(ah, &sc->sc_halstats, &sc->sc_curchan);
229 + ath_hal_rxmonitor(ah, &sc->sc_halstats, &sc->sc_curchan);
230 if (!bf_processed)
231 DPRINTF(sc, ATH_DEBUG_RX_PROC,
232 "Warning: %s got scheduled when no receive "
233 @@ -8727,7 +8719,6 @@
234 ath_hal_rxena(ah); /* enable recv descriptors */
235 ath_mode_init(dev); /* set filters, etc. */
236 ath_hal_startpcurecv(ah); /* re-enable PCU/DMA engine */
237 - ath_override_intmit_if_disabled(sc);
238 return 0;
239 }
240
241 @@ -10633,8 +10624,10 @@
242 ATH_RP_IGNORED = 24,
243 ATH_RADAR_IGNORED = 25,
244 ATH_MAXVAPS = 26,
245 - ATH_INTMIT = 27,
246 - ATH_DISTANCE = 28,
247 + ATH_DISTANCE = 27,
248 + ATH_INTMIT = 28,
249 + ATH_NOISE_IMMUNITY = 29,
250 + ATH_OFDM_WEAK_DET = 30
251 };
252
253 static inline int
254 @@ -10696,6 +10689,48 @@
255 }
256
257 static int
258 +ath_sysctl_set_intmit(struct ath_softc *sc, long ctl, u_int val)
259 +{
260 + int ret;
261 +
262 + switch(ctl) {
263 + case ATH_INTMIT:
264 + sc->sc_intmit = val;
265 + break;
266 + case ATH_NOISE_IMMUNITY:
267 + sc->sc_noise_immunity = val;
268 + break;
269 + case ATH_OFDM_WEAK_DET:
270 + sc->sc_ofdm_weak_det = val;
271 + break;
272 + default:
273 + return -EINVAL;
274 + }
275 + ret = ath_setintmit(sc);
276 + return ret;
277 +}
278 +
279 +static int
280 +ath_sysctl_get_intmit(struct ath_softc *sc, long ctl, u_int *val)
281 +{
282 + struct ath_hal *ah = sc->sc_ah;
283 +
284 + switch(ctl) {
285 + case ATH_INTMIT:
286 + *val = (ath_hal_getcapability(ah, HAL_CAP_INTMIT, 1, NULL) == HAL_OK);
287 + break;
288 + case ATH_NOISE_IMMUNITY:
289 + return ath_hal_getcapability(ah, HAL_CAP_INTMIT, 2, val);
290 + case ATH_OFDM_WEAK_DET:
291 + return ath_hal_getcapability(ah, HAL_CAP_INTMIT, 3, val);
292 + default:
293 + return -EINVAL;
294 + }
295 + return 0;
296 +}
297 +
298 +
299 +static int
300 ATH_SYSCTL_DECL(ath_sysctl_halparam, ctl, write, filp, buffer, lenp, ppos)
301 {
302 struct ath_softc *sc = ctl->extra1;
303 @@ -10934,30 +10969,13 @@
304 sc->sc_radar_ignored = val;
305 break;
306 case ATH_INTMIT:
307 - if (!sc->sc_hasintmit) {
308 + case ATH_NOISE_IMMUNITY:
309 + case ATH_OFDM_WEAK_DET:
310 + if (!sc->sc_hasintmit)
311 ret = -EOPNOTSUPP;
312 - break;
313 - }
314 - if (sc->sc_useintmit == val)
315 - break;
316 - sc->sc_useintmit = val;
317 - sc->sc_needmib = ath_hal_hwphycounters(ah) &&
318 - sc->sc_useintmit;
319 - /* Update the HAL and MIB interrupt mask bits */
320 - ath_hal_setintmit(ah, !!val);
321 - sc->sc_imask = (sc->sc_imask & ~HAL_INT_MIB) |
322 - (sc->sc_needmib ? HAL_INT_MIB : 0);
323 - ath_hal_intrset(sc->sc_ah, sc->sc_imask);
324 - /* Only do a reset if device is valid and UP
325 - * and we just made a change to the settings. */
326 - if (sc->sc_dev && !sc->sc_invalid &&
327 - (sc->sc_dev->flags & IFF_RUNNING))
328 - ath_reset(sc->sc_dev);
329 - /* NB: Run this step to cleanup if HAL doesn't
330 - * obey capability flags and hangs onto ANI
331 - * settings. */
332 - ath_override_intmit_if_disabled(sc);
333 - break;
334 + else
335 + ret = ath_sysctl_set_intmit(sc, (long)ctl->extra2, val);
336 + break;
337 default:
338 ret = -EINVAL;
339 break;
340 @@ -11029,9 +11047,14 @@
341 case ATH_RADAR_IGNORED:
342 val = sc->sc_radar_ignored;
343 break;
344 - case ATH_INTMIT:
345 - val = sc->sc_useintmit;
346 - break;
347 + case ATH_INTMIT:
348 + case ATH_NOISE_IMMUNITY:
349 + case ATH_OFDM_WEAK_DET:
350 + if (!sc->sc_hasintmit)
351 + ret = -EOPNOTSUPP;
352 + else
353 + ret = ath_sysctl_get_intmit(sc, (long)ctl->extra2, &val);
354 + break;
355 default:
356 ret = -EINVAL;
357 break;
358 @@ -11413,6 +11436,24 @@
359 .maxlen = sizeof(ath_xchanmode),
360 .proc_handler = proc_dointvec
361 },
362 + { .ctl_name = CTL_AUTO,
363 + .procname = "intmit",
364 + .mode = 0644,
365 + .proc_handler = ath_sysctl_halparam,
366 + .extra2 = (void *)ATH_INTMIT,
367 + },
368 + { .ctl_name = CTL_AUTO,
369 + .procname = "noise_immunity",
370 + .mode = 0644,
371 + .proc_handler = ath_sysctl_halparam,
372 + .extra2 = (void *)ATH_NOISE_IMMUNITY,
373 + },
374 + { .ctl_name = CTL_AUTO,
375 + .procname = "ofdm_weak_det",
376 + .mode = 0644,
377 + .proc_handler = ath_sysctl_halparam,
378 + .extra2 = (void *)ATH_OFDM_WEAK_DET,
379 + },
380 { 0 }
381 };
382 static ctl_table ath_ath_table[] = {
383 --- a/ath/if_athvar.h
384 +++ b/ath/if_athvar.h
385 @@ -712,6 +712,10 @@
386 unsigned int sc_txcont_power; /* Continuous transmit power in 0.5dBm units */
387 unsigned int sc_txcont_rate; /* Continuous transmit rate in Mbps */
388
389 + int8_t sc_intmit; /* Interference mitigation enabled, -1 = auto, based on mode, 0/1 = off/on */
390 + int8_t sc_noise_immunity; /* Noise immunity level, 0-4, -1 == auto) */
391 + int8_t sc_ofdm_weak_det; /* OFDM weak frames detection, -1 == auto */
392 +
393 /* rate tables */
394 const HAL_RATE_TABLE *sc_rates[IEEE80211_MODE_MAX];
395 const HAL_RATE_TABLE *sc_currates; /* current rate table */
396 --- a/ath/if_ath_hal_extensions.h
397 +++ b/ath/if_ath_hal_extensions.h
398 @@ -237,296 +237,18 @@
399 AR5K_DMASIZE_512B
400 };
401
402 -
403 -int ath_set_ack_bitrate(struct ath_softc *sc, int);
404 -int ar_device(int devid);
405 -const char * ath5k_chip_name(enum ath5k_srev_type type, u_int16_t val);
406 -
407 -static inline unsigned long field_width(unsigned long mask, unsigned long shift)
408 -{
409 - unsigned long r = 0;
410 - unsigned long x = mask >> shift;
411 - if ( 0 == mask ) return 0;
412 -#if BITS_PER_LONG >= 64
413 - if ( x & (~0UL<<32) ) { x >>= 32; r += 32; }
414 -#endif
415 - if ( x & 0xffff0000 ) { x >>= 16; r += 16; }
416 - if ( x & 0x0000ff00 ) { x >>= 8; r += 8; }
417 - if ( x & 0x000000f0 ) { x >>= 4; r += 4; }
418 - if ( x & 0x0000000c ) { x >>= 2; r += 2; }
419 - if ( x & 0x00000002 ) { r += 1; }
420 - return r+1;
421 -}
422 -
423 -static inline u_int32_t get_field(struct ath_hal *ah, u_int32_t reg, u_int32_t mask, u_int32_t shift, int is_signed) {
424 - unsigned long x = ((OS_REG_READ(ah, reg) & mask) >> shift);
425 - if (is_signed) {
426 - unsigned long c =(-1) << (field_width(mask, shift)-1);
427 - return (x + c) ^ c;
428 - }
429 - return x;
430 -}
431 -
432 static inline void set_field(struct ath_hal *ah, u_int32_t reg, u_int32_t mask, u_int32_t shift, u_int32_t value) {
433 OS_REG_WRITE(ah, reg,
434 (OS_REG_READ(ah, reg) & ~mask) |
435 ((value << shift) & mask));
436 }
437
438 -static inline u_int32_t field_eq(struct ath_hal *ah, u_int32_t reg,
439 - u_int32_t mask, u_int32_t shift,
440 - u_int32_t value, int is_signed) {
441 - return (get_field(ah, reg, mask, shift, is_signed) & (mask >> shift)) ==
442 - (value & (mask >> shift));
443 -}
444 -
445 -static inline void override_warning(struct ath_hal *ah, const char *name,
446 - u_int32_t reg, u_int32_t mask,
447 - u_int32_t shift, u_int32_t expected, int is_signed) {
448 -
449 - if (!field_eq(ah, reg, mask, shift, expected, is_signed))
450 - printk("%s: Correcting 0x%04x[%s] from 0x%x (%d) to 0x%x (%d).\n",
451 - SC_DEV_NAME(ah->ah_sc),
452 - reg,
453 - name,
454 - (get_field(ah, reg, mask, shift, is_signed) & (mask >> shift)),
455 - get_field(ah, reg, mask, shift, is_signed),
456 - (expected & (mask >> shift)), /* not sign extended */
457 - expected);
458 -#if 0 /* NB: For checking to see if HAL is fixed or not */
459 - else {
460 - printk("%s: Keeping 0x%04x[%s] - 0x%x (%d).\n",
461 - SC_DEV_NAME(ah->ah_sc),
462 - reg,
463 - name,
464 - (get_field(ah, reg, mask, shift, is_signed) & (mask >> shift)),
465 - get_field(ah, reg, mask, shift, is_signed));
466 - }
467 -#endif
468 -}
469 -
470 -static inline void verification_warning(struct ath_hal *ah, const char *name,
471 - u_int32_t reg, u_int32_t mask,
472 - u_int32_t shift, u_int32_t expected, int is_signed) {
473 -
474 - int ret = field_eq(ah, reg, mask, shift, expected, is_signed);
475 - if (!ret) {
476 - printk("%s: %s verification of %s default value "
477 - "[found=0x%x (%d) expected=0x%x (%d)].\n",
478 - SC_DEV_NAME(ah->ah_sc),
479 - (ret ? "PASSED" : "FAILED"),
480 - name,
481 - (get_field(ah, reg, mask, shift, is_signed) & (mask >> shift)),
482 - get_field(ah, reg, mask, shift, is_signed),
483 - (expected & (mask >> shift)), /* not sign extended */
484 - expected);
485 - ath_hal_print_decoded_register(ah, NULL, reg,
486 - OS_REG_READ(ah, reg), OS_REG_READ(ah, reg), 0);
487 - }
488 -}
489 -
490 -#define GET_FIELD(ah, __reg, __mask, __signed) \
491 - get_field(ah, __reg, __mask, __mask ## _S, __signed)
492 #define SET_FIELD(ah, __reg, __mask, __value) \
493 set_field(ah, __reg, __mask, __mask ## _S, __value);
494 -#define FIELD_EQ(ah, __reg, __mask, __value, __signed) \
495 - field_eq(ah, __reg, __mask, __mask ## _S, __value, __signed)
496 -
497 -#if 0 /* NB: These are working at this point, and HAL tweaks them a lot */
498 -#define OVERRIDE_WARNING(ah, __reg, __mask, __expected, __signed) \
499 - override_warning(ah, #__mask, __reg, __mask, __mask ## _S, __expected, __signed)
500 -#else
501 -#define OVERRIDE_WARNING(ah, __reg, __mask, __expected, __signed)
502 -#endif
503 -
504 -#define VERIFICATION_WARNING(ah, __reg, __mask, __signed) \
505 - verification_warning(ah, #__mask, __reg, __mask, __mask ## _S, DEFAULT_ ## __mask, __signed)
506 -#define VERIFICATION_WARNING_SW(ah, __reg, __mask, __signed) \
507 - verification_warning(ah, #__mask, __reg, __mask, __mask ## _S, DEFAULT_ENABLE_ ## __reg ? __mask ## _ON : __mask ## _OFF, __signed)
508 -
509 -static inline void ath_hal_set_noise_immunity(struct ath_hal *ah,
510 - int agc_desired_size,
511 - int agc_coarse_hi,
512 - int agc_coarse_lo,
513 - int sig_firpwr)
514 -{
515 - ATH_HAL_LOCK_IRQ(ah->ah_sc);
516 - ath_hal_set_function(__func__);
517 - ath_hal_set_device(SC_DEV_NAME(ah->ah_sc));
518 -
519 -#if 0 /* NB: These are working at this point, and HAL tweaks them a lot */
520 - OVERRIDE_WARNING(ah, AR5K_PHY_AGCSIZE, AR5K_PHY_AGCSIZE_DESIRED, agc_desired_size, 1);
521 - OVERRIDE_WARNING(ah, AR5K_PHY_AGCCOARSE, AR5K_PHY_AGCCOARSE_LO, agc_coarse_lo, 1);
522 - OVERRIDE_WARNING(ah, AR5K_PHY_AGCCOARSE, AR5K_PHY_AGCCOARSE_HI, agc_coarse_hi, 1);
523 - OVERRIDE_WARNING(ah, AR5K_PHY_SIG, AR5K_PHY_SIG_FIRPWR, sig_firpwr, 1);
524 -#endif
525 -
526 - SET_FIELD(ah, AR5K_PHY_AGCSIZE, AR5K_PHY_AGCSIZE_DESIRED, agc_desired_size);
527 - SET_FIELD(ah, AR5K_PHY_AGCCOARSE, AR5K_PHY_AGCCOARSE_LO, agc_coarse_lo);
528 - SET_FIELD(ah, AR5K_PHY_AGCCOARSE, AR5K_PHY_AGCCOARSE_HI, agc_coarse_hi);
529 - SET_FIELD(ah, AR5K_PHY_SIG, AR5K_PHY_SIG_FIRPWR, sig_firpwr);
530 -
531 - ath_hal_set_function(NULL);
532 - ath_hal_set_device(NULL);
533 - ATH_HAL_UNLOCK_IRQ(ah->ah_sc);
534 -}
535 -
536 -static inline void ath_hal_set_ofdm_weak_det(struct ath_hal *ah,
537 - int low_m1, int low_m2, int low_m2_count, int low_self_corr,
538 - int high_m1, int high_m2, int high_m2_count)
539 -{
540 - ATH_HAL_LOCK_IRQ(ah->ah_sc);
541 - ath_hal_set_function(__func__);
542 - ath_hal_set_device(SC_DEV_NAME(ah->ah_sc));
543 -
544 - OVERRIDE_WARNING(ah, AR5K_PHY_WEAK_OFDM_LOW, AR5K_PHY_WEAK_OFDM_LOW_M1, low_m1, 0);
545 - OVERRIDE_WARNING(ah, AR5K_PHY_WEAK_OFDM_LOW, AR5K_PHY_WEAK_OFDM_LOW_M2, low_m2, 0);
546 - OVERRIDE_WARNING(ah, AR5K_PHY_WEAK_OFDM_LOW, AR5K_PHY_WEAK_OFDM_LOW_M2_COUNT, low_m2_count, 0);
547 - OVERRIDE_WARNING(ah, AR5K_PHY_WEAK_OFDM_LOW, AR5K_PHY_WEAK_OFDM_LOW_SELFCOR, low_self_corr, 0);
548 - OVERRIDE_WARNING(ah, AR5K_PHY_WEAK_OFDM_HIGH, AR5K_PHY_WEAK_OFDM_HIGH_M1, high_m1, 0);
549 - OVERRIDE_WARNING(ah, AR5K_PHY_WEAK_OFDM_HIGH, AR5K_PHY_WEAK_OFDM_HIGH_M2, high_m2, 0);
550 - OVERRIDE_WARNING(ah, AR5K_PHY_WEAK_OFDM_HIGH, AR5K_PHY_WEAK_OFDM_HIGH_M2_COUNT, high_m2_count, 0);
551 -
552 - SET_FIELD(ah, AR5K_PHY_WEAK_OFDM_LOW, AR5K_PHY_WEAK_OFDM_LOW_M1, low_m1);
553 - SET_FIELD(ah, AR5K_PHY_WEAK_OFDM_LOW, AR5K_PHY_WEAK_OFDM_LOW_M2, low_m2);
554 - SET_FIELD(ah, AR5K_PHY_WEAK_OFDM_LOW, AR5K_PHY_WEAK_OFDM_LOW_M2_COUNT, low_m2_count);
555 - SET_FIELD(ah, AR5K_PHY_WEAK_OFDM_LOW, AR5K_PHY_WEAK_OFDM_LOW_SELFCOR, low_self_corr);
556 - SET_FIELD(ah, AR5K_PHY_WEAK_OFDM_HIGH, AR5K_PHY_WEAK_OFDM_HIGH_M1, high_m1);
557 - SET_FIELD(ah, AR5K_PHY_WEAK_OFDM_HIGH, AR5K_PHY_WEAK_OFDM_HIGH_M2, high_m2);
558 - SET_FIELD(ah, AR5K_PHY_WEAK_OFDM_HIGH, AR5K_PHY_WEAK_OFDM_HIGH_M2_COUNT, high_m2_count);
559 -
560 - ath_hal_set_function(NULL);
561 - ath_hal_set_device(NULL);
562 - ATH_HAL_UNLOCK_IRQ(ah->ah_sc);
563 -}
564 -
565 -static inline void ath_hal_set_cck_weak_det(struct ath_hal *ah, int thresh)
566 -{
567 - ATH_HAL_LOCK_IRQ(ah->ah_sc);
568 - ath_hal_set_function(__func__);
569 - ath_hal_set_device(SC_DEV_NAME(ah->ah_sc));
570 -
571 - OVERRIDE_WARNING(ah, AR5K_PHY_WEAK_CCK, AR5K_PHY_WEAK_CCK_THRESH, thresh, 0);
572 -
573 - SET_FIELD(ah, AR5K_PHY_WEAK_CCK, AR5K_PHY_WEAK_CCK_THRESH, thresh);
574 -
575 - ath_hal_set_function(NULL);
576 - ath_hal_set_device(NULL);
577 - ATH_HAL_UNLOCK_IRQ(ah->ah_sc);
578 -}
579 -
580 -static inline void ath_hal_set_sig_firstep(struct ath_hal *ah, int firstep)
581 -{
582 - ATH_HAL_LOCK_IRQ(ah->ah_sc);
583 - ath_hal_set_function(__func__);
584 - ath_hal_set_device(SC_DEV_NAME(ah->ah_sc));
585
586 - OVERRIDE_WARNING(ah, AR5K_PHY_SIG, AR5K_PHY_SIG_FIRSTEP, firstep, 0);
587 -
588 - SET_FIELD(ah, AR5K_PHY_SIG, AR5K_PHY_SIG_FIRSTEP, firstep);
589 -
590 - ath_hal_set_function(NULL);
591 - ath_hal_set_device(NULL);
592 - ATH_HAL_UNLOCK_IRQ(ah->ah_sc);
593 -}
594 -
595 -static inline void ath_hal_set_spur_immunity(struct ath_hal *ah, int thresh)
596 -{
597 - ATH_HAL_LOCK_IRQ(ah->ah_sc);
598 - ath_hal_set_function(__func__);
599 - ath_hal_set_device(SC_DEV_NAME(ah->ah_sc));
600 -
601 - OVERRIDE_WARNING(ah, AR5K_PHY_SPUR, AR5K_PHY_SPUR_THRESH, thresh, 0);
602 -
603 - SET_FIELD(ah, AR5K_PHY_SPUR, AR5K_PHY_SPUR_THRESH, thresh);
604 -
605 - ath_hal_set_function(NULL);
606 - ath_hal_set_device(NULL);
607 - ATH_HAL_UNLOCK_IRQ(ah->ah_sc);
608 -}
609 -
610 -static inline void ath_hal_restore_default_noise_immunity(struct ath_hal *ah) {
611 -
612 - ath_hal_set_noise_immunity(ah,
613 - DEFAULT_AR5K_PHY_AGCSIZE_DESIRED,
614 - DEFAULT_AR5K_PHY_AGCCOARSE_HI,
615 - DEFAULT_AR5K_PHY_AGCCOARSE_LO,
616 - DEFAULT_AR5K_PHY_SIG_FIRPWR);
617 -}
618 -
619 -static inline void ath_hal_enable_ofdm_weak_det(struct ath_hal *ah, int enable) {
620 - if (enable)
621 - ath_hal_set_ofdm_weak_det(ah,
622 - AR5K_PHY_WEAK_OFDM_LOW_M1_ON,
623 - AR5K_PHY_WEAK_OFDM_LOW_M2_ON,
624 - AR5K_PHY_WEAK_OFDM_LOW_M2_COUNT_ON,
625 - AR5K_PHY_WEAK_OFDM_LOW_SELFCOR_ON,
626 - AR5K_PHY_WEAK_OFDM_HIGH_M1_ON,
627 - AR5K_PHY_WEAK_OFDM_HIGH_M2_ON,
628 - AR5K_PHY_WEAK_OFDM_HIGH_M2_COUNT_ON);
629 - else
630 - ath_hal_set_ofdm_weak_det(ah,
631 - AR5K_PHY_WEAK_OFDM_LOW_M1_OFF,
632 - AR5K_PHY_WEAK_OFDM_LOW_M2_OFF,
633 - AR5K_PHY_WEAK_OFDM_LOW_M2_COUNT_OFF,
634 - AR5K_PHY_WEAK_OFDM_LOW_SELFCOR_OFF,
635 - AR5K_PHY_WEAK_OFDM_HIGH_M1_OFF,
636 - AR5K_PHY_WEAK_OFDM_HIGH_M2_OFF,
637 - AR5K_PHY_WEAK_OFDM_HIGH_M2_COUNT_OFF);
638 -}
639 -
640 -static inline void ath_hal_enable_cck_weak_det(struct ath_hal *ah, int enable) {
641 - ath_hal_set_cck_weak_det(ah, enable
642 - ? AR5K_PHY_WEAK_CCK_THRESH_ON
643 - : AR5K_PHY_WEAK_CCK_THRESH_OFF);
644 -}
645 -
646 -static inline void ath_hal_restore_default_ofdm_weak_det(struct ath_hal *ah) {
647 - ath_hal_enable_ofdm_weak_det(ah, DEFAULT_ENABLE_AR5K_PHY_WEAK_OFDM);
648 -}
649 -
650 -static inline void ath_hal_restore_default_cck_weak_det(struct ath_hal *ah) {
651 - ath_hal_enable_cck_weak_det(ah, DEFAULT_ENABLE_AR5K_PHY_WEAK_CCK);
652 -}
653 -
654 -static inline void ath_hal_restore_default_sig_firstep(struct ath_hal *ah) {
655 -
656 - ath_hal_set_sig_firstep(ah,
657 - DEFAULT_AR5K_PHY_SIG_FIRSTEP);
658 -}
659 -
660 -static inline void ath_hal_restore_default_spur_immunity(struct ath_hal *ah) {
661 -
662 - ath_hal_set_spur_immunity(ah,
663 - DEFAULT_AR5K_PHY_SPUR_THRESH);
664 -}
665 -
666 -static inline void ath_hal_restore_default_intmit(struct ath_hal *ah) {
667 - ath_hal_restore_default_noise_immunity(ah);
668 - ath_hal_restore_default_ofdm_weak_det(ah);
669 - ath_hal_restore_default_cck_weak_det(ah);
670 - ath_hal_restore_default_sig_firstep(ah);
671 - ath_hal_restore_default_spur_immunity(ah);
672 -
673 -}
674 -
675 -static inline void ath_hal_verify_default_intmit(struct ath_hal *ah) {
676 - /* Just a list of all the fields above, for sanity checks... */
677 - VERIFICATION_WARNING(ah, AR5K_PHY_AGCSIZE, AR5K_PHY_AGCSIZE_DESIRED, 1);
678 - VERIFICATION_WARNING(ah, AR5K_PHY_AGCCOARSE, AR5K_PHY_AGCCOARSE_LO, 1);
679 - VERIFICATION_WARNING(ah, AR5K_PHY_AGCCOARSE, AR5K_PHY_AGCCOARSE_HI, 1);
680 - VERIFICATION_WARNING(ah, AR5K_PHY_SIG, AR5K_PHY_SIG_FIRPWR, 1);
681 - VERIFICATION_WARNING_SW(ah, AR5K_PHY_WEAK_OFDM_LOW, AR5K_PHY_WEAK_OFDM_LOW_M1, 0);
682 - VERIFICATION_WARNING_SW(ah, AR5K_PHY_WEAK_OFDM_LOW, AR5K_PHY_WEAK_OFDM_LOW_M2, 0);
683 - VERIFICATION_WARNING_SW(ah, AR5K_PHY_WEAK_OFDM_LOW, AR5K_PHY_WEAK_OFDM_LOW_M2_COUNT, 0);
684 - VERIFICATION_WARNING_SW(ah, AR5K_PHY_WEAK_OFDM_LOW, AR5K_PHY_WEAK_OFDM_LOW_SELFCOR, 0);
685 - VERIFICATION_WARNING_SW(ah, AR5K_PHY_WEAK_OFDM_HIGH, AR5K_PHY_WEAK_OFDM_HIGH_M1, 0);
686 - VERIFICATION_WARNING_SW(ah, AR5K_PHY_WEAK_OFDM_HIGH, AR5K_PHY_WEAK_OFDM_HIGH_M2, 0);
687 - VERIFICATION_WARNING_SW(ah, AR5K_PHY_WEAK_OFDM_HIGH, AR5K_PHY_WEAK_OFDM_HIGH_M2_COUNT, 0);
688 - VERIFICATION_WARNING_SW(ah, AR5K_PHY_WEAK_CCK, AR5K_PHY_WEAK_CCK_THRESH, 0);
689 - VERIFICATION_WARNING(ah, AR5K_PHY_SIG, AR5K_PHY_SIG_FIRSTEP, 0);
690 - VERIFICATION_WARNING(ah, AR5K_PHY_SPUR, AR5K_PHY_SPUR_THRESH, 0);
691 -}
692 +int ath_set_ack_bitrate(struct ath_softc *sc, int);
693 +int ar_device(int devid);
694 +const char * ath5k_chip_name(enum ath5k_srev_type type, u_int16_t val);
695
696 static inline void ath_hal_set_dmasize_pcie(struct ath_hal *ah) {
697 SET_FIELD(ah, AR5K_TXCFG, AR5K_TXCFG_SDMAMR, AR5K_DMASIZE_128B);
698 --- a/ath/if_ath_hal.h
699 +++ b/ath/if_ath_hal.h
700 @@ -79,7 +79,7 @@
701 ath_hal_set_function(__func__);
702 ath_hal_set_device(SC_DEV_NAME(ah->ah_sc));
703 ret =
704 - ah->ah_getDiagState(ah, request, args, argsize, *result,
705 + ah->ah_getDiagState(ah, request, args, argsize, result,
706 resultsize);
707 ath_hal_set_function(NULL);
708 ath_hal_set_device(NULL);
709 --- a/scripts/if_ath_hal_generator.pl
710 +++ b/scripts/if_ath_hal_generator.pl
711 @@ -145,7 +145,9 @@
712 "ah_waitForBeaconDone" => "ath_hal_waitforbeacon",
713 "ah_writeAssocid" => "ath_hal_setassocid",
714 "ah_clrMulticastFilterIndex" => "ath_hal_clearmcastfilter",
715 - "ah_detectCardPresent" => "ath_hal_detectcardpresent"
716 + "ah_detectCardPresent" => "ath_hal_detectcardpresent",
717 + "ah_setSifsTime" => "ath_hal_setsifstime",
718 + "ah_getSifsTime" => "ath_hal_getsifstime"
719 );
720
721 #
722 @@ -254,7 +256,7 @@
723
724 foreach (@parameters) {
725 s/ \*/\* /;
726 - /^((?:(?:const|struct|\*)\s*)*)([^\s]+\*?)\s*([^\s]*)\s*/;
727 + /^((?:(?:const|struct|\*)\s*)*)([^\s]+\**)\s*([^\s]*)\s*/;
728 my $type = "$1$2";
729 my $name = "$3";
730 if ( 0 == length($name) ) {