lantiq: Tune the XWAY subtarget cflags
[openwrt/svn-archive/archive.git] / package / platform / lantiq / ltq-ptm / src / ifxmips_ptm_adsl.h
1 /******************************************************************************
2 **
3 ** FILE NAME : ifxmips_ptm_adsl.h
4 ** PROJECT : UEIP
5 ** MODULES : PTM
6 **
7 ** DATE : 7 Jul 2009
8 ** AUTHOR : Xu Liang
9 ** DESCRIPTION : PTM driver header file (core functions for Danube/Amazon-SE/
10 ** AR9)
11 ** COPYRIGHT : Copyright (c) 2006
12 ** Infineon Technologies AG
13 ** Am Campeon 1-12, 85579 Neubiberg, Germany
14 **
15 ** This program is free software; you can redistribute it and/or modify
16 ** it under the terms of the GNU General Public License as published by
17 ** the Free Software Foundation; either version 2 of the License, or
18 ** (at your option) any later version.
19 **
20 ** HISTORY
21 ** $Date $Author $Comment
22 ** 17 JUN 2009 Xu Liang Init Version
23 *******************************************************************************/
24
25 #ifndef IFXMIPS_PTM_ADSL_H
26 #define IFXMIPS_PTM_ADSL_H
27
28
29
30 #include <linux/version.h>
31 #include <linux/netdevice.h>
32 #include <lantiq_ptm.h>
33 #include "ifxmips_ptm_common.h"
34 #include "ifxmips_ptm_ppe_common.h"
35 #include "ifxmips_ptm_fw_regs_adsl.h"
36
37 #define CONFIG_IFXMIPS_DSL_CPE_MEI
38 #define INT_NUM_IM2_IRL24 (INT_NUM_IM2_IRL0 + 24)
39
40 #define IFX_REG_W32(_v, _r) __raw_writel((_v), (volatile unsigned int *)(_r))
41 #define IFX_REG_R32(_r) __raw_readl((volatile unsigned int *)(_r))
42 #define IFX_REG_W32_MASK(_clr, _set, _r) IFX_REG_W32((IFX_REG_R32((_r)) & ~(_clr)) | (_set), (_r))
43 #define SET_BITS(x, msb, lsb, value) (((x) & ~(((1 << ((msb) + 1)) - 1) ^ ((1 << (lsb)) - 1))) | (((value) & ((1 << (1 + (msb) - (lsb))) - 1)) << (lsb)))
44
45
46
47
48 /*
49 * ####################################
50 * Definition
51 * ####################################
52 */
53
54 /*
55 * Constant Definition
56 */
57 #define ETH_WATCHDOG_TIMEOUT (2 * HZ)
58
59 /*
60 * DMA RX/TX Channel Parameters
61 */
62 #define MAX_ITF_NUMBER 2
63 #define MAX_RX_DMA_CHANNEL_NUMBER MAX_ITF_NUMBER
64 #define MAX_TX_DMA_CHANNEL_NUMBER MAX_ITF_NUMBER
65 #define DATA_BUFFER_ALIGNMENT EMA_ALIGNMENT
66 #define DESC_ALIGNMENT 8
67
68 /*
69 * Ethernet Frame Definitions
70 */
71 #define ETH_MAC_HEADER_LENGTH 14
72 #define ETH_CRC_LENGTH 4
73 #define ETH_MIN_FRAME_LENGTH 64
74 #define ETH_MAX_FRAME_LENGTH (1518 + 4 * 2)
75
76 /*
77 * RX Frame Definitions
78 */
79 #define RX_HEAD_MAC_ADDR_ALIGNMENT 2
80 #define RX_TAIL_CRC_LENGTH 0 // PTM firmware does not have ethernet frame CRC
81 // The len in descriptor doesn't include ETH_CRC
82 // because ETH_CRC may not present in some configuration
83
84
85
86 /*
87 * ####################################
88 * Data Type
89 * ####################################
90 */
91
92 struct ptm_itf {
93 volatile struct rx_descriptor *rx_desc;
94 unsigned int rx_desc_pos;
95
96 volatile struct tx_descriptor *tx_desc;
97 unsigned int tx_desc_pos;
98 struct sk_buff **tx_skb;
99
100 struct net_device_stats stats;
101
102 struct napi_struct napi;
103 };
104
105 struct ptm_priv_data {
106 struct ptm_itf itf[MAX_ITF_NUMBER];
107
108 void *rx_desc_base;
109 void *tx_desc_base;
110 void *tx_skb_base;
111 };
112
113
114
115 /*
116 * ####################################
117 * Declaration
118 * ####################################
119 */
120
121 extern unsigned int ifx_ptm_dbg_enable;
122
123 extern void ifx_ptm_get_fw_ver(unsigned int *major, unsigned int *minor);
124
125 extern void ifx_ptm_init_chip(void);
126 extern void ifx_ptm_uninit_chip(void);
127
128 extern int ifx_pp32_start(int pp32);
129 extern void ifx_pp32_stop(int pp32);
130
131 extern void ifx_reset_ppe(void);
132
133 extern int ifx_ptm_proc_read_regs(char *page, char **start, off_t off, int count, int *eof, void *data);
134
135
136
137 #endif // IFXMIPS_PTM_ADSL_H