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c5459b508271a150ca0cab56a794175fc5a99735
[openwrt/svn-archive/archive.git] / package / rt2x00 / src / rt2500usb.c
1 /*
2 Copyright (C) 2004 - 2007 rt2x00 SourceForge Project
3 <http://rt2x00.serialmonkey.com>
4
5 This program is free software; you can redistribute it and/or modify
6 it under the terms of the GNU General Public License as published by
7 the Free Software Foundation; either version 2 of the License, or
8 (at your option) any later version.
9
10 This program is distributed in the hope that it will be useful,
11 but WITHOUT ANY WARRANTY; without even the implied warranty of
12 MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
13 GNU General Public License for more details.
14
15 You should have received a copy of the GNU General Public License
16 along with this program; if not, write to the
17 Free Software Foundation, Inc.,
18 59 Temple Place - Suite 330, Boston, MA 02111-1307, USA.
19 */
20
21 /*
22 Module: rt2500usb
23 Abstract: rt2500usb device specific routines.
24 Supported chipsets: RT2570.
25 */
26
27 /*
28 * Set enviroment defines for rt2x00.h
29 */
30 #define DRV_NAME "rt2500usb"
31
32 #include <linux/kernel.h>
33 #include <linux/module.h>
34 #include <linux/version.h>
35 #include <linux/init.h>
36 #include <linux/usb.h>
37 #include <linux/delay.h>
38 #include <linux/etherdevice.h>
39
40 #include "rt2x00.h"
41 #include "rt2x00usb.h"
42 #include "rt2500usb.h"
43
44 /*
45 * Register access.
46 * All access to the CSR registers will go through the methods
47 * rt2500usb_register_read and rt2500usb_register_write.
48 * BBP and RF register require indirect register access,
49 * and use the CSR registers BBPCSR and RFCSR to achieve this.
50 * These indirect registers work with busy bits,
51 * and we will try maximal REGISTER_BUSY_COUNT times to access
52 * the register while taking a REGISTER_BUSY_DELAY us delay
53 * between each attampt. When the busy bit is still set at that time,
54 * the access attempt is considered to have failed,
55 * and we will print an error.
56 */
57 static inline void rt2500usb_register_read(
58 const struct rt2x00_dev *rt2x00dev,
59 const u16 offset, u16 *value)
60 {
61 __le16 reg;
62 rt2x00usb_vendor_request(
63 rt2x00dev, USB_MULTI_READ, USB_VENDOR_REQUEST_IN,
64 offset, 0x00, &reg, sizeof(u16), REGISTER_TIMEOUT);
65 *value = le16_to_cpu(reg);
66 }
67
68 static inline void rt2500usb_register_multiread(
69 const struct rt2x00_dev *rt2x00dev,
70 const u16 offset, void *value, const u16 length)
71 {
72 rt2x00usb_vendor_request(
73 rt2x00dev, USB_MULTI_READ, USB_VENDOR_REQUEST_IN,
74 offset, 0x00, value, length,
75 REGISTER_TIMEOUT * (length / sizeof(u16)));
76 }
77
78 static inline void rt2500usb_register_write(
79 const struct rt2x00_dev *rt2x00dev,
80 const u16 offset, u16 value)
81 {
82 __le16 reg = cpu_to_le16(value);
83 rt2x00usb_vendor_request(
84 rt2x00dev, USB_MULTI_WRITE, USB_VENDOR_REQUEST_OUT,
85 offset, 0x00, &reg, sizeof(u16), REGISTER_TIMEOUT);
86 }
87
88 static inline void rt2500usb_register_multiwrite(
89 const struct rt2x00_dev *rt2x00dev,
90 const u16 offset, void *value, const u16 length)
91 {
92 rt2x00usb_vendor_request(
93 rt2x00dev, USB_MULTI_WRITE, USB_VENDOR_REQUEST_OUT,
94 offset, 0x00, value, length,
95 REGISTER_TIMEOUT * (length / sizeof(u16)));
96 }
97
98 static u16 rt2500usb_bbp_check(const struct rt2x00_dev *rt2x00dev)
99 {
100 u16 reg;
101 unsigned int i;
102
103 for (i = 0; i < REGISTER_BUSY_COUNT; i++) {
104 rt2500usb_register_read(rt2x00dev, PHY_CSR8, &reg);
105 if (!rt2x00_get_field16(reg, PHY_CSR8_BUSY))
106 break;
107 udelay(REGISTER_BUSY_DELAY);
108 }
109
110 return reg;
111 }
112
113 static void rt2500usb_bbp_write(const struct rt2x00_dev *rt2x00dev,
114 const u8 reg_id, const u8 value)
115 {
116 u16 reg;
117
118 /*
119 * Wait until the BBP becomes ready.
120 */
121 reg = rt2500usb_bbp_check(rt2x00dev);
122 if (rt2x00_get_field16(reg, PHY_CSR8_BUSY)) {
123 ERROR(rt2x00dev, "PHY_CSR8 register busy. Write failed.\n");
124 return;
125 }
126
127 /*
128 * Write the data into the BBP.
129 */
130 reg = 0;
131 rt2x00_set_field16(&reg, PHY_CSR7_DATA, value);
132 rt2x00_set_field16(&reg, PHY_CSR7_REG_ID, reg_id);
133 rt2x00_set_field16(&reg, PHY_CSR7_READ_CONTROL, 0);
134
135 rt2500usb_register_write(rt2x00dev, PHY_CSR7, reg);
136 }
137
138 static void rt2500usb_bbp_read(const struct rt2x00_dev *rt2x00dev,
139 const u8 reg_id, u8 *value)
140 {
141 u16 reg;
142
143 /*
144 * Wait until the BBP becomes ready.
145 */
146 reg = rt2500usb_bbp_check(rt2x00dev);
147 if (rt2x00_get_field16(reg, PHY_CSR8_BUSY)) {
148 ERROR(rt2x00dev, "PHY_CSR8 register busy. Read failed.\n");
149 return;
150 }
151
152 /*
153 * Write the request into the BBP.
154 */
155 reg =0;
156 rt2x00_set_field16(&reg, PHY_CSR7_REG_ID, reg_id);
157 rt2x00_set_field16(&reg, PHY_CSR7_READ_CONTROL, 1);
158
159 rt2500usb_register_write(rt2x00dev, PHY_CSR7, reg);
160
161 /*
162 * Wait until the BBP becomes ready.
163 */
164 reg = rt2500usb_bbp_check(rt2x00dev);
165 if (rt2x00_get_field16(reg, PHY_CSR8_BUSY)) {
166 ERROR(rt2x00dev, "PHY_CSR8 register busy. Read failed.\n");
167 *value = 0xff;
168 return;
169 }
170
171 rt2500usb_register_read(rt2x00dev, PHY_CSR7, &reg);
172 *value = rt2x00_get_field16(reg, PHY_CSR7_DATA);
173 }
174
175 static void rt2500usb_rf_write(const struct rt2x00_dev *rt2x00dev,
176 const u32 value)
177 {
178 u16 reg;
179 unsigned int i;
180
181 for (i = 0; i < REGISTER_BUSY_COUNT; i++) {
182 rt2500usb_register_read(rt2x00dev, PHY_CSR10, &reg);
183 if (!rt2x00_get_field16(reg, PHY_CSR10_RF_BUSY))
184 goto rf_write;
185 udelay(REGISTER_BUSY_DELAY);
186 }
187
188 ERROR(rt2x00dev, "PHY_CSR10 register busy. Write failed.\n");
189 return;
190
191 rf_write:
192 reg = 0;
193 rt2x00_set_field16(&reg, PHY_CSR9_RF_VALUE, value);
194 rt2500usb_register_write(rt2x00dev, PHY_CSR9, reg);
195
196 reg = 0;
197 rt2x00_set_field16(&reg, PHY_CSR10_RF_VALUE, value >> 16);
198 rt2x00_set_field16(&reg, PHY_CSR10_RF_NUMBER_OF_BITS, 20);
199 rt2x00_set_field16(&reg, PHY_CSR10_RF_IF_SELECT, 0);
200 rt2x00_set_field16(&reg, PHY_CSR10_RF_BUSY, 1);
201
202 rt2500usb_register_write(rt2x00dev, PHY_CSR10, reg);
203 }
204
205 #ifdef CONFIG_RT2X00_LIB_DEBUGFS
206 #define CSR_OFFSET(__word) ( CSR_REG_BASE + ((__word) * sizeof(u16)) )
207
208 static void rt2500usb_read_csr(struct rt2x00_dev *rt2x00dev,
209 const unsigned long word, void *data)
210 {
211 rt2500usb_register_read(rt2x00dev, CSR_OFFSET(word), data);
212 }
213
214 static void rt2500usb_write_csr(struct rt2x00_dev *rt2x00dev,
215 const unsigned long word, void *data)
216 {
217 rt2500usb_register_write(rt2x00dev, CSR_OFFSET(word), *((u16*)data));
218 }
219
220 static void rt2500usb_read_eeprom(struct rt2x00_dev *rt2x00dev,
221 const unsigned long word, void *data)
222 {
223 rt2x00_eeprom_read(rt2x00dev, word, data);
224 }
225
226 static void rt2500usb_write_eeprom(struct rt2x00_dev *rt2x00dev,
227 const unsigned long word, void *data)
228 {
229 rt2x00_eeprom_write(rt2x00dev, word, *((u16*)data));
230 }
231
232 static void rt2500usb_read_bbp(struct rt2x00_dev *rt2x00dev,
233 const unsigned long word, void *data)
234 {
235 rt2500usb_bbp_read(rt2x00dev, word, data);
236 }
237
238 static void rt2500usb_write_bbp(struct rt2x00_dev *rt2x00dev,
239 const unsigned long word, void *data)
240 {
241 rt2500usb_bbp_write(rt2x00dev, word, *((u8*)data));
242 }
243
244 static const struct rt2x00debug rt2500usb_rt2x00debug = {
245 .owner = THIS_MODULE,
246 .reg_csr = {
247 .read = rt2500usb_read_csr,
248 .write = rt2500usb_write_csr,
249 .word_size = sizeof(u16),
250 .word_count = CSR_REG_SIZE / sizeof(u16),
251 },
252 .reg_eeprom = {
253 .read = rt2500usb_read_eeprom,
254 .write = rt2500usb_write_eeprom,
255 .word_size = sizeof(u16),
256 .word_count = EEPROM_SIZE / sizeof(u16),
257 },
258 .reg_bbp = {
259 .read = rt2500usb_read_bbp,
260 .write = rt2500usb_write_bbp,
261 .word_size = sizeof(u8),
262 .word_count = BBP_SIZE / sizeof(u8),
263 },
264 };
265 #endif /* CONFIG_RT2X00_LIB_DEBUGFS */
266
267 /*
268 * Configuration handlers.
269 */
270 static void rt2500usb_config_bssid(struct rt2x00_dev *rt2x00dev, u8 *bssid)
271 {
272 u16 reg[3];
273
274 memset(&reg, 0, sizeof(reg));
275 memcpy(&reg, bssid, ETH_ALEN);
276
277 /*
278 * The BSSID is passed to us as an array of bytes,
279 * that array is little endian, so no need for byte ordering.
280 */
281 rt2500usb_register_multiwrite(rt2x00dev, MAC_CSR5, &reg, sizeof(reg));
282 }
283
284 static void rt2500usb_config_promisc(struct rt2x00_dev *rt2x00dev,
285 const int promisc)
286 {
287 u16 reg;
288
289 rt2500usb_register_read(rt2x00dev, TXRX_CSR2, &reg);
290 rt2x00_set_field16(&reg, TXRX_CSR2_DROP_NOT_TO_ME, !promisc);
291 rt2500usb_register_write(rt2x00dev, TXRX_CSR2, reg);
292 }
293
294 static void rt2500usb_config_type(struct rt2x00_dev *rt2x00dev,
295 const int type)
296 {
297 u16 reg;
298
299 rt2500usb_register_write(rt2x00dev, TXRX_CSR19, 0);
300
301 /*
302 * Apply hardware packet filter.
303 */
304 rt2500usb_register_read(rt2x00dev, TXRX_CSR2, &reg);
305
306 if (!is_monitor_present(&rt2x00dev->interface) &&
307 (type == IEEE80211_IF_TYPE_IBSS || type == IEEE80211_IF_TYPE_STA))
308 rt2x00_set_field16(&reg, TXRX_CSR2_DROP_TODS, 1);
309 else
310 rt2x00_set_field16(&reg, TXRX_CSR2_DROP_TODS, 0);
311
312 rt2x00_set_field16(&reg, TXRX_CSR2_DROP_CRC, 1);
313 if (is_monitor_present(&rt2x00dev->interface)) {
314 rt2x00_set_field16(&reg, TXRX_CSR2_DROP_PHYSICAL, 0);
315 rt2x00_set_field16(&reg, TXRX_CSR2_DROP_CONTROL, 0);
316 rt2x00_set_field16(&reg, TXRX_CSR2_DROP_VERSION_ERROR, 0);
317 } else {
318 rt2x00_set_field16(&reg, TXRX_CSR2_DROP_PHYSICAL, 1);
319 rt2x00_set_field16(&reg, TXRX_CSR2_DROP_CONTROL, 1);
320 rt2x00_set_field16(&reg, TXRX_CSR2_DROP_VERSION_ERROR, 1);
321 }
322
323 rt2500usb_register_write(rt2x00dev, TXRX_CSR2, reg);
324
325 /*
326 * Enable beacon config
327 */
328 rt2500usb_register_read(rt2x00dev, TXRX_CSR20, &reg);
329 rt2x00_set_field16(&reg, TXRX_CSR20_OFFSET,
330 (PREAMBLE + get_duration(IEEE80211_HEADER, 2)) >> 6);
331 if (type == IEEE80211_IF_TYPE_STA)
332 rt2x00_set_field16(&reg, TXRX_CSR20_BCN_EXPECT_WINDOW, 0);
333 else
334 rt2x00_set_field16(&reg, TXRX_CSR20_BCN_EXPECT_WINDOW, 2);
335 rt2500usb_register_write(rt2x00dev, TXRX_CSR20, reg);
336
337 /*
338 * Enable synchronisation.
339 */
340 rt2500usb_register_read(rt2x00dev, TXRX_CSR18, &reg);
341 rt2x00_set_field16(&reg, TXRX_CSR18_OFFSET, 0);
342 rt2500usb_register_write(rt2x00dev, TXRX_CSR18, reg);
343
344 rt2500usb_register_read(rt2x00dev, TXRX_CSR19, &reg);
345 if (is_interface_present(&rt2x00dev->interface)) {
346 rt2x00_set_field16(&reg, TXRX_CSR19_TSF_COUNT, 1);
347 rt2x00_set_field16(&reg, TXRX_CSR19_TBCN, 1);
348 }
349
350 rt2x00_set_field16(&reg, TXRX_CSR19_BEACON_GEN, 0);
351 if (type == IEEE80211_IF_TYPE_IBSS || type == IEEE80211_IF_TYPE_AP)
352 rt2x00_set_field16(&reg, TXRX_CSR19_TSF_SYNC, 2);
353 else if (type == IEEE80211_IF_TYPE_STA)
354 rt2x00_set_field16(&reg, TXRX_CSR19_TSF_SYNC, 1);
355 else if (is_monitor_present(&rt2x00dev->interface) &&
356 !is_interface_present(&rt2x00dev->interface))
357 rt2x00_set_field16(&reg, TXRX_CSR19_TSF_SYNC, 0);
358
359 rt2500usb_register_write(rt2x00dev, TXRX_CSR19, reg);
360 }
361
362 static void rt2500usb_config_channel(struct rt2x00_dev *rt2x00dev,
363 const int value, const int channel, const int txpower)
364 {
365 u32 rf1 = rt2x00dev->rf1;
366 u32 rf2 = value;
367 u32 rf3 = rt2x00dev->rf3;
368 u32 rf4 = rt2x00dev->rf4;
369
370 if (rt2x00_rf(&rt2x00dev->chip, RF2525))
371 rf2 |= 0x00080000;
372
373 if ((rt2x00_rf(&rt2x00dev->chip, RF2523) ||
374 rt2x00_rf(&rt2x00dev->chip, RF2524) ||
375 rt2x00_rf(&rt2x00dev->chip, RF2525)) &&
376 channel == 14)
377 rf4 &= ~0x00000018;
378
379 if (rt2x00_rf(&rt2x00dev->chip, RF2525E)) {
380 if (channel & 0x01)
381 rf4 = 0x00000e1b;
382 else
383 rf4 = 0x00000e07;
384 if (channel == 14)
385 rf4 = 0x00000e23;
386 }
387
388 if (rt2x00_rf(&rt2x00dev->chip, RF5222)) {
389 if (channel < 14) {
390 rf1 = 0x00022020;
391 rf4 = 0x00000a0b;
392 } else if (channel == 14) {
393 rf1 = 0x00022010;
394 rf4 = 0x00000a1b;
395 } else if (channel < 64) {
396 rf1 = 0x00022010;
397 rf4 = 0x00000a1f;
398 } else if (channel < 140) {
399 rf1 = 0x00022010;
400 rf4 = 0x00000a0f;
401 } else if (channel < 161) {
402 rf1 = 0x00022020;
403 rf4 = 0x00000a07;
404 }
405 }
406
407 /*
408 * Set TXpower.
409 */
410 rt2x00_set_field32(&rf3, RF3_TXPOWER, TXPOWER_TO_DEV(txpower));
411
412 /*
413 * For RT2525E we should first set the channel to half band higher.
414 */
415 if (rt2x00_rf(&rt2x00dev->chip, RF2525E)) {
416 static const u32 vals[] = {
417 0x000008aa, 0x000008ae, 0x000008ae, 0x000008b2,
418 0x000008b2, 0x000008b6, 0x000008b6, 0x000008ba,
419 0x000008ba, 0x000008be, 0x000008b7, 0x00000902,
420 0x00000902, 0x00000906
421 };
422
423 rt2500usb_rf_write(rt2x00dev, vals[channel - 1]);
424 if (rf4)
425 rt2500usb_rf_write(rt2x00dev, rf4);
426 }
427
428 rt2500usb_rf_write(rt2x00dev, rf1);
429 rt2500usb_rf_write(rt2x00dev, rf2);
430 rt2500usb_rf_write(rt2x00dev, rf3);
431 if (rf4)
432 rt2500usb_rf_write(rt2x00dev, rf4);
433
434 /*
435 * Update rf fields
436 */
437 rt2x00dev->rf1 = rf1;
438 rt2x00dev->rf2 = rf2;
439 rt2x00dev->rf3 = rf3;
440 rt2x00dev->rf4 = rf4;
441 rt2x00dev->tx_power = txpower;
442 }
443
444 static void rt2500usb_config_txpower(struct rt2x00_dev *rt2x00dev,
445 const int txpower)
446 {
447 rt2x00_set_field32(&rt2x00dev->rf3, RF3_TXPOWER,
448 TXPOWER_TO_DEV(txpower));
449 rt2500usb_rf_write(rt2x00dev, rt2x00dev->rf3);
450 }
451
452 static void rt2500usb_config_antenna(struct rt2x00_dev *rt2x00dev,
453 const int antenna_tx, const int antenna_rx)
454 {
455 u8 r2;
456 u8 r14;
457 u16 csr5;
458 u16 csr6;
459
460 rt2500usb_bbp_read(rt2x00dev, 2, &r2);
461 rt2500usb_bbp_read(rt2x00dev, 14, &r14);
462 rt2500usb_register_read(rt2x00dev, PHY_CSR5, &csr5);
463 rt2500usb_register_read(rt2x00dev, PHY_CSR6, &csr6);
464
465 /*
466 * Configure the TX antenna.
467 */
468 if (antenna_tx == ANTENNA_DIVERSITY) {
469 rt2x00_set_field8(&r2, BBP_R2_TX_ANTENNA, 1);
470 rt2x00_set_field16(&csr5, PHY_CSR5_CCK, 1);
471 rt2x00_set_field16(&csr6, PHY_CSR6_OFDM, 1);
472 } else if (antenna_tx == ANTENNA_A) {
473 rt2x00_set_field8(&r2, BBP_R2_TX_ANTENNA, 0);
474 rt2x00_set_field16(&csr5, PHY_CSR5_CCK, 0);
475 rt2x00_set_field16(&csr6, PHY_CSR6_OFDM, 0);
476 } else if (antenna_tx == ANTENNA_B) {
477 rt2x00_set_field8(&r2, BBP_R2_TX_ANTENNA, 2);
478 rt2x00_set_field16(&csr5, PHY_CSR5_CCK, 2);
479 rt2x00_set_field16(&csr6, PHY_CSR6_OFDM, 2);
480 }
481
482 /*
483 * Configure the RX antenna.
484 */
485 if (antenna_rx == ANTENNA_DIVERSITY)
486 rt2x00_set_field8(&r14, BBP_R14_RX_ANTENNA, 1);
487 else if (antenna_rx == ANTENNA_A)
488 rt2x00_set_field8(&r14, BBP_R14_RX_ANTENNA, 0);
489 else if (antenna_rx == ANTENNA_B)
490 rt2x00_set_field8(&r14, BBP_R14_RX_ANTENNA, 2);
491
492 /*
493 * RT2525E and RT5222 need to flip TX I/Q
494 */
495 if (rt2x00_rf(&rt2x00dev->chip, RF2525E) ||
496 rt2x00_rf(&rt2x00dev->chip, RF5222)) {
497 rt2x00_set_field8(&r2, BBP_R2_TX_IQ_FLIP, 1);
498 rt2x00_set_field16(&csr5, PHY_CSR5_CCK_FLIP, 1);
499 rt2x00_set_field16(&csr6, PHY_CSR6_OFDM_FLIP, 1);
500
501 /*
502 * RT2525E does not need RX I/Q Flip.
503 */
504 if (rt2x00_rf(&rt2x00dev->chip, RF2525E))
505 rt2x00_set_field8(&r14, BBP_R14_RX_IQ_FLIP, 0);
506 } else {
507 rt2x00_set_field16(&csr5, PHY_CSR5_CCK_FLIP, 0);
508 rt2x00_set_field16(&csr6, PHY_CSR6_OFDM_FLIP, 0);
509 }
510
511 rt2500usb_bbp_write(rt2x00dev, 2, r2);
512 rt2500usb_bbp_write(rt2x00dev, 14, r14);
513 rt2500usb_register_write(rt2x00dev, PHY_CSR5, csr5);
514 rt2500usb_register_write(rt2x00dev, PHY_CSR6, csr6);
515 }
516
517 static void rt2500usb_config_duration(struct rt2x00_dev *rt2x00dev,
518 const int short_slot_time, const int beacon_int)
519 {
520 u16 reg;
521
522 rt2500usb_register_write(rt2x00dev, MAC_CSR10,
523 short_slot_time ? SHORT_SLOT_TIME : SLOT_TIME);
524
525 rt2500usb_register_read(rt2x00dev, TXRX_CSR18, &reg);
526 rt2x00_set_field16(&reg, TXRX_CSR18_INTERVAL, beacon_int * 4);
527 rt2500usb_register_write(rt2x00dev, TXRX_CSR18, reg);
528 }
529
530 static void rt2500usb_config_rate(struct rt2x00_dev *rt2x00dev, const int rate)
531 {
532 struct ieee80211_conf *conf = &rt2x00dev->hw->conf;
533 u16 reg;
534 u16 value;
535 u16 preamble;
536
537 preamble = DEVICE_GET_RATE_FIELD(rate, PREAMBLE)
538 ? SHORT_PREAMBLE : PREAMBLE;
539
540 reg = DEVICE_GET_RATE_FIELD(rate, RATEMASK) & DEV_BASIC_RATE;
541
542 rt2500usb_register_write(rt2x00dev, TXRX_CSR11, reg);
543
544 rt2500usb_register_read(rt2x00dev, TXRX_CSR1, &reg);
545 value = ((conf->flags & IEEE80211_CONF_SHORT_SLOT_TIME) ?
546 SHORT_DIFS : DIFS) +
547 PLCP + preamble + get_duration(ACK_SIZE, 10);
548 rt2x00_set_field16(&reg, TXRX_CSR1_ACK_TIMEOUT, value);
549 rt2500usb_register_write(rt2x00dev, TXRX_CSR1, reg);
550
551 rt2500usb_register_read(rt2x00dev, TXRX_CSR10, &reg);
552 if (preamble == SHORT_PREAMBLE)
553 rt2x00_set_field16(&reg, TXRX_CSR10_AUTORESPOND_PREAMBLE, 1);
554 else
555 rt2x00_set_field16(&reg, TXRX_CSR10_AUTORESPOND_PREAMBLE, 0);
556 rt2500usb_register_write(rt2x00dev, TXRX_CSR10, reg);
557 }
558
559 static void rt2500usb_config_phymode(struct rt2x00_dev *rt2x00dev,
560 const int phymode)
561 {
562 struct ieee80211_hw_mode *mode;
563 struct ieee80211_rate *rate;
564
565 if (phymode == MODE_IEEE80211A)
566 rt2x00dev->curr_hwmode = HWMODE_A;
567 else if (phymode == MODE_IEEE80211B)
568 rt2x00dev->curr_hwmode = HWMODE_B;
569 else
570 rt2x00dev->curr_hwmode = HWMODE_G;
571
572 mode = &rt2x00dev->hwmodes[rt2x00dev->curr_hwmode];
573 rate = &mode->rates[mode->num_rates - 1];
574
575 rt2500usb_config_rate(rt2x00dev, rate->val2);
576
577 if (phymode == MODE_IEEE80211B) {
578 rt2500usb_register_write(rt2x00dev, MAC_CSR11, 0x000b);
579 rt2500usb_register_write(rt2x00dev, MAC_CSR12, 0x0040);
580 } else {
581 rt2500usb_register_write(rt2x00dev, MAC_CSR11, 0x0005);
582 rt2500usb_register_write(rt2x00dev, MAC_CSR12, 0x016c);
583 }
584 }
585
586 static void rt2500usb_config_mac_addr(struct rt2x00_dev *rt2x00dev, u8 *addr)
587 {
588 u16 reg[3];
589
590 memset(&reg, 0, sizeof(reg));
591 memcpy(&reg, addr, ETH_ALEN);
592
593 /*
594 * The MAC address is passed to us as an array of bytes,
595 * that array is little endian, so no need for byte ordering.
596 */
597 rt2500usb_register_multiwrite(rt2x00dev, MAC_CSR2, &reg, sizeof(reg));
598 }
599
600 /*
601 * LED functions.
602 */
603 static void rt2500usb_enable_led(struct rt2x00_dev *rt2x00dev)
604 {
605 u16 reg;
606
607 rt2500usb_register_read(rt2x00dev, MAC_CSR21, &reg);
608 rt2x00_set_field16(&reg, MAC_CSR21_ON_PERIOD, 70);
609 rt2x00_set_field16(&reg, MAC_CSR21_OFF_PERIOD, 30);
610 rt2500usb_register_write(rt2x00dev, MAC_CSR21, reg);
611
612 rt2500usb_register_read(rt2x00dev, MAC_CSR20, &reg);
613
614 if (rt2x00dev->led_mode == LED_MODE_TXRX_ACTIVITY) {
615 rt2x00_set_field16(&reg, MAC_CSR20_LINK, 1);
616 rt2x00_set_field16(&reg, MAC_CSR20_ACTIVITY, 0);
617 } else if (rt2x00dev->led_mode == LED_MODE_ASUS) {
618 rt2x00_set_field16(&reg, MAC_CSR20_LINK, 0);
619 rt2x00_set_field16(&reg, MAC_CSR20_ACTIVITY, 1);
620 } else {
621 rt2x00_set_field16(&reg, MAC_CSR20_LINK, 1);
622 rt2x00_set_field16(&reg, MAC_CSR20_ACTIVITY, 1);
623 }
624
625 rt2500usb_register_write(rt2x00dev, MAC_CSR20, reg);
626 }
627
628 static void rt2500usb_disable_led(struct rt2x00_dev *rt2x00dev)
629 {
630 u16 reg;
631
632 rt2500usb_register_read(rt2x00dev, MAC_CSR20, &reg);
633 rt2x00_set_field16(&reg, MAC_CSR20_LINK, 0);
634 rt2x00_set_field16(&reg, MAC_CSR20_ACTIVITY, 0);
635 rt2500usb_register_write(rt2x00dev, MAC_CSR20, reg);
636 }
637
638 /*
639 * Link tuning
640 */
641 static void rt2500usb_link_tuner(struct rt2x00_dev *rt2x00dev, int rssi)
642 {
643 u16 bbp_thresh;
644 u16 cca_alarm;
645 u16 vgc_bound;
646 u16 sens;
647 u16 r24;
648 u16 r25;
649 u16 r61;
650 u16 r17_sens;
651 u8 r17;
652 u8 up_bound;
653 u8 low_bound;
654
655 /*
656 * Determine the BBP tuning threshold and correctly
657 * set BBP 24, 25 and 61.
658 */
659 rt2x00_eeprom_read(rt2x00dev, EEPROM_BBPTUNE, &bbp_thresh);
660 bbp_thresh = rt2x00_get_field16(bbp_thresh, EEPROM_BBPTUNE_THRESHOLD);
661
662 rt2x00_eeprom_read(rt2x00dev, EEPROM_BBPTUNE_R24, &r24);
663 rt2x00_eeprom_read(rt2x00dev, EEPROM_BBPTUNE_R25, &r25);
664 rt2x00_eeprom_read(rt2x00dev, EEPROM_BBPTUNE_R61, &r61);
665
666 if ((rssi + bbp_thresh) > 0) {
667 r24 = rt2x00_get_field16(r24, EEPROM_BBPTUNE_R24_HIGH);
668 r25 = rt2x00_get_field16(r25, EEPROM_BBPTUNE_R25_HIGH);
669 r61 = rt2x00_get_field16(r61, EEPROM_BBPTUNE_R61_HIGH);
670 } else {
671 r24 = rt2x00_get_field16(r24, EEPROM_BBPTUNE_R24_LOW);
672 r25 = rt2x00_get_field16(r25, EEPROM_BBPTUNE_R25_LOW);
673 r61 = rt2x00_get_field16(r61, EEPROM_BBPTUNE_R61_LOW);
674 }
675
676 rt2500usb_bbp_write(rt2x00dev, 24, r24);
677 rt2500usb_bbp_write(rt2x00dev, 25, r25);
678 rt2500usb_bbp_write(rt2x00dev, 61, r61);
679
680 /*
681 * Read current r17 value, as well as the sensitivity values
682 * for the r17 register.
683 */
684 rt2500usb_bbp_read(rt2x00dev, 17, &r17);
685 rt2x00_eeprom_read(rt2x00dev, EEPROM_BBPTUNE_R17, &r17_sens);
686
687 /*
688 * A too low RSSI will cause too much false CCA which will
689 * then corrupt the R17 tuning. To remidy this the tuning should
690 * be stopped (While making sure the R17 value will not exceed limits)
691 */
692 if (rssi >= -40) {
693 if (r17 != 0x60)
694 rt2500usb_bbp_write(rt2x00dev, 17, 0x60);
695 return;
696 }
697
698 /*
699 * Special big-R17 for short distance
700 */
701 if (rssi >= -58) {
702 sens = rt2x00_get_field16(r17_sens, EEPROM_BBPTUNE_R17_LOW);
703 if (r17 != sens)
704 rt2500usb_bbp_write(rt2x00dev, 17, sens);
705 return;
706 }
707
708 /*
709 * Special mid-R17 for middle distance
710 */
711 if (rssi >= -74) {
712 sens = rt2x00_get_field16(r17_sens, EEPROM_BBPTUNE_R17_HIGH);
713 if (r17 != sens)
714 rt2500usb_bbp_write(rt2x00dev, 17, sens);
715 return;
716 }
717
718 /*
719 * Leave short or middle distance condition, restore r17
720 * to the dynamic tuning range.
721 */
722 rt2500usb_register_read(rt2x00dev, STA_CSR3, &cca_alarm);
723 rt2x00_eeprom_read(rt2x00dev, EEPROM_BBPTUNE_VGC, &vgc_bound);
724 vgc_bound = rt2x00_get_field16(vgc_bound, EEPROM_BBPTUNE_VGCUPPER);
725
726 low_bound = 0x32;
727 if (rssi >= -77)
728 up_bound = vgc_bound;
729 else
730 up_bound = vgc_bound - (-77 - rssi);
731
732 if (up_bound < low_bound)
733 up_bound = low_bound;
734
735 if (r17 > up_bound) {
736 rt2500usb_bbp_write(rt2x00dev, 17, up_bound);
737 rt2x00dev->link.curr_noise = up_bound;
738 } else if (cca_alarm > 512 && r17 < up_bound) {
739 rt2500usb_bbp_write(rt2x00dev, 17, ++r17);
740 rt2x00dev->link.curr_noise = r17;
741 } else if (cca_alarm < 100 && r17 > low_bound) {
742 rt2500usb_bbp_write(rt2x00dev, 17, --r17);
743 rt2x00dev->link.curr_noise = r17;
744 }
745 }
746
747 /*
748 * Initialization functions.
749 */
750 static void rt2500usb_init_rxring(struct rt2x00_dev *rt2x00dev)
751 {
752 struct usb_device *usb_dev =
753 interface_to_usbdev(rt2x00dev_usb(rt2x00dev));
754 unsigned int i;
755
756 for (i = 0; i < rt2x00dev->rx->stats.limit; i++) {
757 usb_fill_bulk_urb(
758 rt2x00dev->rx->entry[i].priv,
759 usb_dev,
760 usb_rcvbulkpipe(usb_dev, 1),
761 rt2x00dev->rx->entry[i].skb->data,
762 rt2x00dev->rx->entry[i].skb->len,
763 rt2500usb_interrupt_rxdone,
764 &rt2x00dev->rx->entry[i]);
765 }
766
767 rt2x00_ring_index_clear(rt2x00dev->rx);
768 }
769
770 static void rt2500usb_init_txring(struct rt2x00_dev *rt2x00dev,
771 const int queue)
772 {
773 struct data_ring *ring = rt2x00_get_ring(rt2x00dev, queue);
774 unsigned int i;
775
776 for (i = 0; i < ring->stats.limit; i++)
777 ring->entry[i].flags = 0;
778
779 rt2x00_ring_index_clear(ring);
780 }
781
782 static int rt2500usb_init_rings(struct rt2x00_dev *rt2x00dev)
783 {
784 rt2500usb_init_rxring(rt2x00dev);
785 rt2500usb_init_txring(rt2x00dev, IEEE80211_TX_QUEUE_DATA0);
786 rt2500usb_init_txring(rt2x00dev, IEEE80211_TX_QUEUE_DATA1);
787 rt2500usb_init_txring(rt2x00dev, IEEE80211_TX_QUEUE_AFTER_BEACON);
788 rt2500usb_init_txring(rt2x00dev, IEEE80211_TX_QUEUE_BEACON);
789
790 return 0;
791 }
792
793 static int rt2500usb_init_registers(struct rt2x00_dev *rt2x00dev)
794 {
795 u16 reg;
796
797 rt2x00usb_vendor_request(rt2x00dev, USB_DEVICE_MODE,
798 USB_VENDOR_REQUEST_OUT, 0x0001, USB_MODE_TEST, NULL, 0,
799 REGISTER_TIMEOUT);
800 rt2x00usb_vendor_request(rt2x00dev, USB_SINGLE_WRITE,
801 USB_VENDOR_REQUEST_OUT, 0x0308, 0xf0, NULL, 0,
802 REGISTER_TIMEOUT);
803
804 rt2500usb_register_write(rt2x00dev, TXRX_CSR2, 0x0001);
805 rt2500usb_register_write(rt2x00dev, MAC_CSR13, 0x1111);
806 rt2500usb_register_write(rt2x00dev, MAC_CSR14, 0x1e11);
807
808 rt2500usb_register_write(rt2x00dev, MAC_CSR1, 0x0003);
809 rt2500usb_register_write(rt2x00dev, MAC_CSR1, 0x0000);
810 rt2500usb_register_write(rt2x00dev, TXRX_CSR5, 0x8c8d);
811 rt2500usb_register_write(rt2x00dev, TXRX_CSR6, 0x8b8a);
812 rt2500usb_register_write(rt2x00dev, TXRX_CSR7, 0x8687);
813 rt2500usb_register_write(rt2x00dev, TXRX_CSR8, 0x0085);
814 rt2500usb_register_write(rt2x00dev, TXRX_CSR21, 0xe78f);
815 rt2500usb_register_write(rt2x00dev, MAC_CSR9, 0xff1d);
816
817 if (rt2x00dev->ops->lib->set_device_state(rt2x00dev, STATE_AWAKE))
818 return -EBUSY;
819
820 rt2500usb_register_write(rt2x00dev, MAC_CSR1, 0x0004);
821
822 reg = 0;
823 rt2500usb_register_read(rt2x00dev, MAC_CSR0, &reg);
824 if (reg >= 0x0003) {
825 rt2500usb_register_read(rt2x00dev, PHY_CSR2, &reg);
826 reg &= ~0x0002;
827 } else {
828 reg = 0x3002;
829 }
830 rt2500usb_register_write(rt2x00dev, PHY_CSR2, reg);
831
832 rt2500usb_register_write(rt2x00dev, MAC_CSR11, 0x0002);
833 rt2500usb_register_write(rt2x00dev, MAC_CSR22, 0x0053);
834 rt2500usb_register_write(rt2x00dev, MAC_CSR15, 0x01ee);
835 rt2500usb_register_write(rt2x00dev, MAC_CSR16, 0x0000);
836
837 rt2500usb_register_read(rt2x00dev, TXRX_CSR0, &reg);
838 rt2x00_set_field16(&reg, TXRX_CSR0_IV_OFFSET, IEEE80211_HEADER);
839 rt2x00_set_field16(&reg, TXRX_CSR0_KEY_ID, 0xff);
840 rt2500usb_register_write(rt2x00dev, TXRX_CSR0, reg);
841
842 rt2500usb_register_read(rt2x00dev, MAC_CSR8, &reg);
843 rt2x00_set_field16(&reg, MAC_CSR8_MAX_FRAME_UNIT,
844 rt2x00dev->rx->data_size);
845 rt2500usb_register_write(rt2x00dev, MAC_CSR8, reg);
846
847 rt2500usb_register_read(rt2x00dev, MAC_CSR18, &reg);
848 rt2x00_set_field16(&reg, MAC_CSR18_DELAY_AFTER_BEACON, 0x5a);
849 rt2500usb_register_write(rt2x00dev, MAC_CSR18, reg);
850
851 rt2500usb_register_read(rt2x00dev, TXRX_CSR1, &reg);
852 rt2x00_set_field16(&reg, TXRX_CSR1_AUTO_SEQUENCE, 1);
853 rt2500usb_register_write(rt2x00dev, TXRX_CSR1, reg);
854
855 rt2500usb_register_read(rt2x00dev, PHY_CSR4, &reg);
856 rt2500usb_register_write(rt2x00dev, PHY_CSR4, reg | 0x0001);
857
858 return 0;
859 }
860
861 static int rt2500usb_init_bbp(struct rt2x00_dev *rt2x00dev)
862 {
863 unsigned int i;
864 u16 eeprom;
865 u8 value;
866 u8 reg_id;
867
868 for (i = 0; i < REGISTER_BUSY_COUNT; i++) {
869 rt2500usb_bbp_read(rt2x00dev, 0, &value);
870 if ((value != 0xff) && (value != 0x00))
871 goto continue_csr_init;
872 NOTICE(rt2x00dev, "Waiting for BBP register.\n");
873 udelay(REGISTER_BUSY_DELAY);
874 }
875
876 ERROR(rt2x00dev, "BBP register access failed, aborting.\n");
877 return -EACCES;
878
879 continue_csr_init:
880 rt2500usb_bbp_write(rt2x00dev, 3, 0x02);
881 rt2500usb_bbp_write(rt2x00dev, 4, 0x19);
882 rt2500usb_bbp_write(rt2x00dev, 14, 0x1c);
883 rt2500usb_bbp_write(rt2x00dev, 15, 0x30);
884 rt2500usb_bbp_write(rt2x00dev, 16, 0xac);
885 rt2500usb_bbp_write(rt2x00dev, 17, 0x48);
886 rt2500usb_bbp_write(rt2x00dev, 18, 0x18);
887 rt2500usb_bbp_write(rt2x00dev, 19, 0xff);
888 rt2500usb_bbp_write(rt2x00dev, 20, 0x1e);
889 rt2500usb_bbp_write(rt2x00dev, 21, 0x08);
890 rt2500usb_bbp_write(rt2x00dev, 22, 0x08);
891 rt2500usb_bbp_write(rt2x00dev, 23, 0x08);
892 rt2500usb_bbp_write(rt2x00dev, 24, 0x80);
893 rt2500usb_bbp_write(rt2x00dev, 25, 0x50);
894 rt2500usb_bbp_write(rt2x00dev, 26, 0x08);
895 rt2500usb_bbp_write(rt2x00dev, 27, 0x23);
896 rt2500usb_bbp_write(rt2x00dev, 30, 0x10);
897 rt2500usb_bbp_write(rt2x00dev, 31, 0x2b);
898 rt2500usb_bbp_write(rt2x00dev, 32, 0xb9);
899 rt2500usb_bbp_write(rt2x00dev, 34, 0x12);
900 rt2500usb_bbp_write(rt2x00dev, 35, 0x50);
901 rt2500usb_bbp_write(rt2x00dev, 39, 0xc4);
902 rt2500usb_bbp_write(rt2x00dev, 40, 0x02);
903 rt2500usb_bbp_write(rt2x00dev, 41, 0x60);
904 rt2500usb_bbp_write(rt2x00dev, 53, 0x10);
905 rt2500usb_bbp_write(rt2x00dev, 54, 0x18);
906 rt2500usb_bbp_write(rt2x00dev, 56, 0x08);
907 rt2500usb_bbp_write(rt2x00dev, 57, 0x10);
908 rt2500usb_bbp_write(rt2x00dev, 58, 0x08);
909 rt2500usb_bbp_write(rt2x00dev, 61, 0x60);
910 rt2500usb_bbp_write(rt2x00dev, 62, 0x10);
911 rt2500usb_bbp_write(rt2x00dev, 75, 0xff);
912
913 DEBUG(rt2x00dev, "Start initialization from EEPROM...\n");
914 for (i = 0; i < EEPROM_BBP_SIZE; i++) {
915 rt2x00_eeprom_read(rt2x00dev, EEPROM_BBP_START + i, &eeprom);
916
917 if (eeprom != 0xffff && eeprom != 0x0000) {
918 reg_id = rt2x00_get_field16(eeprom, EEPROM_BBP_REG_ID);
919 value = rt2x00_get_field16(eeprom, EEPROM_BBP_VALUE);
920 DEBUG(rt2x00dev, "BBP: 0x%02x, value: 0x%02x.\n",
921 reg_id, value);
922 rt2500usb_bbp_write(rt2x00dev, reg_id, value);
923 }
924 }
925 DEBUG(rt2x00dev, "...End initialization from EEPROM.\n");
926
927 rt2x00_eeprom_read(rt2x00dev, EEPROM_BBPTUNE_R24, &eeprom);
928 value = rt2x00_get_field16(eeprom, EEPROM_BBPTUNE_R24_LOW);
929 rt2500usb_bbp_write(rt2x00dev, 24, value);
930
931 rt2x00_eeprom_read(rt2x00dev, EEPROM_BBPTUNE_R25, &eeprom);
932 value = rt2x00_get_field16(eeprom, EEPROM_BBPTUNE_R25_LOW);
933 rt2500usb_bbp_write(rt2x00dev, 25, value);
934
935 rt2x00_eeprom_read(rt2x00dev, EEPROM_BBPTUNE_R61, &eeprom);
936 value = rt2x00_get_field16(eeprom, EEPROM_BBPTUNE_R61_LOW);
937 rt2500usb_bbp_write(rt2x00dev, 61, value);
938
939 rt2x00_eeprom_read(rt2x00dev, EEPROM_BBPTUNE_VGC, &eeprom);
940 value = rt2x00_get_field16(eeprom, EEPROM_BBPTUNE_VGCUPPER);
941 rt2500usb_bbp_write(rt2x00dev, 17, value);
942
943 return 0;
944 }
945
946 /*
947 * Device state switch handlers.
948 */
949 static void rt2500usb_toggle_rx(struct rt2x00_dev *rt2x00dev,
950 enum dev_state state)
951 {
952 u16 reg;
953
954 rt2500usb_register_read(rt2x00dev, TXRX_CSR2, &reg);
955 rt2x00_set_field16(&reg, TXRX_CSR2_DISABLE_RX,
956 state == STATE_RADIO_RX_OFF);
957 rt2500usb_register_write(rt2x00dev, TXRX_CSR2, reg);
958 }
959
960 static int rt2500usb_enable_radio(struct rt2x00_dev *rt2x00dev)
961 {
962 /*
963 * Initialize all registers.
964 */
965 if (rt2500usb_init_rings(rt2x00dev) ||
966 rt2500usb_init_registers(rt2x00dev) ||
967 rt2500usb_init_bbp(rt2x00dev)) {
968 ERROR(rt2x00dev, "Register initialization failed.\n");
969 return -EIO;
970 }
971
972 rt2x00usb_enable_radio(rt2x00dev);
973
974 /*
975 * Enable LED
976 */
977 rt2500usb_enable_led(rt2x00dev);
978
979 return 0;
980 }
981
982 static void rt2500usb_disable_radio(struct rt2x00_dev *rt2x00dev)
983 {
984 /*
985 * Disable LED
986 */
987 rt2500usb_disable_led(rt2x00dev);
988
989 rt2500usb_register_write(rt2x00dev, MAC_CSR13, 0x2121);
990 rt2500usb_register_write(rt2x00dev, MAC_CSR14, 0x2121);
991
992 /*
993 * Disable synchronisation.
994 */
995 rt2500usb_register_write(rt2x00dev, TXRX_CSR19, 0);
996
997 rt2x00usb_disable_radio(rt2x00dev);
998 }
999
1000 static int rt2500usb_set_state(struct rt2x00_dev *rt2x00dev,
1001 enum dev_state state)
1002 {
1003 u16 reg;
1004 u16 reg2;
1005 unsigned int i;
1006 char put_to_sleep;
1007 char bbp_state;
1008 char rf_state;
1009
1010 put_to_sleep = (state != STATE_AWAKE);
1011
1012 reg = 0;
1013 rt2x00_set_field16(&reg, MAC_CSR17_BBP_DESIRE_STATE, state);
1014 rt2x00_set_field16(&reg, MAC_CSR17_RF_DESIRE_STATE, state);
1015 rt2x00_set_field16(&reg, MAC_CSR17_PUT_TO_SLEEP, put_to_sleep);
1016 rt2500usb_register_write(rt2x00dev, MAC_CSR17, reg);
1017 rt2x00_set_field16(&reg, MAC_CSR17_SET_STATE, 1);
1018 rt2500usb_register_write(rt2x00dev, MAC_CSR17, reg);
1019
1020 /*
1021 * Device is not guaranteed to be in the requested state yet.
1022 * We must wait until the register indicates that the
1023 * device has entered the correct state.
1024 */
1025 for (i = 0; i < REGISTER_BUSY_COUNT; i++) {
1026 rt2500usb_register_read(rt2x00dev, MAC_CSR17, &reg2);
1027 bbp_state = rt2x00_get_field16(reg2, MAC_CSR17_BBP_CURR_STATE);
1028 rf_state = rt2x00_get_field16(reg2, MAC_CSR17_RF_CURR_STATE);
1029 if (bbp_state == state && rf_state == state)
1030 return 0;
1031 rt2500usb_register_write(rt2x00dev, MAC_CSR17, reg);
1032 msleep(30);
1033 }
1034
1035 NOTICE(rt2x00dev, "Device failed to enter state %d, "
1036 "current device state: bbp %d and rf %d.\n",
1037 state, bbp_state, rf_state);
1038
1039 return -EBUSY;
1040 }
1041
1042 static int rt2500usb_set_device_state(struct rt2x00_dev *rt2x00dev,
1043 enum dev_state state)
1044 {
1045 int retval = 0;
1046
1047 switch (state) {
1048 case STATE_RADIO_ON:
1049 retval = rt2500usb_enable_radio(rt2x00dev);
1050 break;
1051 case STATE_RADIO_OFF:
1052 rt2500usb_disable_radio(rt2x00dev);
1053 break;
1054 case STATE_RADIO_RX_ON:
1055 case STATE_RADIO_RX_OFF:
1056 rt2500usb_toggle_rx(rt2x00dev, state);
1057 break;
1058 case STATE_DEEP_SLEEP:
1059 case STATE_SLEEP:
1060 case STATE_STANDBY:
1061 case STATE_AWAKE:
1062 retval = rt2500usb_set_state(rt2x00dev, state);
1063 break;
1064 default:
1065 retval = -ENOTSUPP;
1066 break;
1067 }
1068
1069 return retval;
1070 }
1071
1072 /*
1073 * TX descriptor initialization
1074 */
1075 static void rt2500usb_write_tx_desc(struct rt2x00_dev *rt2x00dev,
1076 struct data_entry *entry, struct data_desc *txd,
1077 struct data_entry_desc *desc, struct ieee80211_hdr *ieee80211hdr,
1078 unsigned int length, struct ieee80211_tx_control *control)
1079 {
1080 u32 word;
1081
1082 /*
1083 * Start writing the descriptor words.
1084 */
1085 rt2x00_desc_read(txd, 1, &word);
1086 rt2x00_set_field32(&word, TXD_W1_IV_OFFSET, IEEE80211_HEADER);
1087 rt2x00_set_field32(&word, TXD_W1_AIFS, entry->ring->tx_params.aifs);
1088 rt2x00_set_field32(&word, TXD_W1_CWMIN, entry->ring->tx_params.cw_min);
1089 rt2x00_set_field32(&word, TXD_W1_CWMAX, entry->ring->tx_params.cw_max);
1090 rt2x00_desc_write(txd, 1, word);
1091
1092 rt2x00_desc_read(txd, 2, &word);
1093 rt2x00_set_field32(&word, TXD_W2_PLCP_SIGNAL, desc->signal);
1094 rt2x00_set_field32(&word, TXD_W2_PLCP_SERVICE, desc->service);
1095 rt2x00_set_field32(&word, TXD_W2_PLCP_LENGTH_LOW, desc->length_low);
1096 rt2x00_set_field32(&word, TXD_W2_PLCP_LENGTH_HIGH, desc->length_high);
1097 rt2x00_desc_write(txd, 2, word);
1098
1099 rt2x00_desc_read(txd, 0, &word);
1100 rt2x00_set_field32(&word, TXD_W0_RETRY_LIMIT, control->retry_limit);
1101 rt2x00_set_field32(&word, TXD_W0_MORE_FRAG,
1102 test_bit(ENTRY_TXD_MORE_FRAG, &entry->flags));
1103 rt2x00_set_field32(&word, TXD_W0_ACK,
1104 test_bit(ENTRY_TXD_REQ_ACK, &entry->flags));
1105 rt2x00_set_field32(&word, TXD_W0_TIMESTAMP,
1106 test_bit(ENTRY_TXD_REQ_TIMESTAMP, &entry->flags));
1107 rt2x00_set_field32(&word, TXD_W0_OFDM,
1108 test_bit(ENTRY_TXD_OFDM_RATE, &entry->flags));
1109 rt2x00_set_field32(&word, TXD_W0_NEW_SEQ,
1110 test_bit(ENTRY_TXD_NEW_SEQ, &entry->flags));
1111 rt2x00_set_field32(&word, TXD_W0_IFS, desc->ifs);
1112 rt2x00_set_field32(&word, TXD_W0_DATABYTE_COUNT, length);
1113 rt2x00_set_field32(&word, TXD_W0_CIPHER, CIPHER_NONE);
1114 rt2x00_desc_write(txd, 0, word);
1115 }
1116
1117 /*
1118 * TX data initialization
1119 */
1120 static void rt2500usb_kick_tx_queue(struct rt2x00_dev *rt2x00dev, int queue)
1121 {
1122 u16 reg;
1123
1124 if (queue != IEEE80211_TX_QUEUE_BEACON)
1125 return;
1126
1127 rt2500usb_register_read(rt2x00dev, TXRX_CSR19, &reg);
1128 if (!rt2x00_get_field16(reg, TXRX_CSR19_BEACON_GEN)) {
1129 rt2x00_set_field16(&reg, TXRX_CSR19_BEACON_GEN, 1);
1130 /*
1131 * Beacon generation will fail initially.
1132 * To prevent this we need to register the TXRX_CSR19
1133 * register several times.
1134 */
1135 rt2500usb_register_write(rt2x00dev, TXRX_CSR19, reg);
1136 rt2500usb_register_write(rt2x00dev, TXRX_CSR19, 0);
1137 rt2500usb_register_write(rt2x00dev, TXRX_CSR19, reg);
1138 rt2500usb_register_write(rt2x00dev, TXRX_CSR19, 0);
1139 rt2500usb_register_write(rt2x00dev, TXRX_CSR19, reg);
1140 }
1141 }
1142
1143 /*
1144 * Interrupt functions.
1145 */
1146 static void rt2500usb_interrupt_rxdone(struct urb *urb)
1147 {
1148 struct data_entry *entry = (struct data_entry*)urb->context;
1149 struct data_ring *ring = entry->ring;
1150 struct rt2x00_dev *rt2x00dev = ring->rt2x00dev;
1151 struct data_desc *rxd = (struct data_desc*)
1152 (entry->skb->data + urb->actual_length - ring->desc_size);
1153 u32 word0;
1154 u32 word1;
1155 int signal;
1156 int rssi;
1157 int ofdm;
1158 u16 size;
1159
1160 if (!test_bit(DEVICE_ENABLED_RADIO, &rt2x00dev->flags) ||
1161 !test_and_clear_bit(ENTRY_OWNER_NIC, &entry->flags))
1162 return;
1163
1164 /*
1165 * Check if the received data is simply too small
1166 * to be actually valid, or if the urb is signaling
1167 * a problem.
1168 */
1169 if (urb->actual_length < entry->ring->desc_size || urb->status)
1170 goto skip_entry;
1171
1172 rt2x00_desc_read(rxd, 0, &word0);
1173 rt2x00_desc_read(rxd, 1, &word1);
1174
1175 /*
1176 * TODO: Don't we need to keep statistics
1177 * updated about events like CRC and physical errors?
1178 */
1179 if (rt2x00_get_field32(word0, RXD_W0_CRC) ||
1180 rt2x00_get_field32(word0, RXD_W0_PHYSICAL_ERROR))
1181 goto skip_entry;
1182
1183 /*
1184 * Obtain the status about this packet.
1185 */
1186 size = rt2x00_get_field32(word0, RXD_W0_DATABYTE_COUNT) - FCS_LEN;
1187 signal = rt2x00_get_field32(word1, RXD_W1_SIGNAL);
1188 rssi = rt2x00_get_field32(word1, RXD_W1_RSSI);
1189 ofdm = rt2x00_get_field32(word0, RXD_W0_OFDM);
1190
1191 /*
1192 * Trim the skb_buffer to only contain the valid
1193 * frame data (so ignore the device's descriptor).
1194 */
1195 skb_trim(entry->skb, size);
1196
1197 /*
1198 * Send the packet to upper layer, and update urb.
1199 */
1200 rt2x00lib_rxdone(entry, NULL, ring->data_size + ring->desc_size,
1201 signal, rssi, ofdm);
1202 urb->transfer_buffer = entry->skb->data;
1203 urb->transfer_buffer_length = entry->skb->len;
1204
1205 skip_entry:
1206 if (test_bit(DEVICE_ENABLED_RADIO, &ring->rt2x00dev->flags)) {
1207 __set_bit(ENTRY_OWNER_NIC, &entry->flags);
1208 usb_submit_urb(urb, GFP_ATOMIC);
1209 }
1210
1211 rt2x00_ring_index_inc(ring);
1212 }
1213
1214 /*
1215 * Device initialization functions.
1216 */
1217 static int rt2500usb_alloc_eeprom(struct rt2x00_dev *rt2x00dev)
1218 {
1219 u16 word;
1220
1221 /*
1222 * Allocate the eeprom memory, check the eeprom width
1223 * and copy the entire eeprom into this allocated memory.
1224 */
1225 rt2x00dev->eeprom = kzalloc(EEPROM_SIZE, GFP_KERNEL);
1226 if (!rt2x00dev->eeprom)
1227 return -ENOMEM;
1228
1229 rt2x00usb_vendor_request(
1230 rt2x00dev, USB_EEPROM_READ, USB_VENDOR_REQUEST_IN,
1231 EEPROM_BASE, 0x00, rt2x00dev->eeprom, EEPROM_SIZE,
1232 REGISTER_TIMEOUT * (EEPROM_SIZE / sizeof(u16)));
1233
1234 /*
1235 * Start validation of the data that has been read.
1236 */
1237 rt2x00_eeprom_read(rt2x00dev, EEPROM_ANTENNA, &word);
1238 if (word == 0xffff) {
1239 rt2x00_set_field16(&word, EEPROM_ANTENNA_NUM, 2);
1240 rt2x00_set_field16(&word, EEPROM_ANTENNA_TX_DEFAULT, 0);
1241 rt2x00_set_field16(&word, EEPROM_ANTENNA_RX_DEFAULT, 0);
1242 rt2x00_set_field16(&word, EEPROM_ANTENNA_LED_MODE, 0);
1243 rt2x00_set_field16(&word, EEPROM_ANTENNA_DYN_TXAGC, 0);
1244 rt2x00_set_field16(&word, EEPROM_ANTENNA_HARDWARE_RADIO, 0);
1245 rt2x00_set_field16(&word, EEPROM_ANTENNA_RF_TYPE, RF2522);
1246 rt2x00_eeprom_write(rt2x00dev, EEPROM_ANTENNA, word);
1247 EEPROM(rt2x00dev, "Antenna: 0x%04x\n", word);
1248 }
1249
1250 rt2x00_eeprom_read(rt2x00dev, EEPROM_NIC, &word);
1251 if (word == 0xffff) {
1252 rt2x00_set_field16(&word, EEPROM_NIC_CARDBUS_ACCEL, 0);
1253 rt2x00_set_field16(&word, EEPROM_NIC_DYN_BBP_TUNE, 0);
1254 rt2x00_set_field16(&word, EEPROM_NIC_CCK_TX_POWER, 0);
1255 rt2x00_eeprom_write(rt2x00dev, EEPROM_NIC, word);
1256 EEPROM(rt2x00dev, "NIC: 0x%04x\n", word);
1257 }
1258
1259 rt2x00_eeprom_read(rt2x00dev, EEPROM_CALIBRATE_OFFSET, &word);
1260 if (word == 0xffff) {
1261 rt2x00_set_field16(&word, EEPROM_CALIBRATE_OFFSET_RSSI,
1262 MAX_RX_SSI);
1263 rt2x00_eeprom_write(rt2x00dev, EEPROM_CALIBRATE_OFFSET, word);
1264 EEPROM(rt2x00dev, "Calibrate offset: 0x%04x\n", word);
1265 }
1266
1267 rt2x00_eeprom_read(rt2x00dev, EEPROM_BBPTUNE, &word);
1268 if (word == 0xffff) {
1269 rt2x00_set_field16(&word, EEPROM_BBPTUNE_THRESHOLD, 45);
1270 rt2x00_eeprom_write(rt2x00dev, EEPROM_BBPTUNE, word);
1271 EEPROM(rt2x00dev, "BBPtune: 0x%04x\n", word);
1272 }
1273
1274 rt2x00_eeprom_read(rt2x00dev, EEPROM_BBPTUNE_VGC, &word);
1275 if (word == 0xffff) {
1276 rt2x00_set_field16(&word, EEPROM_BBPTUNE_VGCUPPER, 0x40);
1277 rt2x00_eeprom_write(rt2x00dev, EEPROM_BBPTUNE_VGC, word);
1278 EEPROM(rt2x00dev, "BBPtune vgc: 0x%04x\n", word);
1279 }
1280
1281 rt2x00_eeprom_read(rt2x00dev, EEPROM_BBPTUNE_R17, &word);
1282 if (word == 0xffff) {
1283 rt2x00_set_field16(&word, EEPROM_BBPTUNE_R17_LOW, 0x48);
1284 rt2x00_set_field16(&word, EEPROM_BBPTUNE_R17_HIGH, 0x41);
1285 rt2x00_eeprom_write(rt2x00dev, EEPROM_BBPTUNE_R17, word);
1286 EEPROM(rt2x00dev, "BBPtune r17: 0x%04x\n", word);
1287 }
1288
1289 rt2x00_eeprom_read(rt2x00dev, EEPROM_BBPTUNE_R24, &word);
1290 if (word == 0xffff) {
1291 rt2x00_set_field16(&word, EEPROM_BBPTUNE_R24_LOW, 0x40);
1292 rt2x00_set_field16(&word, EEPROM_BBPTUNE_R24_HIGH, 0x80);
1293 rt2x00_eeprom_write(rt2x00dev, EEPROM_BBPTUNE_R24, word);
1294 EEPROM(rt2x00dev, "BBPtune r24: 0x%04x\n", word);
1295 }
1296
1297 rt2x00_eeprom_read(rt2x00dev, EEPROM_BBPTUNE_R25, &word);
1298 if (word == 0xffff) {
1299 rt2x00_set_field16(&word, EEPROM_BBPTUNE_R25_LOW, 0x40);
1300 rt2x00_set_field16(&word, EEPROM_BBPTUNE_R25_HIGH, 0x50);
1301 rt2x00_eeprom_write(rt2x00dev, EEPROM_BBPTUNE_R25, word);
1302 EEPROM(rt2x00dev, "BBPtune r25: 0x%04x\n", word);
1303 }
1304
1305 rt2x00_eeprom_read(rt2x00dev, EEPROM_BBPTUNE_R61, &word);
1306 if (word == 0xffff) {
1307 rt2x00_set_field16(&word, EEPROM_BBPTUNE_R61_LOW, 0x60);
1308 rt2x00_set_field16(&word, EEPROM_BBPTUNE_R61_HIGH, 0x6d);
1309 rt2x00_eeprom_write(rt2x00dev, EEPROM_BBPTUNE_R61, word);
1310 EEPROM(rt2x00dev, "BBPtune r61: 0x%04x\n", word);
1311 }
1312
1313 return 0;
1314 }
1315
1316 static int rt2500usb_init_eeprom(struct rt2x00_dev *rt2x00dev)
1317 {
1318 u16 reg;
1319 u16 value;
1320 u16 eeprom;
1321
1322 /*
1323 * Read EEPROM word for configuration.
1324 */
1325 rt2x00_eeprom_read(rt2x00dev, EEPROM_ANTENNA, &eeprom);
1326
1327 /*
1328 * Identify RF chipset.
1329 */
1330 value = rt2x00_get_field16(eeprom, EEPROM_ANTENNA_RF_TYPE);
1331 rt2500usb_register_read(rt2x00dev, MAC_CSR0, &reg);
1332 rt2x00_set_chip(rt2x00dev, RT2570, value, reg);
1333
1334 if (!rt2x00_rf(&rt2x00dev->chip, RF2522) &&
1335 !rt2x00_rf(&rt2x00dev->chip, RF2523) &&
1336 !rt2x00_rf(&rt2x00dev->chip, RF2524) &&
1337 !rt2x00_rf(&rt2x00dev->chip, RF2525) &&
1338 !rt2x00_rf(&rt2x00dev->chip, RF2525E) &&
1339 !rt2x00_rf(&rt2x00dev->chip, RF5222)) {
1340 ERROR(rt2x00dev, "Invalid RF chipset detected.\n");
1341 return -ENODEV;
1342 }
1343
1344 /*
1345 * Identify default antenna configuration.
1346 */
1347 rt2x00dev->hw->conf.antenna_sel_tx = rt2x00_get_field16(eeprom,
1348 EEPROM_ANTENNA_TX_DEFAULT);
1349 rt2x00dev->hw->conf.antenna_sel_rx = rt2x00_get_field16(eeprom,
1350 EEPROM_ANTENNA_RX_DEFAULT);
1351
1352 /*
1353 * Store led mode, for correct led behaviour.
1354 */
1355 rt2x00dev->led_mode = rt2x00_get_field16(eeprom,
1356 EEPROM_ANTENNA_LED_MODE);
1357
1358 /*
1359 * Check if the BBP tuning should be disabled.
1360 */
1361 rt2x00_eeprom_read(rt2x00dev, EEPROM_NIC, &eeprom);
1362 if (rt2x00_get_field16(eeprom, EEPROM_NIC_DYN_BBP_TUNE))
1363 __set_bit(CONFIG_DISABLE_LINK_TUNING, &rt2x00dev->flags);
1364
1365 /*
1366 * Read the RSSI <-> dBm offset information.
1367 */
1368 rt2x00_eeprom_read(rt2x00dev, EEPROM_CALIBRATE_OFFSET, &eeprom);
1369 rt2x00dev->hw->max_rssi =
1370 rt2x00_get_field16(eeprom, EEPROM_CALIBRATE_OFFSET_RSSI);
1371
1372 return 0;
1373 }
1374
1375 static const struct {
1376 unsigned int chip;
1377 u32 val[3];
1378 } rf_vals[] = {
1379 { RF2522, { 0x00002050, 0x00000101, 0x00000000 } },
1380 { RF2523, { 0x00022010, 0x000e0111, 0x00000a1b } },
1381 { RF2524, { 0x00032020, 0x00000101, 0x00000a1b } },
1382 { RF2525, { 0x00022020, 0x00060111, 0x00000a1b } },
1383 { RF2525E, { 0x00022010, 0x00060111, 0x00000000 } },
1384 { RF5222, { 0x00000000, 0x00000101, 0x00000000 } }
1385 };
1386
1387 /*
1388 * RF value list for RF2522
1389 * Supports: 2.4 GHz
1390 */
1391 static const u32 rf_vals_bg_2522[] = {
1392 0x000c1fda, 0x000c1fee, 0x000c2002, 0x000c2016, 0x000c202a,
1393 0x000c203e, 0x000c2052, 0x000c2066, 0x000c207a, 0x000c208e,
1394 0x000c20a2, 0x000c20b6, 0x000c20ca, 0x000c20fa
1395 };
1396
1397 /*
1398 * RF value list for RF2523, RF2524 & RF2525
1399 * Supports: 2.4 GHz
1400 */
1401 static const u32 rf_vals_bg_252x[] = {
1402 0x00000c9e, 0x00000ca2, 0x00000ca6, 0x00000caa, 0x00000cae,
1403 0x00000cb2, 0x00000cb6, 0x00000cba, 0x00000cbe, 0x00000d02,
1404 0x00000d06, 0x00000d0a, 0x00000d0e, 0x00000d1a
1405 };
1406
1407 /*
1408 * RF value list for RF2525E
1409 * Supports: 2.4 GHz
1410 */
1411 static const u32 rf_vals_bg_2525e[] = {
1412 0x0000089a, 0x0000089e, 0x0000089e, 0x000008a2, 0x000008a2,
1413 0x000008a6, 0x000008a6, 0x000008aa, 0x000008aa, 0x000008ae,
1414 0x000008ae, 0x000008b2, 0x000008b2, 0x000008b6
1415 };
1416
1417 /*
1418 * RF value list for RF5222
1419 * Supports: 2.4 GHz & 5.2 GHz
1420 */
1421 static const u32 rf_vals_abg_5222[] = {
1422 0x00001136, 0x0000113a, 0x0000113e, 0x00001182, 0x00001186,
1423 0x0000118a, 0x0000118e, 0x00001192, 0x00001196, 0x0000119a,
1424 0x0000119e, 0x000011a2, 0x000011a6, 0x000011ae, 0x0001889a,
1425 0x0001889a, 0x0001889e, 0x000188a2, 0x000188a6, 0x000188aa,
1426 0x000188ae, 0x000188b2, 0x00008802, 0x00008806, 0x0000880a,
1427 0x0000880e, 0x00008812, 0x00008816, 0x0000881a, 0x0000881e,
1428 0x00008822, 0x00008826, 0x0000882a, 0x000090a6, 0x000090ae,
1429 0x000090b6, 0x000090be
1430 };
1431
1432 static void rt2500usb_init_hw_mode(struct rt2x00_dev *rt2x00dev)
1433 {
1434 struct hw_mode_spec *spec = &rt2x00dev->spec;
1435 u8 *txpower;
1436 unsigned int i;
1437
1438 /*
1439 * Initialize all hw fields.
1440 */
1441 rt2x00dev->hw->flags = IEEE80211_HW_HOST_GEN_BEACON_TEMPLATE |
1442 IEEE80211_HW_HOST_BROADCAST_PS_BUFFERING |
1443 IEEE80211_HW_WEP_INCLUDE_IV |
1444 IEEE80211_HW_DATA_NULLFUNC_ACK |
1445 IEEE80211_HW_NO_TKIP_WMM_HWACCEL |
1446 IEEE80211_HW_MONITOR_DURING_OPER;
1447 rt2x00dev->hw->extra_tx_headroom = TXD_DESC_SIZE;
1448 rt2x00dev->hw->max_rssi = MAX_RX_SSI;
1449 rt2x00dev->hw->max_noise = MAX_RX_NOISE;
1450 rt2x00dev->hw->queues = 2;
1451
1452 /*
1453 * This device supports ATIM
1454 */
1455 __set_bit(DEVICE_SUPPORT_ATIM, &rt2x00dev->flags);
1456
1457 /*
1458 * Set device specific, but channel independent RF values.
1459 */
1460 for (i = 0; i < ARRAY_SIZE(rf_vals); i++) {
1461 if (rt2x00_rf(&rt2x00dev->chip, rf_vals[i].chip)) {
1462 rt2x00dev->rf1 = rf_vals[i].val[0];
1463 rt2x00dev->rf3 = rf_vals[i].val[1];
1464 rt2x00dev->rf4 = rf_vals[i].val[2];
1465 }
1466 }
1467
1468 /*
1469 * Convert tx_power array in eeprom.
1470 */
1471 txpower = rt2x00_eeprom_addr(rt2x00dev, EEPROM_TXPOWER_START);
1472 for (i = 0; i < 14; i++)
1473 txpower[i] = TXPOWER_FROM_DEV(txpower[i]);
1474
1475 /*
1476 * Initialize hw_mode information.
1477 */
1478 spec->mac_addr = rt2x00_eeprom_addr(rt2x00dev, EEPROM_MAC_ADDR_0);
1479 spec->num_modes = 2;
1480 spec->num_rates = 12;
1481 spec->num_channels = 14;
1482 spec->tx_power_a = NULL;
1483 spec->tx_power_bg = txpower;
1484 spec->tx_power_default = DEFAULT_TXPOWER;
1485 spec->chan_val_a = NULL;
1486
1487 if (rt2x00_rf(&rt2x00dev->chip, RF2522))
1488 spec->chan_val_bg = rf_vals_bg_2522;
1489 else if (rt2x00_rf(&rt2x00dev->chip, RF2523) ||
1490 rt2x00_rf(&rt2x00dev->chip, RF2524) ||
1491 rt2x00_rf(&rt2x00dev->chip, RF2525))
1492 spec->chan_val_bg = rf_vals_bg_252x;
1493 else if (rt2x00_rf(&rt2x00dev->chip, RF2525E))
1494 spec->chan_val_bg = rf_vals_bg_2525e;
1495 else if (rt2x00_rf(&rt2x00dev->chip, RF5222))
1496 spec->chan_val_bg = rf_vals_abg_5222;
1497
1498 if (rt2x00_rf(&rt2x00dev->chip, RF5222)) {
1499 spec->num_modes = 3;
1500 spec->num_channels += 23;
1501 spec->chan_val_a = &rf_vals_abg_5222[14];
1502 }
1503 }
1504
1505 static int rt2500usb_init_hw(struct rt2x00_dev *rt2x00dev)
1506 {
1507 int retval;
1508
1509 /*
1510 * Allocate eeprom data.
1511 */
1512 retval = rt2500usb_alloc_eeprom(rt2x00dev);
1513 if (retval)
1514 return retval;
1515
1516 retval = rt2500usb_init_eeprom(rt2x00dev);
1517 if (retval)
1518 return retval;
1519
1520 /*
1521 * Initialize hw specifications.
1522 */
1523 rt2500usb_init_hw_mode(rt2x00dev);
1524
1525 return 0;
1526 }
1527
1528 /*
1529 * IEEE80211 stack callback functions.
1530 */
1531 static int rt2500usb_get_stats(struct ieee80211_hw *hw,
1532 struct ieee80211_low_level_stats *stats)
1533 {
1534 struct rt2x00_dev *rt2x00dev = hw->priv;
1535 u16 reg;
1536
1537 /*
1538 * Update FCS error count from register.
1539 * The dot11ACKFailureCount, dot11RTSFailureCount and
1540 * dot11RTSSuccessCount are updated in interrupt time.
1541 */
1542 rt2500usb_register_read(rt2x00dev, STA_CSR0, &reg);
1543 rt2x00dev->low_level_stats.dot11FCSErrorCount +=
1544 rt2x00_get_field16(reg, STA_CSR0_FCS_ERROR);
1545
1546 memcpy(stats, &rt2x00dev->low_level_stats, sizeof(*stats));
1547
1548 return 0;
1549 }
1550
1551 static const struct ieee80211_ops rt2500usb_mac80211_ops = {
1552 .tx = rt2x00lib_tx,
1553 .reset = rt2x00lib_reset,
1554 .open = rt2x00lib_open,
1555 .stop = rt2x00lib_stop,
1556 .add_interface = rt2x00lib_add_interface,
1557 .remove_interface = rt2x00lib_remove_interface,
1558 .config = rt2x00lib_config,
1559 .config_interface = rt2x00lib_config_interface,
1560 .set_multicast_list = rt2x00lib_set_multicast_list,
1561 .get_stats = rt2500usb_get_stats,
1562 .conf_tx = rt2x00lib_conf_tx,
1563 .get_tx_stats = rt2x00lib_get_tx_stats,
1564 .beacon_update = rt2x00usb_beacon_update,
1565 };
1566
1567 static const struct rt2x00lib_ops rt2500usb_rt2x00_ops = {
1568 .init_hw = rt2500usb_init_hw,
1569 .initialize = rt2x00usb_initialize,
1570 .uninitialize = rt2x00usb_uninitialize,
1571 .set_device_state = rt2500usb_set_device_state,
1572 .link_tuner = rt2500usb_link_tuner,
1573 .write_tx_desc = rt2500usb_write_tx_desc,
1574 .write_tx_data = rt2x00usb_write_tx_data,
1575 .kick_tx_queue = rt2500usb_kick_tx_queue,
1576 .config_type = rt2500usb_config_type,
1577 .config_phymode = rt2500usb_config_phymode,
1578 .config_channel = rt2500usb_config_channel,
1579 .config_mac_addr = rt2500usb_config_mac_addr,
1580 .config_bssid = rt2500usb_config_bssid,
1581 .config_promisc = rt2500usb_config_promisc,
1582 .config_txpower = rt2500usb_config_txpower,
1583 .config_antenna = rt2500usb_config_antenna,
1584 .config_duration = rt2500usb_config_duration,
1585 };
1586
1587 static const struct rt2x00_ops rt2500usb_ops = {
1588 .name = DRV_NAME,
1589 .rxd_size = RXD_DESC_SIZE,
1590 .txd_size = TXD_DESC_SIZE,
1591 .lib = &rt2500usb_rt2x00_ops,
1592 .hw = &rt2500usb_mac80211_ops,
1593 #ifdef CONFIG_RT2X00_LIB_DEBUGFS
1594 .debugfs = &rt2500usb_rt2x00debug,
1595 #endif /* CONFIG_RT2X00_LIB_DEBUGFS */
1596 };
1597
1598 /*
1599 * rt2500usb module information.
1600 */
1601 static struct usb_device_id rt2500usb_device_table[] = {
1602 /* ASUS */
1603 { USB_DEVICE(0x0b05, 0x1706), USB_DEVICE_DATA(&rt2500usb_ops) },
1604 { USB_DEVICE(0x0b05, 0x1707), USB_DEVICE_DATA(&rt2500usb_ops) },
1605 /* Belkin */
1606 { USB_DEVICE(0x050d, 0x7050), USB_DEVICE_DATA(&rt2500usb_ops) },
1607 { USB_DEVICE(0x050d, 0x7051), USB_DEVICE_DATA(&rt2500usb_ops) },
1608 { USB_DEVICE(0x050d, 0x705a), USB_DEVICE_DATA(&rt2500usb_ops) },
1609 /* Cisco Systems */
1610 { USB_DEVICE(0x13b1, 0x000d), USB_DEVICE_DATA(&rt2500usb_ops) },
1611 { USB_DEVICE(0x13b1, 0x0011), USB_DEVICE_DATA(&rt2500usb_ops) },
1612 { USB_DEVICE(0x13b1, 0x001a), USB_DEVICE_DATA(&rt2500usb_ops) },
1613 /* Conceptronic */
1614 { USB_DEVICE(0x14b2, 0x3c02), USB_DEVICE_DATA(&rt2500usb_ops) },
1615 /* D-LINK */
1616 { USB_DEVICE(0x2001, 0x3c00), USB_DEVICE_DATA(&rt2500usb_ops) },
1617 /* Gigabyte */
1618 { USB_DEVICE(0x1044, 0x8001), USB_DEVICE_DATA(&rt2500usb_ops) },
1619 { USB_DEVICE(0x1044, 0x8007), USB_DEVICE_DATA(&rt2500usb_ops) },
1620 /* Hercules */
1621 { USB_DEVICE(0x06f8, 0xe000), USB_DEVICE_DATA(&rt2500usb_ops) },
1622 /* Melco */
1623 { USB_DEVICE(0x0411, 0x0066), USB_DEVICE_DATA(&rt2500usb_ops) },
1624 { USB_DEVICE(0x0411, 0x0067), USB_DEVICE_DATA(&rt2500usb_ops) },
1625 { USB_DEVICE(0x0411, 0x008b), USB_DEVICE_DATA(&rt2500usb_ops) },
1626 /* MSI */
1627 { USB_DEVICE(0x0db0, 0x6861), USB_DEVICE_DATA(&rt2500usb_ops) },
1628 { USB_DEVICE(0x0db0, 0x6865), USB_DEVICE_DATA(&rt2500usb_ops) },
1629 { USB_DEVICE(0x0db0, 0x6869), USB_DEVICE_DATA(&rt2500usb_ops) },
1630 /* Ralink */
1631 { USB_DEVICE(0x148f, 0x1706), USB_DEVICE_DATA(&rt2500usb_ops) },
1632 { USB_DEVICE(0x148f, 0x2570), USB_DEVICE_DATA(&rt2500usb_ops) },
1633 { USB_DEVICE(0x148f, 0x2573), USB_DEVICE_DATA(&rt2500usb_ops) },
1634 { USB_DEVICE(0x148f, 0x9020), USB_DEVICE_DATA(&rt2500usb_ops) },
1635 /* Siemens */
1636 { USB_DEVICE(0x0681, 0x3c06), USB_DEVICE_DATA(&rt2500usb_ops) },
1637 /* SMC */
1638 { USB_DEVICE(0x0707, 0xee13), USB_DEVICE_DATA(&rt2500usb_ops) },
1639 /* Spairon */
1640 { USB_DEVICE(0x114b, 0x0110), USB_DEVICE_DATA(&rt2500usb_ops) },
1641 /* Trust */
1642 { USB_DEVICE(0x0eb0, 0x9020), USB_DEVICE_DATA(&rt2500usb_ops) },
1643 /* Zinwell */
1644 { USB_DEVICE(0x5a57, 0x0260), USB_DEVICE_DATA(&rt2500usb_ops) },
1645 { 0, }
1646 };
1647
1648 MODULE_AUTHOR(DRV_PROJECT);
1649 MODULE_VERSION(DRV_VERSION);
1650 MODULE_DESCRIPTION("Ralink RT2500 USB Wireless LAN driver.");
1651 MODULE_SUPPORTED_DEVICE("Ralink RT2570 USB chipset based cards");
1652 MODULE_DEVICE_TABLE(usb, rt2500usb_device_table);
1653 MODULE_LICENSE("GPL");
1654
1655 static struct usb_driver rt2500usb_driver = {
1656 .name = DRV_NAME,
1657 .id_table = rt2500usb_device_table,
1658 .probe = rt2x00usb_probe,
1659 .disconnect = rt2x00usb_disconnect,
1660 #ifdef CONFIG_PM
1661 .suspend = rt2x00usb_suspend,
1662 .resume = rt2x00usb_resume,
1663 #endif /* CONFIG_PM */
1664 };
1665
1666 static int __init rt2500usb_init(void)
1667 {
1668 printk(KERN_INFO "Loading module: %s - %s by %s.\n",
1669 DRV_NAME, DRV_VERSION, DRV_PROJECT);
1670 return usb_register(&rt2500usb_driver);
1671 }
1672
1673 static void __exit rt2500usb_exit(void)
1674 {
1675 printk(KERN_INFO "Unloading module: %s.\n", DRV_NAME);
1676 usb_deregister(&rt2500usb_driver);
1677 }
1678
1679 module_init(rt2500usb_init);
1680 module_exit(rt2500usb_exit);
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