Add rt2x00-mac80211 snapshot (#1916)
[openwrt/svn-archive/archive.git] / package / rt2x00 / src / rt2x00pci.c
1 /*
2 Copyright (C) 2004 - 2007 rt2x00 SourceForge Project
3 <http://rt2x00.serialmonkey.com>
4
5 This program is free software; you can redistribute it and/or modify
6 it under the terms of the GNU General Public License as published by
7 the Free Software Foundation; either version 2 of the License, or
8 (at your option) any later version.
9
10 This program is distributed in the hope that it will be useful,
11 but WITHOUT ANY WARRANTY; without even the implied warranty of
12 MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
13 GNU General Public License for more details.
14
15 You should have received a copy of the GNU General Public License
16 along with this program; if not, write to the
17 Free Software Foundation, Inc.,
18 59 Temple Place - Suite 330, Boston, MA 02111-1307, USA.
19 */
20
21 /*
22 Module: rt2x00pci
23 Abstract: rt2x00 generic pci device routines.
24 Supported chipsets: rt2460, rt2560, rt2561, rt2561s & rt2661.
25 */
26
27 /*
28 * Set enviroment defines for rt2x00.h
29 */
30 #define DRV_NAME "rt2x00pci"
31
32 #include <linux/kernel.h>
33 #include <linux/module.h>
34 #include <linux/version.h>
35 #include <linux/init.h>
36 #include <linux/pci.h>
37
38 #include "rt2x00.h"
39 #include "rt2x00pci.h"
40
41 /*
42 * Beacon handlers.
43 */
44 int rt2x00pci_beacon_update(struct ieee80211_hw *hw, struct sk_buff *skb,
45 struct ieee80211_tx_control *control)
46 {
47 struct rt2x00_dev *rt2x00dev = hw->priv;
48 struct data_ring *ring =
49 rt2x00_get_ring(rt2x00dev, IEEE80211_TX_QUEUE_BEACON);
50 struct data_entry *entry = rt2x00_get_data_entry(ring);
51
52 /*
53 * Just in case the ieee80211 doesn't set this,
54 * but we need this queue set for the descriptor
55 * initialization.
56 */
57 control->queue = IEEE80211_TX_QUEUE_BEACON;
58
59 /*
60 * Update the beacon entry.
61 */
62 memcpy(entry->data_addr, skb->data, skb->len);
63 rt2x00lib_write_tx_desc(rt2x00dev, entry, entry->priv,
64 (struct ieee80211_hdr*)skb->data, skb->len, control);
65
66 /*
67 * Enable beacon generation.
68 */
69 rt2x00dev->ops->lib->kick_tx_queue(rt2x00dev, control->queue);
70
71 return 0;
72 }
73 EXPORT_SYMBOL_GPL(rt2x00pci_beacon_update);
74
75 void rt2x00pci_beacondone(struct rt2x00_dev *rt2x00dev, const int queue)
76 {
77 struct data_ring *ring = rt2x00_get_ring(rt2x00dev, queue);
78 struct data_entry *entry = rt2x00_get_data_entry(ring);
79 struct sk_buff *skb;
80
81 skb = ieee80211_beacon_get(rt2x00dev->hw,
82 rt2x00dev->interface.id, &entry->tx_status.control);
83 if (!skb)
84 return;
85
86 rt2x00dev->ops->hw->beacon_update(rt2x00dev->hw, skb,
87 &entry->tx_status.control);
88
89 dev_kfree_skb(skb);
90 }
91 EXPORT_SYMBOL_GPL(rt2x00pci_beacondone);
92
93 /*
94 * TX data handlers.
95 */
96 int rt2x00pci_write_tx_data(struct rt2x00_dev *rt2x00dev,
97 struct data_ring *ring, struct sk_buff *skb,
98 struct ieee80211_tx_control *control)
99 {
100 struct ieee80211_hdr *ieee80211hdr = (struct ieee80211_hdr*)skb->data;
101 struct data_entry *entry = rt2x00_get_data_entry(ring);
102 struct data_desc *txd = entry->priv;
103 u32 word;
104
105 if (rt2x00_ring_full(ring)) {
106 ieee80211_stop_queue(rt2x00dev->hw, control->queue);
107 return -EINVAL;
108 }
109
110 rt2x00_desc_read(txd, 0, &word);
111
112 if (rt2x00_get_field32(word, TXD_ENTRY_AVAILABLE)) {
113 ERROR(rt2x00dev,
114 "Arrived at non-free entry in the non-full queue %d.\n"
115 "Please file bug report to %s.\n",
116 control->queue, DRV_PROJECT);
117 ieee80211_stop_queue(rt2x00dev->hw, control->queue);
118 return -EINVAL;
119 }
120
121 memcpy(entry->data_addr, skb->data, skb->len);
122 rt2x00lib_write_tx_desc(rt2x00dev, entry, txd, ieee80211hdr,
123 skb->len, control);
124 memcpy(&entry->tx_status.control, control, sizeof(*control));
125 entry->skb = skb;
126
127 rt2x00_ring_index_inc(ring);
128
129 if (rt2x00_ring_full(ring))
130 ieee80211_stop_queue(rt2x00dev->hw, control->queue);
131
132 return 0;
133 }
134 EXPORT_SYMBOL_GPL(rt2x00pci_write_tx_data);
135
136 /*
137 * Device initialization handlers.
138 */
139 #define priv_offset(__ring, __i) \
140 ({ \
141 ring->data_addr + (i * ring->desc_size); \
142 })
143
144 #define data_addr_offset(__ring, __i) \
145 ({ \
146 (__ring)->data_addr \
147 + ((__ring)->stats.limit * (__ring)->desc_size) \
148 + ((__i) * (__ring)->data_size); \
149 })
150
151 #define data_dma_offset(__ring, __i) \
152 ({ \
153 (__ring)->data_dma \
154 + ((__ring)->stats.limit * (__ring)->desc_size) \
155 + ((__i) * (__ring)->data_size); \
156 })
157
158 static int rt2x00pci_alloc_ring(struct rt2x00_dev *rt2x00dev,
159 struct data_ring *ring)
160 {
161 unsigned int i;
162
163 /*
164 * Allocate DMA memory for descriptor and buffer.
165 */
166 ring->data_addr = pci_alloc_consistent(rt2x00dev_pci(rt2x00dev),
167 rt2x00_get_ring_size(ring), &ring->data_dma);
168 if (!ring->data_addr)
169 return -ENOMEM;
170
171 /*
172 * Initialize all ring entries to contain valid
173 * addresses.
174 */
175 for (i = 0; i < ring->stats.limit; i++) {
176 ring->entry[i].priv = priv_offset(ring, i);
177 ring->entry[i].data_addr = data_addr_offset(ring, i);
178 ring->entry[i].data_dma = data_dma_offset(ring, i);
179 }
180
181 return 0;
182 }
183
184 int rt2x00pci_initialize(struct rt2x00_dev *rt2x00dev)
185 {
186 struct pci_dev *pci_dev = rt2x00dev_pci(rt2x00dev);
187 struct data_ring *ring;
188 int status;
189
190 /*
191 * Allocate DMA
192 */
193 ring_for_each(rt2x00dev, ring) {
194 status = rt2x00pci_alloc_ring(rt2x00dev, ring);
195 if (status)
196 goto exit;
197 }
198
199 /*
200 * Register interrupt handler.
201 */
202 status = request_irq(pci_dev->irq, rt2x00dev->ops->lib->irq_handler,
203 IRQF_SHARED, pci_dev->driver->name, rt2x00dev);
204 if (status) {
205 ERROR(rt2x00dev, "IRQ %d allocation failed (error %d).\n",
206 pci_dev->irq, status);
207 return status;
208 }
209
210 return 0;
211
212 exit:
213 rt2x00pci_uninitialize(rt2x00dev);
214
215 return status;
216 }
217 EXPORT_SYMBOL_GPL(rt2x00pci_initialize);
218
219 void rt2x00pci_uninitialize(struct rt2x00_dev *rt2x00dev)
220 {
221 struct data_ring *ring;
222
223 /*
224 * Free irq line.
225 */
226 free_irq(rt2x00dev_pci(rt2x00dev)->irq, rt2x00dev);
227
228 /*
229 * Free DMA
230 */
231 ring_for_each(rt2x00dev, ring) {
232 if (ring->data_addr)
233 pci_free_consistent(rt2x00dev_pci(rt2x00dev),
234 rt2x00_get_ring_size(ring),
235 ring->data_addr, ring->data_dma);
236 ring->data_addr = NULL;
237 }
238 }
239 EXPORT_SYMBOL_GPL(rt2x00pci_uninitialize);
240
241 /*
242 * PCI driver handlers.
243 */
244 static int rt2x00pci_alloc_csr(struct rt2x00_dev *rt2x00dev)
245 {
246 rt2x00dev->csr_addr = ioremap(
247 pci_resource_start(rt2x00dev_pci(rt2x00dev), 0),
248 pci_resource_len(rt2x00dev_pci(rt2x00dev), 0));
249 if (!rt2x00dev->csr_addr) {
250 ERROR(rt2x00dev, "Ioremap failed.\n");
251 return -ENOMEM;
252 }
253
254 return 0;
255 }
256
257 static void rt2x00pci_free_csr(struct rt2x00_dev *rt2x00dev)
258 {
259 if (rt2x00dev->csr_addr) {
260 iounmap(rt2x00dev->csr_addr);
261 rt2x00dev->csr_addr = NULL;
262 }
263 }
264
265 int rt2x00pci_probe(struct pci_dev *pci_dev, const struct pci_device_id *id)
266 {
267 struct rt2x00_ops *ops = (struct rt2x00_ops*)id->driver_data;
268 struct ieee80211_hw *hw;
269 struct rt2x00_dev *rt2x00dev;
270 int retval;
271
272 retval = pci_request_regions(pci_dev, pci_name(pci_dev));
273 if (retval) {
274 ERROR_PROBE("PCI request regions failed.\n");
275 return retval;
276 }
277
278 retval = pci_enable_device(pci_dev);
279 if (retval) {
280 ERROR_PROBE("Enable device failed.\n");
281 goto exit_release_regions;
282 }
283
284 pci_set_master(pci_dev);
285
286 if (pci_set_mwi(pci_dev))
287 ERROR_PROBE("MWI not available.\n");
288
289 if (pci_set_dma_mask(pci_dev, DMA_64BIT_MASK) &&
290 pci_set_dma_mask(pci_dev, DMA_32BIT_MASK)) {
291 ERROR_PROBE("PCI DMA not supported.\n");
292 retval = -EIO;
293 goto exit_disable_device;
294 }
295
296 hw = ieee80211_alloc_hw(sizeof(struct rt2x00_dev), ops->hw);
297 if (!hw) {
298 ERROR_PROBE("Failed to allocate hardware.\n");
299 retval = -ENOMEM;
300 goto exit_disable_device;
301 }
302
303 pci_set_drvdata(pci_dev, hw);
304
305 rt2x00dev = hw->priv;
306 rt2x00dev->dev = pci_dev;
307 rt2x00dev->device = &pci_dev->dev;
308 rt2x00dev->ops = ops;
309 rt2x00dev->hw = hw;
310
311 retval = rt2x00pci_alloc_csr(rt2x00dev);
312 if (retval)
313 goto exit_free_device;
314
315 retval = rt2x00lib_probe_dev(rt2x00dev);
316 if (retval)
317 goto exit_free_csr;
318
319 return 0;
320
321 exit_free_csr:
322 rt2x00pci_free_csr(rt2x00dev);
323
324 exit_free_device:
325 ieee80211_free_hw(hw);
326
327 exit_disable_device:
328 if (retval != -EBUSY)
329 pci_disable_device(pci_dev);
330
331 exit_release_regions:
332 pci_release_regions(pci_dev);
333
334 pci_set_drvdata(pci_dev, NULL);
335
336 return retval;
337 }
338 EXPORT_SYMBOL_GPL(rt2x00pci_probe);
339
340 void rt2x00pci_remove(struct pci_dev *pci_dev)
341 {
342 struct ieee80211_hw *hw = pci_get_drvdata(pci_dev);
343 struct rt2x00_dev *rt2x00dev = hw->priv;
344
345 /*
346 * Free all allocated data.
347 */
348 rt2x00lib_remove_dev(rt2x00dev);
349 ieee80211_free_hw(hw);
350
351 /*
352 * Free the PCI device data.
353 */
354 pci_set_drvdata(pci_dev, NULL);
355 pci_disable_device(pci_dev);
356 pci_release_regions(pci_dev);
357 }
358 EXPORT_SYMBOL_GPL(rt2x00pci_remove);
359
360 #ifdef CONFIG_PM
361 int rt2x00pci_suspend(struct pci_dev *pci_dev, pm_message_t state)
362 {
363 struct ieee80211_hw *hw = pci_get_drvdata(pci_dev);
364 struct rt2x00_dev *rt2x00dev = hw->priv;
365 int retval;
366
367 retval = rt2x00lib_suspend(rt2x00dev, state);
368 if (retval)
369 return retval;
370
371 rt2x00pci_free_csr(rt2x00dev);
372
373 pci_save_state(pci_dev);
374 pci_disable_device(pci_dev);
375 return pci_set_power_state(pci_dev, pci_choose_state(pci_dev, state));
376 }
377 EXPORT_SYMBOL_GPL(rt2x00pci_suspend);
378
379 int rt2x00pci_resume(struct pci_dev *pci_dev)
380 {
381 struct ieee80211_hw *hw = pci_get_drvdata(pci_dev);
382 struct rt2x00_dev *rt2x00dev = hw->priv;
383 int retval;
384
385 if (pci_set_power_state(pci_dev, PCI_D0) ||
386 pci_enable_device(pci_dev) ||
387 pci_restore_state(pci_dev)) {
388 ERROR(rt2x00dev, "Failed to resume device.\n");
389 return -EIO;
390 }
391
392 retval = rt2x00pci_alloc_csr(rt2x00dev);
393 if (retval)
394 return retval;
395
396 return rt2x00lib_resume(rt2x00dev);
397 }
398 EXPORT_SYMBOL_GPL(rt2x00pci_resume);
399 #endif /* CONFIG_PM */
400
401 /*
402 * rt2x00pci module information.
403 */
404 MODULE_AUTHOR(DRV_PROJECT);
405 MODULE_VERSION(DRV_VERSION);
406 MODULE_DESCRIPTION("rt2x00 library");
407 MODULE_LICENSE("GPL");