package/uboot-lantiq/files/include/configs/arcadyan-common.h

   1 /*
   2  * (C) Copyright 2003-2005
   3  * Wolfgang Denk, DENX Software Engineering, wd@denx.de.
   4  *
   5  * See file CREDITS for list of people who contributed to this
   6  * project.
   7  *
   8  * This program is free software; you can redistribute it and/or
   9  * modify it under the terms of the GNU General Public License as
  10  * published by the Free Software Foundation; either version 2 of
  11  * the License, or (at your option) any later version.
  12  *
  13  * This program is distributed in the hope that it will be useful,
  14  * but WITHOUT ANY WARRANTY; without even the implied warranty of
  15  * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
  16  * GNU General Public License for more details.
  17  *
  18  * You should have received a copy of the GNU General Public License
  19  * along with this program; if not, write to the Free Software
  20  * Foundation, Inc., 59 Temple Place, Suite 330, Boston,
  21  * MA 02111-1307 USA
  22  */
  23
  24 /*
  25  * This file contains the configuration parameters for the Danube reference board.
  26  */
  27
  28 #ifndef __CONFIG_H
  29 #define __CONFIG_H
  30
  31 /* #define DEBUG */
  32
  33 #define CONFIG_MIPS32           1       /* MIPS32 CPU compatible                */
  34 #define CONFIG_MIPS24KEC        1       /* MIPS 24KEc CPU core                  */
  35 #define CONFIG_DANUBE           1       /* in a Danube/Twinpass Chip            */
  36
  37 #define CONFIG_SYS_MIPS_MULTI_CPU       1       /* This is a multi cpu system */
  38
  39 #define CONFIG_USE_DDR_RAM
  40
  41 #define CONFIG_FLASH_CFI_DRIVER 1
  42
  43 #define CONFIG_SYS_INIT_RAM_LOCK_MIPS
  44
  45 #ifdef CONFIG_SYS_RAMBOOT
  46         //#warning CONFIG_SYS_RAMBOOT
  47         #define CONFIG_SKIP_LOWLEVEL_INIT
  48 #else /* CONFIG_SYS_RAMBOOT */
  49         #define CONFIG_SYS_EBU_BOOT
  50         #define INFINEON_EBU_BOOTCFG    0x688C688C      /* CMULT = 8 for 150 MHz */
  51 #endif /* CONFIG_SYS_RAMBOOT */
  52
  53 #if 1
  54 #ifndef CPU_CLOCK_RATE
  55 #define CPU_CLOCK_RATE  (ifx_get_cpuclk())
  56 #endif
  57 #endif
  58
  59 #undef CONFIG_SYS_HUSH_PARSER           /* Use the HUSH parser          */
  60
  61 /*
  62  * Include common defines/options for all Infineon boards
  63  */
  64 #include "ifx-common.h"
  65
  66
  67 #undef CONFIG_EXTRA_ENV_SETTINGS
  68 #define CONFIG_EXTRA_ENV_SETTINGS                                       \
  69         "ram_addr=0x80500000\0"                                         \
  70         "kernel_addr=0xb0050000\0"                                      \
  71         "flashargs=setenv bootargs rootfstype=squashfs,jffs2\0"         \
  72         "nfsargs=setenv bootargs root=/dev/nfs rw "                     \
  73                 "nfsroot=${serverip}:${rootpath} \0"                    \
  74         "addip=setenv bootargs ${bootargs} "                            \
  75                 "ip=${ipaddr}:${serverip}:${gatewayip}:${netmask}"      \
  76                 ":${hostname}:${netdev}:off\0"                          \
  77         "addmisc=setenv bootargs ${bootargs} init=/etc/preinit "        \
  78                 "console=ttyS1,115200 ethaddr=${ethaddr} "              \
  79                 "${mtdparts}\0"                                         \
  80         "flash_flash=run flashargs addip addmisc;"                      \
  81                 "bootm ${kernel_addr}\0"                                \
  82         "flash_nfs=run nfsargs addip addmisc;bootm ${kernel_addr}\0"    \
  83         "net_flash=run load_kernel flashargs addip addmisc;"            \
  84                 "bootm ${ram_addr}\0"                                   \
  85         "net_nfs=run load_kernel nfsargs addip addmisc;"                \
  86                 "bootm ${ram_addr}\0"                                   \
  87         "load_kernel=tftp ${ram_addr} "                                 \
  88                 "${tftppath}openwrt-ifxmips-uImage\0"                   \
  89         "update_uboot=tftp 0x80500000 ${tftppath}u-boot-" CONFIG_ARCADYAN ".bin;era 0xb0000000 +${filesize};" \
  90                 "cp.b 0x80500000 0xb0000000 ${filesize}\0" \
  91         "update_openwrt=tftp ${ram_addr} "                              \
  92                 "${tftppath}openwrt-lantiq-" CONFIG_ARCADYAN "-squashfs.image;"            \
  93                 "era ${kernel_addr} +${filesize};"                      \
  94                 "cp.b ${ram_addr} ${kernel_addr} ${filesize}\0"
  95
  96 /*
  97  * Cache Configuration (cpu/chip specific, Danube)
  98  */
  99 #define CONFIG_SYS_DCACHE_SIZE          16384
 100 #define CONFIG_SYS_ICACHE_SIZE          16384
 101 #define CONFIG_SYS_CACHELINE_SIZE       32
 102 #define CONFIG_SYS_MIPS_CACHE_OPER_MODE CONF_CM_CACHABLE_NO_WA
 103
 104 #define CONFIG_NET_MULTI
 105
 106 #define CONFIG_IFX_ETOP
 107 //#define CLK_OUT2_25MHZ
 108
 109 #define CONFIG_MII
 110 #define CONFIG_CMD_MII
 111
 112 #define CONFIG_IFX_ASC
 113
 114 #ifdef CONFIG_USE_ASC0
 115 #define CONFIG_SYS_IFX_ASC_BASE         0x1E100400
 116 #else
 117 #define CONFIG_SYS_IFX_ASC_BASE         0x1E100C00
 118 #endif
 119
 120 #ifdef CONFIG_SYS_RAMBOOT
 121 /* Configuration of EBU: */
 122 /* starting address from 0xb0000000 */
 123 /* make the flash available from RAM boot */
 124 #       define CONFIG_EBU_ADDSEL0               0x10000031
 125 #       define CONFIG_EBU_BUSCON0               0x0001D7FF
 126 #       define CONFIG_EBU_ADDSEL1               0x14000001
 127 #       define CONFIG_EBU_BUSCON1               0x4041D7FD
 128 #endif
 129
 130 #define CONFIG_CMD_HTTPD                /* enable upgrade via HTTPD */
 131
 132 #define CONFIG_IPADDR           192.168.1.1
 133 #define CONFIG_SERVERIP         192.168.1.101
 134 #define CONFIG_GATEWAYIP        192.168.1.254
 135 #define CONFIG_NETMASK          255.255.255.0
 136 #define CONFIG_ROOTPATH         "/export"
 137
 138 #endif  /* __CONFIG_H */