[uboot-lantiq] add support for arv4518 and arv752DWP22 boards
[openwrt/svn-archive/archive.git] / package / uboot-lantiq / files / include / configs / arv752DWP22.h
1 /*
2 * (C) Copyright 2003-2005
3 * Wolfgang Denk, DENX Software Engineering, wd@denx.de.
4 *
5 * See file CREDITS for list of people who contributed to this
6 * project.
7 *
8 * This program is free software; you can redistribute it and/or
9 * modify it under the terms of the GNU General Public License as
10 * published by the Free Software Foundation; either version 2 of
11 * the License, or (at your option) any later version.
12 *
13 * This program is distributed in the hope that it will be useful,
14 * but WITHOUT ANY WARRANTY; without even the implied warranty of
15 * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
16 * GNU General Public License for more details.
17 *
18 * You should have received a copy of the GNU General Public License
19 * along with this program; if not, write to the Free Software
20 * Foundation, Inc., 59 Temple Place, Suite 330, Boston,
21 * MA 02111-1307 USA
22 */
23
24 /*
25 * This file contains the configuration parameters for the Danube reference board.
26 */
27
28 #ifndef __CONFIG_H
29 #define __CONFIG_H
30
31 /* #define DEBUG */
32
33 #define CONFIG_MIPS32 1 /* MIPS32 CPU compatible */
34 #define CONFIG_MIPS24KEC 1 /* MIPS 24KEc CPU core */
35 #define CONFIG_DANUBE 1 /* in a Danube/Twinpass Chip */
36 #define CONFIG_ARV752DWP22 1 /* on the arv752DWP22 Board */
37
38 #define CONFIG_SYS_MIPS_MULTI_CPU 1 /* This is a multi cpu system */
39
40 #define CONFIG_USE_DDR_RAM
41 #define CONFIG_SYS_MAX_RAM 64*1024*1024
42
43 #define CONFIG_FLASH_CFI_DRIVER 1
44
45 #define CONFIG_SYS_INIT_RAM_LOCK_MIPS
46
47 #ifdef CONFIG_SYS_RAMBOOT
48 //#warning CONFIG_SYS_RAMBOOT
49 #define CONFIG_SKIP_LOWLEVEL_INIT
50 #else /* CONFIG_SYS_RAMBOOT */
51 #define CONFIG_SYS_EBU_BOOT
52 #define INFINEON_EBU_BOOTCFG 0x688C688C /* CMULT = 8 for 150 MHz */
53 #endif /* CONFIG_SYS_RAMBOOT */
54
55 #if 1
56 #ifndef CPU_CLOCK_RATE
57 #define CPU_CLOCK_RATE (ifx_get_cpuclk())
58 #endif
59 #endif
60
61 #define CONFIG_SYS_PROMPT "ARV752DWP22 => " /* Monitor Command Prompt */
62
63 #undef CONFIG_SYS_HUSH_PARSER /* Use the HUSH parser */
64
65 /*
66 * Include common defines/options for all Infineon boards
67 */
68 #include "ifx-common.h"
69
70
71 #undef CONFIG_EXTRA_ENV_SETTINGS
72 #define CONFIG_EXTRA_ENV_SETTINGS \
73 "ram_addr=0x80500000\0" \
74 "kernel_addr=0xb0050000\0" \
75 "mtdparts=mtdparts=ifx-nor:256k(uboot)ro,64k(uboot_env)ro,64k(kernel),-(rootfs)\0" \
76 "flashargs=setenv bootargs rootfstype=squashfs,jffs2\0" \
77 "nfsargs=setenv bootargs root=/dev/nfs rw " \
78 "nfsroot=${serverip}:${rootpath} \0" \
79 "addip=setenv bootargs ${bootargs} " \
80 "ip=${ipaddr}:${serverip}:${gatewayip}:${netmask}" \
81 ":${hostname}:${netdev}:off\0" \
82 "addmisc=setenv bootargs ${bootargs} init=/etc/preinit " \
83 "console=ttyS1,115200 ethaddr=${ethaddr} " \
84 "${mtdparts}\0" \
85 "flash_flash=run flashargs addip addmisc;" \
86 "bootm ${kernel_addr}\0" \
87 "flash_nfs=run nfsargs addip addmisc;bootm ${kernel_addr}\0" \
88 "net_flash=run load_kernel flashargs addip addmisc;" \
89 "bootm ${ram_addr}\0" \
90 "net_nfs=run load_kernel nfsargs addip addmisc;" \
91 "bootm ${ram_addr}\0" \
92 "load_kernel=tftp ${ram_addr} " \
93 "${tftppath}openwrt-ifxmips-uImage\0" \
94 "update_uboot=tftp 0x80500000 ${tftppath}u-boot.bin;era 0xb0000000 +${filesize};" \
95 "cp.b 0x80500000 0xb0000000 ${filesize}\0" \
96 "update_openwrt=tftp ${ram_addr} " \
97 "${tftppath}openwrt-ifxmips-squashfs.image;" \
98 "era ${kernel_addr} +${filesize};" \
99 "cp.b ${ram_addr} ${kernel_addr} ${filesize}\0"
100
101 /*
102 * Cache Configuration (cpu/chip specific, Danube)
103 */
104 #define CONFIG_SYS_DCACHE_SIZE 16384
105 #define CONFIG_SYS_ICACHE_SIZE 16384
106 #define CONFIG_SYS_CACHELINE_SIZE 32
107 #define CONFIG_SYS_MIPS_CACHE_OPER_MODE CONF_CM_CACHABLE_NO_WA
108
109 #define CONFIG_NET_MULTI
110 #if 0
111 #define CONFIG_M4530_ETH
112 #define CONFIG_M4530_FPGA
113 #endif
114
115 #define CONFIG_IFX_ETOP
116 //#define CLK_OUT2_25MHZ
117 #define CONFIG_EXTRA_SWITCH
118
119 //#define CONFIG_RMII /* use interface in RMII mode */
120
121 #define CONFIG_MII
122 #define CONFIG_CMD_MII
123
124 #define CONFIG_IFX_ASC
125
126 #ifdef CONFIG_USE_ASC0
127 #define CONFIG_SYS_IFX_ASC_BASE 0x1E100400
128 #else
129 #define CONFIG_SYS_IFX_ASC_BASE 0x1E100C00
130 #endif
131
132 #ifdef CONFIG_SYS_RAMBOOT
133 /* Configuration of EBU: */
134 /* starting address from 0xb0000000 */
135 /* make the flash available from RAM boot */
136 # define CONFIG_EBU_ADDSEL0 0x10000031
137 # define CONFIG_EBU_BUSCON0 0x0001D7FF
138 # define CONFIG_EBU_ADDSEL1 0x14000001
139 # define CONFIG_EBU_BUSCON1 0x4041D7FD
140 #endif
141
142 #define CONFIG_CMD_HTTPD /* enable upgrade via HTTPD */
143
144 //#define CONFIG_ETHADDR 00:13:f7:df:1c:80
145 //#define CONFIG_ETHADDR 11:22:33:44:55:66
146 #define CONFIG_IPADDR 192.168.2.1
147 #define CONFIG_SERVERIP 192.168.2.101
148 #define CONFIG_GATEWAYIP 192.168.2.254
149 #define CONFIG_NETMASK 255.255.255.0
150 #define CONFIG_ROOTPATH "/export"
151
152 #endif /* __CONFIG_H */