package/uboot-xburst/files/cpu/mips/nanonote_gpm940b0.c

   1 /*
   2  * JzRISC lcd controller
   3  *
   4  * xiangfu liu <xiangfu.z@gmail.com>
   5  *
   6  * This program is free software; you can redistribute it and/or
   7  * modify it under the terms of the GNU General Public License as
   8  * published by the Free Software Foundation; either version 2 of
   9  * the License, or (at your option) any later version.
  10  *
  11  * This program is distributed in the hope that it will be useful,
  12  * but WITHOUT ANY WARRANTY; without even the implied warranty of
  13  * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
  14  * GNU General Public License for more details.
  15  *
  16  * You should have received a copy of the GNU General Public License
  17  * along with this program; if not, write to the Free Software
  18  * Foundation, Inc., 59 Temple Place, Suite 330, Boston,
  19  * MA 02111-1307 USA
  20  */
  21
  22 #include <config.h>
  23 #include <common.h>
  24 #include <lcd.h>
  25
  26 #include <asm/io.h>               /* virt_to_phys() */
  27
  28 #include <asm/jz4740.h>
  29 #include "nanonote_gpm940b0.h"
  30
  31 #define align2(n) (n)=((((n)+1)>>1)<<1)
  32 #define align4(n) (n)=((((n)+3)>>2)<<2)
  33 #define align8(n) (n)=((((n)+7)>>3)<<3)
  34
  35 struct jzfb_info {
  36         unsigned int cfg;       /* panel mode and pin usage etc. */
  37         unsigned int w;
  38         unsigned int h;
  39         unsigned int bpp;       /* bit per pixel */
  40         unsigned int fclk;      /* frame clk */
  41         unsigned int hsw;       /* hsync width, in pclk */
  42         unsigned int vsw;       /* vsync width, in line count */
  43         unsigned int elw;       /* end of line, in pclk */
  44         unsigned int blw;       /* begin of line, in pclk */
  45         unsigned int efw;       /* end of frame, in line count */
  46         unsigned int bfw;       /* begin of frame, in line count */
  47 };
  48
  49 static struct jzfb_info jzfb = {
  50         MODE_8BIT_SERIAL_TFT | PCLK_N | HSYNC_N | VSYNC_N,
  51         320, 240, 32, 70, 1, 1, 273, 140, 1, 20
  52 };
  53
  54 vidinfo_t panel_info = {
  55         320, 240, LCD_BPP,
  56 };
  57
  58 int lcd_line_length;
  59
  60 int lcd_color_fg;
  61 int lcd_color_bg;
  62 /*
  63  * Frame buffer memory information
  64  */
  65 void *lcd_base;                 /* Start of framebuffer memory  */
  66 void *lcd_console_address;      /* Start of console buffer      */
  67
  68 short console_col;
  69 short console_row;
  70
  71 void lcd_ctrl_init (void *lcdbase);
  72 void lcd_enable (void);
  73 void lcd_disable (void);
  74
  75 static int  jz_lcd_init_mem(void *lcdbase, vidinfo_t *vid);
  76 static void jz_lcd_desc_init(vidinfo_t *vid);
  77 static int  jz_lcd_hw_init( vidinfo_t *vid );
  78 extern int flush_cache_all(void);
  79
  80 void lcd_ctrl_init (void *lcdbase)
  81 {
  82         __lcd_display_pin_init();
  83
  84         jz_lcd_init_mem(lcdbase, &panel_info);
  85         jz_lcd_desc_init(&panel_info);
  86         jz_lcd_hw_init(&panel_info);
  87
  88         __lcd_display_on() ;
  89 }
  90
  91 /*
  92  * Before enabled lcd controller, lcd registers should be configured correctly.
  93  */
  94
  95 void lcd_enable (void)
  96 {
  97         REG_LCD_CTRL &= ~(1<<4); /* LCDCTRL.DIS */
  98         REG_LCD_CTRL |= 1<<3;    /* LCDCTRL.ENA*/
  99 }
 100
 101 void lcd_disable (void)
 102 {
 103         REG_LCD_CTRL |= (1<<4); /* LCDCTRL.DIS, regular disable */
 104         /* REG_LCD_CTRL |= (1<<3); */  /* LCDCTRL.DIS, quikly disable */
 105 }
 106
 107 static int jz_lcd_init_mem(void *lcdbase, vidinfo_t *vid)
 108 {
 109         u_long palette_mem_size;
 110         struct jz_fb_info *fbi = &vid->jz_fb;
 111         int fb_size = vid->vl_row * (vid->vl_col * NBITS (vid->vl_bpix)) / 8;
 112
 113         fbi->screen = (u_long)lcdbase;
 114         fbi->palette_size = 256;
 115         palette_mem_size = fbi->palette_size * sizeof(u16);
 116
 117         debug("jz_lcd.c palette_mem_size = 0x%08lx\n", (u_long) palette_mem_size);
 118         /* locate palette and descs at end of page following fb */
 119         fbi->palette = (u_long)lcdbase + fb_size + PAGE_SIZE - palette_mem_size;
 120
 121         return 0;
 122 }
 123
 124 static void jz_lcd_desc_init(vidinfo_t *vid)
 125 {
 126         struct jz_fb_info * fbi;
 127         fbi = &vid->jz_fb;
 128         fbi->dmadesc_fblow = (struct jz_fb_dma_descriptor *)((unsigned int)fbi->palette - 3*16);
 129         fbi->dmadesc_fbhigh = (struct jz_fb_dma_descriptor *)((unsigned int)fbi->palette - 2*16);
 130         fbi->dmadesc_palette = (struct jz_fb_dma_descriptor *)((unsigned int)fbi->palette - 1*16);
 131
 132         #define BYTES_PER_PANEL  (vid->vl_col * vid->vl_row * NBITS(vid->vl_bpix) / 8)
 133
 134         /* populate descriptors */
 135         fbi->dmadesc_fblow->fdadr = virt_to_phys(fbi->dmadesc_fblow);
 136         fbi->dmadesc_fblow->fsadr = virt_to_phys((void *)(fbi->screen + BYTES_PER_PANEL));
 137         fbi->dmadesc_fblow->fidr  = 0;
 138         fbi->dmadesc_fblow->ldcmd = BYTES_PER_PANEL / 4 ;
 139
 140         fbi->fdadr1 = virt_to_phys(fbi->dmadesc_fblow); /* only used in dual-panel mode */
 141
 142         fbi->dmadesc_fbhigh->fsadr = virt_to_phys((void *)fbi->screen);
 143         fbi->dmadesc_fbhigh->fidr = 0;
 144         fbi->dmadesc_fbhigh->ldcmd =  BYTES_PER_PANEL / 4; /* length in word */
 145
 146         fbi->dmadesc_palette->fsadr = virt_to_phys((void *)fbi->palette);
 147         fbi->dmadesc_palette->fidr  = 0;
 148         fbi->dmadesc_palette->ldcmd = (fbi->palette_size * 2)/4 | (1<<28);
 149
 150         if(NBITS(vid->vl_bpix) < 12)
 151         {
 152                 /* assume any mode with <12 bpp is palette driven */
 153                 fbi->dmadesc_palette->fdadr = virt_to_phys(fbi->dmadesc_fbhigh);
 154                 fbi->dmadesc_fbhigh->fdadr = virt_to_phys(fbi->dmadesc_palette);
 155                 /* flips back and forth between pal and fbhigh */
 156                 fbi->fdadr0 = virt_to_phys(fbi->dmadesc_palette);
 157         } else {
 158                 /* palette shouldn't be loaded in true-color mode */
 159                 fbi->dmadesc_fbhigh->fdadr = virt_to_phys((void *)fbi->dmadesc_fbhigh);
 160                 fbi->fdadr0 = virt_to_phys(fbi->dmadesc_fbhigh); /* no pal just fbhigh */
 161         }
 162
 163         flush_cache_all();
 164 }
 165
 166 static int  jz_lcd_hw_init(vidinfo_t *vid)
 167 {
 168         struct jz_fb_info *fbi = &vid->jz_fb;
 169         unsigned int val = 0;
 170         unsigned int pclk;
 171         unsigned int stnH;
 172         int pll_div;
 173
 174         /* Setting Control register */
 175         switch (jzfb.bpp) {
 176         case 1:
 177                 val |= LCD_CTRL_BPP_1;
 178                 break;
 179         case 2:
 180                 val |= LCD_CTRL_BPP_2;
 181                 break;
 182         case 4:
 183                 val |= LCD_CTRL_BPP_4;
 184                 break;
 185         case 8:
 186                 val |= LCD_CTRL_BPP_8;
 187                 break;
 188         case 15:
 189                 val |= LCD_CTRL_RGB555;
 190         case 16:
 191                 val |= LCD_CTRL_BPP_16;
 192                 break;
 193         case 17 ... 32:
 194                 val |= LCD_CTRL_BPP_18_24;      /* target is 4bytes/pixel */
 195                 break;
 196
 197         default:
 198                 printf("jz_lcd.c The BPP %d is not supported\n", jzfb.bpp);
 199                 val |= LCD_CTRL_BPP_16;
 200                 break;
 201         }
 202
 203         switch (jzfb.cfg & MODE_MASK) {
 204         case MODE_STN_MONO_DUAL:
 205         case MODE_STN_COLOR_DUAL:
 206         case MODE_STN_MONO_SINGLE:
 207         case MODE_STN_COLOR_SINGLE:
 208                 switch (jzfb.bpp) {
 209                 case 1:
 210                         /* val |= LCD_CTRL_PEDN; */
 211                 case 2:
 212                         val |= LCD_CTRL_FRC_2;
 213                         break;
 214                 case 4:
 215                         val |= LCD_CTRL_FRC_4;
 216                         break;
 217                 case 8:
 218                 default:
 219                         val |= LCD_CTRL_FRC_16;
 220                         break;
 221                 }
 222                 break;
 223         }
 224
 225         val |= LCD_CTRL_BST_16;         /* Burst Length is 16WORD=64Byte */
 226         val |= LCD_CTRL_OFUP;           /* OutFIFO underrun protect */
 227
 228         switch (jzfb.cfg & MODE_MASK) {
 229         case MODE_STN_MONO_DUAL:
 230         case MODE_STN_COLOR_DUAL:
 231         case MODE_STN_MONO_SINGLE:
 232         case MODE_STN_COLOR_SINGLE:
 233                 switch (jzfb.cfg & STN_DAT_PINMASK) {
 234                 case STN_DAT_PIN1:
 235                         /* Do not adjust the hori-param value. */
 236                         break;
 237                 case STN_DAT_PIN2:
 238                         align2(jzfb.hsw);
 239                         align2(jzfb.elw);
 240                         align2(jzfb.blw);
 241                         break;
 242                 case STN_DAT_PIN4:
 243                         align4(jzfb.hsw);
 244                         align4(jzfb.elw);
 245                         align4(jzfb.blw);
 246                         break;
 247                 case STN_DAT_PIN8:
 248                         align8(jzfb.hsw);
 249                         align8(jzfb.elw);
 250                         align8(jzfb.blw);
 251                         break;
 252                 }
 253                 break;
 254         }
 255
 256         REG_LCD_CTRL = val;
 257
 258         switch (jzfb.cfg & MODE_MASK) {
 259         case MODE_STN_MONO_DUAL:
 260         case MODE_STN_COLOR_DUAL:
 261         case MODE_STN_MONO_SINGLE:
 262         case MODE_STN_COLOR_SINGLE:
 263                 if (((jzfb.cfg & MODE_MASK) == MODE_STN_MONO_DUAL) ||
 264                     ((jzfb.cfg & MODE_MASK) == MODE_STN_COLOR_DUAL))
 265                         stnH = jzfb.h >> 1;
 266                 else
 267                         stnH = jzfb.h;
 268
 269                 REG_LCD_VSYNC = (0 << 16) | jzfb.vsw;
 270                 REG_LCD_HSYNC = ((jzfb.blw+jzfb.w) << 16) | (jzfb.blw+jzfb.w+jzfb.hsw);
 271
 272                 /* Screen setting */
 273                 REG_LCD_VAT = ((jzfb.blw + jzfb.w + jzfb.hsw + jzfb.elw) << 16) | (stnH + jzfb.vsw + jzfb.bfw + jzfb.efw);
 274                 REG_LCD_DAH = (jzfb.blw << 16) | (jzfb.blw + jzfb.w);
 275                 REG_LCD_DAV = (0 << 16) | (stnH);
 276
 277                 /* AC BIAs signal */
 278                 REG_LCD_PS = (0 << 16) | (stnH+jzfb.vsw+jzfb.efw+jzfb.bfw);
 279
 280                 break;
 281
 282         case MODE_TFT_GEN:
 283         case MODE_TFT_SHARP:
 284         case MODE_TFT_CASIO:
 285         case MODE_TFT_SAMSUNG:
 286         case MODE_8BIT_SERIAL_TFT:
 287         case MODE_TFT_18BIT:
 288                 REG_LCD_VSYNC = (0 << 16) | jzfb.vsw;
 289                 REG_LCD_HSYNC = (0 << 16) | jzfb.hsw;
 290                 REG_LCD_DAV =((jzfb.vsw+jzfb.bfw) << 16) | (jzfb.vsw +jzfb.bfw+jzfb.h);
 291                 REG_LCD_DAH = ((jzfb.hsw + jzfb.blw) << 16) | (jzfb.hsw + jzfb.blw + jzfb.w );
 292                 REG_LCD_VAT = (((jzfb.blw + jzfb.w + jzfb.elw + jzfb.hsw)) << 16) \
 293                         | (jzfb.vsw + jzfb.bfw + jzfb.h + jzfb.efw);
 294                 break;
 295         }
 296
 297         switch (jzfb.cfg & MODE_MASK) {
 298         case MODE_TFT_SAMSUNG:
 299         {
 300                 unsigned int total, tp_s, tp_e, ckv_s, ckv_e;
 301                 unsigned int rev_s, rev_e, inv_s, inv_e;
 302
 303                 pclk = val * (jzfb.w + jzfb.hsw + jzfb.elw + jzfb.blw) *
 304                         (jzfb.h + jzfb.vsw + jzfb.efw + jzfb.bfw); /* Pixclk */
 305
 306                 total = jzfb.blw + jzfb.w + jzfb.elw + jzfb.hsw;
 307                 tp_s = jzfb.blw + jzfb.w + 1;
 308                 tp_e = tp_s + 1;
 309                 /* ckv_s = tp_s - jz_clocks.pixclk/(1000000000/4100); */
 310                 ckv_s = tp_s - pclk/(1000000000/4100);
 311                 ckv_e = tp_s + total;
 312                 rev_s = tp_s - 11;      /* -11.5 clk */
 313                 rev_e = rev_s + total;
 314                 inv_s = tp_s;
 315                 inv_e = inv_s + total;
 316                 REG_LCD_CLS = (tp_s << 16) | tp_e;
 317                 REG_LCD_PS = (ckv_s << 16) | ckv_e;
 318                 REG_LCD_SPL = (rev_s << 16) | rev_e;
 319                 REG_LCD_REV = (inv_s << 16) | inv_e;
 320                 jzfb.cfg |= STFT_REVHI | STFT_SPLHI;
 321                 break;
 322         }
 323         case MODE_TFT_SHARP:
 324         {
 325                 unsigned int total, cls_s, cls_e, ps_s, ps_e;
 326                 unsigned int spl_s, spl_e, rev_s, rev_e;
 327                 total = jzfb.blw + jzfb.w + jzfb.elw + jzfb.hsw;
 328                 spl_s = 1;
 329                 spl_e = spl_s + 1;
 330                 cls_s = 0;
 331                 cls_e = total - 60;     /* > 4us (pclk = 80ns) */
 332                 ps_s = cls_s;
 333                 ps_e = cls_e;
 334                 rev_s = total - 40;     /* > 3us (pclk = 80ns) */
 335                 rev_e = rev_s + total;
 336                 jzfb.cfg |= STFT_PSHI;
 337                 REG_LCD_SPL = (spl_s << 16) | spl_e;
 338                 REG_LCD_CLS = (cls_s << 16) | cls_e;
 339                 REG_LCD_PS = (ps_s << 16) | ps_e;
 340                 REG_LCD_REV = (rev_s << 16) | rev_e;
 341                 break;
 342         }
 343         case MODE_TFT_CASIO:
 344                 break;
 345         }
 346
 347         /* Configure the LCD panel */
 348         REG_LCD_CFG = jzfb.cfg;
 349
 350         /* Timing setting */
 351         __cpm_stop_lcd();
 352
 353         val = jzfb.fclk; /* frame clk */
 354         if ( (jzfb.cfg & MODE_MASK) != MODE_8BIT_SERIAL_TFT) {
 355                 pclk = val * (jzfb.w + jzfb.hsw + jzfb.elw + jzfb.blw) *
 356                         (jzfb.h + jzfb.vsw + jzfb.efw + jzfb.bfw); /* Pixclk */
 357         } else {
 358                 /* serial mode: Hsync period = 3*Width_Pixel */
 359                 pclk = val * (jzfb.w*3 + jzfb.hsw + jzfb.elw + jzfb.blw) *
 360                         (jzfb.h + jzfb.vsw + jzfb.efw + jzfb.bfw); /* Pixclk */
 361         }
 362
 363         if (((jzfb.cfg & MODE_MASK) == MODE_STN_COLOR_SINGLE) ||
 364             ((jzfb.cfg & MODE_MASK) == MODE_STN_COLOR_DUAL))
 365                 pclk = (pclk * 3);
 366
 367         if (((jzfb.cfg & MODE_MASK) == MODE_STN_COLOR_SINGLE) ||
 368             ((jzfb.cfg & MODE_MASK) == MODE_STN_COLOR_DUAL) ||
 369             ((jzfb.cfg & MODE_MASK) == MODE_STN_MONO_SINGLE) ||
 370             ((jzfb.cfg & MODE_MASK) == MODE_STN_MONO_DUAL))
 371                 pclk = pclk >> ((jzfb.cfg & STN_DAT_PINMASK) >> 4);
 372
 373         if (((jzfb.cfg & MODE_MASK) == MODE_STN_COLOR_DUAL) ||
 374             ((jzfb.cfg & MODE_MASK) == MODE_STN_MONO_DUAL))
 375                 pclk >>= 1;
 376
 377         pll_div = ( REG_CPM_CPCCR & CPM_CPCCR_PCS ); /* clock source,0:pllout/2 1: pllout */
 378         pll_div = pll_div ? 1 : 2 ;
 379         val = ( __cpm_get_pllout()/pll_div ) / pclk;
 380         val--;
 381         if ( val > 0x1ff ) {
 382                 printf("CPM_LPCDR too large, set it to 0x1ff\n");
 383                 val = 0x1ff;
 384         }
 385         __cpm_set_pixdiv(val);
 386
 387         val = pclk * 3 ;        /* LCDClock > 2.5*Pixclock */
 388         if ( val > 150000000 ) {
 389                 printf("Warning: LCDClock=%d\n, LCDClock must less or equal to 150MHz.\n", val);
 390                 printf("Change LCDClock to 150MHz\n");
 391                 val = 150000000;
 392         }
 393         val = ( __cpm_get_pllout()/pll_div ) / val;
 394         val--;
 395         if ( val > 0x1f ) {
 396                 printf("CPM_CPCCR.LDIV too large, set it to 0x1f\n");
 397                 val = 0x1f;
 398         }
 399         __cpm_set_ldiv( val );
 400         REG_CPM_CPCCR |= CPM_CPCCR_CE ; /* update divide */
 401
 402         __cpm_start_lcd();
 403         udelay(1000);
 404
 405         REG_LCD_DA0 = fbi->fdadr0; /* frame descripter*/
 406
 407         if (((jzfb.cfg & MODE_MASK) == MODE_STN_COLOR_DUAL) ||
 408             ((jzfb.cfg & MODE_MASK) == MODE_STN_MONO_DUAL))
 409                 REG_LCD_DA1 = fbi->fdadr1; /* frame descripter*/
 410
 411         return 0;
 412 }
 413
 414 void lcd_setcolreg (ushort regno, ushort red, ushort green, ushort blue)
 415 {
 416 }
 417
 418 void lcd_initcolregs (void)
 419 {
 420 }