23e668411cb3af4a71953ad0c2a1bf6d577c5d60
[openwrt/svn-archive/archive.git] / target / linux / adm5120-2.6 / files / arch / mips / adm5120 / setup.c
1 /*
2 * Copyright (C) ADMtek Incorporated.
3 * Creator : daniell@admtek.com.tw
4 * Copyright 1999, 2000 MIPS Technologies, Inc.
5 * Copyright Jeroen Vreeken (pe1rxq@amsat.org), 2005
6 */
7
8 #include <linux/autoconf.h>
9 #include <linux/init.h>
10 #include <linux/device.h>
11 #include <linux/platform_device.h>
12
13 #include <asm/reboot.h>
14 #include <asm/io.h>
15 #include <asm/time.h>
16
17 #define ADM5120_SOFTRESET 0x12000004
18 #define STATUS_IE 0x00000001
19 #define ALLINTS (IE_IRQ0 | IE_IRQ5 | STATUS_IE)
20
21 #define ADM5120_CODEREG 0x12000000
22 #define ADM5120_CPU_CLK_MASK 0x00300000
23 #define ADM5120_CPU_CLK_175 0x00000000
24 #define ADM5120_CPU_CLK_200 0x00100000
25 #define ADM5120_CPU_CLK_225 0x00200000
26 #define ADM5120_CPU_CLK_250 0x00300000
27
28 void mips_time_init(void);
29
30 extern unsigned int mips_counter_frequency;
31
32 void adm5120_restart(char *command)
33 {
34 *(u32*)KSEG1ADDR(ADM5120_SOFTRESET)=1;
35 }
36
37
38 void adm5120_halt(void)
39 {
40 printk(KERN_NOTICE "\n** You can safely turn off the power\n");
41 while (1);
42 }
43
44
45 void adm5120_power_off(void)
46 {
47 adm5120_halt();
48 }
49
50 void __init mips_time_init(void)
51 {
52 u32 clock;
53
54 clock = *(u32*)KSEG1ADDR(ADM5120_CODEREG);
55
56 switch (clock & ADM5120_CPU_CLK_MASK) {
57 case ADM5120_CPU_CLK_175:
58 mips_counter_frequency = 87500000;
59 printk("CPU clock: 175MHz\n");
60 break;
61 case ADM5120_CPU_CLK_200:
62 mips_counter_frequency = 100000000;
63 printk("CPU clock: 200MHz\n");
64 break;
65 case ADM5120_CPU_CLK_225:
66 mips_counter_frequency = 112500000;
67 printk("CPU clock: 225MHz\n");
68 break;
69 case ADM5120_CPU_CLK_250:
70 mips_counter_frequency = 125000000;
71 printk("CPU clock: 250MHz\n");
72 break;
73 }
74 }
75
76 void __init plat_timer_setup(struct irqaction *irq)
77 {
78 /* to generate the first timer interrupt */
79 write_c0_compare(read_c0_count()+ mips_counter_frequency/HZ);
80 clear_c0_status(ST0_BEV);
81 set_c0_status(ALLINTS);
82 }
83
84 void __init plat_mem_setup(void)
85 {
86 printk(KERN_INFO "ADM5120 board setup\n");
87
88 board_time_init = mips_time_init;
89 //board_timer_setup = mips_timer_setup;
90
91 _machine_restart = adm5120_restart;
92 _machine_halt = adm5120_halt;
93 pm_power_off = adm5120_power_off;
94
95 set_io_port_base(KSEG1);
96 }
97
98 const char *get_system_type(void)
99 {
100 return "ADM5120 Board";
101 }
102
103 static struct resource adm5120_hcd_resources[] = {
104 [0] = {
105 .start = 0x11200000,
106 .end = 0x11200084,
107 .flags = IORESOURCE_MEM,
108 },
109 [1] = {
110 .start = 0x3,
111 .end = 0x3,
112 .flags = IORESOURCE_IRQ,
113 },
114 };
115
116 static struct platform_device adm5120hcd_device = {
117 .name = "adm5120-hcd",
118 .id = -1,
119 .num_resources = ARRAY_SIZE(adm5120_hcd_resources),
120 .resource = adm5120_hcd_resources,
121 };
122
123 static struct platform_device *devices[] __initdata = {
124 &adm5120hcd_device,
125 };
126
127 static int __init adm5120_init(void)
128 {
129 return platform_add_devices(devices, ARRAY_SIZE(devices));
130 }
131
132 subsys_initcall(adm5120_init);