target/linux/adm5120-2.6/files/drivers/mtd/nand/rbmipsnand.c

   1 /*==============================================================================*/
   2 /* rbmipsnand.c                                                                 */
   3 /* This module is derived from the 2.4 driver shipped by Microtik for their     */
   4 /* Routerboard 1xx and 5xx series boards.  It provides support for the built in */
   5 /* NAND flash on the Routerboard 1xx series boards for Linux 2.6.19+.           */
   6 /* Licence: Original Microtik code seems not to have a licence.                 */
   7 /*          Rewritten code all GPL V2.                                          */
   8 /* Copyright(C) 2007 david.goodenough@linkchoose.co.uk (for rewriten code)      */
   9 /*==============================================================================*/
  10
  11 #include <linux/init.h>
  12 #include <linux/mtd/nand.h>
  13 #include <linux/mtd/mtd.h>
  14 #include <linux/mtd/partitions.h>
  15 #include <linux/delay.h>
  16 #include <asm/io.h>
  17 #include <asm/irq.h>
  18 #include <asm/bootinfo.h>
  19
  20 #define SMEM1_BASE 0x10000000   // from ADM5120 documentation
  21 #define SMEM1(x) (*((volatile unsigned char *) (KSEG1ADDR(SMEM1_BASE) + x)))
  22
  23 #define NAND_RW_REG     0x0     //data register
  24 #define NAND_SET_CEn    0x1     //CE# low
  25 #define NAND_CLR_CEn    0x2     //CE# high
  26 #define NAND_CLR_CLE    0x3     //CLE low
  27 #define NAND_SET_CLE    0x4     //CLE high
  28 #define NAND_CLR_ALE    0x5     //ALE low
  29 #define NAND_SET_ALE    0x6     //ALE high
  30 #define NAND_SET_SPn    0x7     //SP# low (use spare area)
  31 #define NAND_CLR_SPn    0x8     //SP# high (do not use spare area)
  32 #define NAND_SET_WPn    0x9     //WP# low
  33 #define NAND_CLR_WPn    0xA     //WP# high
  34 #define NAND_STS_REG    0xB     //Status register
  35
  36 #define MEM32(x) *((volatile unsigned *) (x))
  37 static void __iomem *p_nand;
  38
  39 static int rb100_dev_ready(struct mtd_info *mtd) {
  40     return SMEM1(NAND_STS_REG) & 0x80;
  41 }
  42
  43 static void rbmips_hwcontrol100(struct mtd_info *mtd, int cmd, unsigned int ctrl) {
  44     struct nand_chip *chip = mtd->priv;
  45     if (ctrl & NAND_CTRL_CHANGE) {
  46         SMEM1((( ctrl & NAND_CLE) ? NAND_SET_CLE : NAND_CLR_CLE)) = 0x01;
  47         SMEM1((( ctrl & NAND_ALE) ? NAND_SET_ALE : NAND_CLR_ALE)) = 0x01;
  48         SMEM1((( ctrl & NAND_NCE) ? NAND_SET_CEn : NAND_CLR_CEn)) = 0x01;
  49         }
  50     if( cmd != NAND_CMD_NONE)
  51         writeb( cmd, chip->IO_ADDR_W);
  52 }
  53
  54 static struct mtd_partition partition_info[] = {
  55     {
  56         name: "RouterBoard NAND Boot",
  57         offset: 0,
  58         size: 4 * 1024 * 1024
  59     },
  60     {
  61         name: "rootfs",
  62         offset: MTDPART_OFS_NXTBLK,
  63         size: MTDPART_SIZ_FULL
  64     }
  65 };
  66
  67 static struct mtd_info rmtd;
  68 static struct nand_chip rnand;
  69 /*========================================================================*/
  70 /* We need to use the OLD Yaffs-1 OOB layout, otherwise the RB bootloader */
  71 /* will not be able to find the kernel that we load.  So set the oobinfo  */
  72 /* when creating the partitions.                                          */
  73 /*========================================================================*/
  74 static struct nand_ecclayout rb_ecclayout = {
  75         .eccbytes = 6,
  76         .eccpos = { 8, 9, 10, 13, 14, 15 },
  77         .oobavail = 9,
  78         .oobfree = { { 0, 4 }, { 6, 2 }, { 11, 2 }, { 4, 1} }
  79 };
  80 static unsigned init_ok = 0;
  81
  82 unsigned get_rbnand_block_size(void) {
  83         return init_ok ? rmtd.writesize : 0;
  84 }
  85
  86 EXPORT_SYMBOL(get_rbnand_block_size);
  87
  88 int __init rbmips_init(void) {
  89         memset(&rmtd, 0, sizeof(rmtd));
  90         memset(&rnand, 0, sizeof(rnand));
  91         printk(KERN_INFO "RB1xx nand\n");
  92         MEM32(0xB2000064) = 0x100;
  93         MEM32(0xB2000008) = 0x1;
  94         SMEM1(NAND_SET_SPn) = 0x01;
  95         SMEM1(NAND_CLR_WPn) = 0x01;
  96         rnand.IO_ADDR_R = (unsigned char *)KSEG1ADDR(SMEM1_BASE);
  97         rnand.IO_ADDR_W = rnand.IO_ADDR_R;
  98         rnand.cmd_ctrl = rbmips_hwcontrol100;
  99         rnand.dev_ready = rb100_dev_ready;
 100         p_nand = (void __iomem *)ioremap(( unsigned long)SMEM1_BASE, 0x1000);
 101         if (!p_nand) {
 102                 printk(KERN_WARNING "RB1xx nand Unable ioremap buffer\n");
 103                 return -ENXIO;
 104         }
 105         rnand.ecc.mode = NAND_ECC_SOFT;
 106         rnand.ecc.layout = &rb_ecclayout;
 107         rnand.chip_delay = 25;
 108         rnand.options |= NAND_NO_AUTOINCR;
 109         rmtd.priv = &rnand;
 110         if (nand_scan(&rmtd, 1) && nand_scan(&rmtd, 1)
 111             && nand_scan(&rmtd, 1)  && nand_scan(&rmtd, 1)) {
 112                 printk(KERN_INFO "RB1xxx nand device not found\n");
 113                 iounmap ((void *)p_nand);
 114                 return -ENXIO;
 115         }
 116         add_mtd_partitions(&rmtd, partition_info, 2);
 117         init_ok = 1;
 118         return 0;
 119 }
 120
 121 module_init(rbmips_init);
 122