9526fe977f690ac21921052c6c6e839223a7ba34
[openwrt/svn-archive/archive.git] / target / linux / adm5120 / files-2.6.26 / arch / mips / adm5120 / common / platform.c
1 /*
2 * ADM5120 generic platform devices
3 *
4 * Copyright (C) 2007-2008 Gabor Juhos <juhosg@openwrt.org>
5 *
6 * This program is free software; you can redistribute it and/or modify it
7 * under the terms of the GNU General Public License version 2 as published
8 * by the Free Software Foundation.
9 *
10 */
11
12 #include <linux/init.h>
13 #include <linux/kernel.h>
14 #include <linux/list.h>
15 #include <linux/device.h>
16 #include <linux/dma-mapping.h>
17 #include <linux/platform_device.h>
18 #include <linux/gpio.h>
19 #include <linux/irq.h>
20
21 #include <asm/bootinfo.h>
22
23 #include <asm/mach-adm5120/adm5120_defs.h>
24 #include <asm/mach-adm5120/adm5120_info.h>
25 #include <asm/mach-adm5120/adm5120_switch.h>
26 #include <asm/mach-adm5120/adm5120_nand.h>
27 #include <asm/mach-adm5120/adm5120_platform.h>
28
29 #if 1
30 /*
31 * TODO:remove global adm5120_eth* variables when the switch driver will be
32 * converted into a real platform driver
33 */
34 unsigned int adm5120_eth_num_ports = 6;
35 EXPORT_SYMBOL_GPL(adm5120_eth_num_ports);
36
37 unsigned char adm5120_eth_macs[6][6] = {
38 {'\00', 'A', 'D', 'M', '\x51', '\x20' },
39 {'\00', 'A', 'D', 'M', '\x51', '\x21' },
40 {'\00', 'A', 'D', 'M', '\x51', '\x22' },
41 {'\00', 'A', 'D', 'M', '\x51', '\x23' },
42 {'\00', 'A', 'D', 'M', '\x51', '\x24' },
43 {'\00', 'A', 'D', 'M', '\x51', '\x25' }
44 };
45 EXPORT_SYMBOL_GPL(adm5120_eth_macs);
46
47 unsigned char adm5120_eth_vlans[6] = {
48 0x41, 0x42, 0x44, 0x48, 0x50, 0x60
49 };
50 EXPORT_SYMBOL_GPL(adm5120_eth_vlans);
51 #endif
52
53 void __init adm5120_setup_eth_macs(u8 *mac_base)
54 {
55 u32 t;
56 int i, j;
57
58 t = ((u32) mac_base[3] << 16) | ((u32) mac_base[4] << 8)
59 | ((u32) mac_base[5]);
60
61 for (i = 0; i < ARRAY_SIZE(adm5120_eth_macs); i++) {
62 for (j = 0; j < 3; j++)
63 adm5120_eth_macs[i][j] = mac_base[j];
64
65 adm5120_eth_macs[i][3] = (t >> 16) & 0xff;
66 adm5120_eth_macs[i][4] = (t >> 8) & 0xff;
67 adm5120_eth_macs[i][5] = t & 0xff;
68
69 t++;
70 }
71 }
72
73 /*
74 * Built-in ethernet switch
75 */
76 struct resource adm5120_switch_resources[] = {
77 [0] = {
78 .start = ADM5120_SWITCH_BASE,
79 .end = ADM5120_SWITCH_BASE+ADM5120_SWITCH_SIZE-1,
80 .flags = IORESOURCE_MEM,
81 },
82 [1] = {
83 .start = ADM5120_IRQ_SWITCH,
84 .end = ADM5120_IRQ_SWITCH,
85 .flags = IORESOURCE_IRQ,
86 },
87 };
88
89 struct adm5120_switch_platform_data adm5120_switch_data;
90 struct platform_device adm5120_switch_device = {
91 .name = "adm5120-switch",
92 .id = -1,
93 .num_resources = ARRAY_SIZE(adm5120_switch_resources),
94 .resource = adm5120_switch_resources,
95 .dev.platform_data = &adm5120_switch_data,
96 };
97
98 void __init adm5120_add_device_switch(unsigned num_ports, u8 *vlan_map)
99 {
100 if (num_ports > 0)
101 adm5120_eth_num_ports = num_ports;
102
103 if (vlan_map)
104 memcpy(adm5120_eth_vlans, vlan_map, sizeof(adm5120_eth_vlans));
105
106 platform_device_register(&adm5120_switch_device);
107 }
108
109 /*
110 * USB Host Controller
111 */
112 struct resource adm5120_hcd_resources[] = {
113 [0] = {
114 .start = ADM5120_USBC_BASE,
115 .end = ADM5120_USBC_BASE+ADM5120_USBC_SIZE-1,
116 .flags = IORESOURCE_MEM,
117 },
118 [1] = {
119 .start = ADM5120_IRQ_USBC,
120 .end = ADM5120_IRQ_USBC,
121 .flags = IORESOURCE_IRQ,
122 },
123 };
124
125 static u64 adm5120_hcd_dma_mask = DMA_BIT_MASK(24);
126 struct platform_device adm5120_hcd_device = {
127 .name = "adm5120-hcd",
128 .id = -1,
129 .num_resources = ARRAY_SIZE(adm5120_hcd_resources),
130 .resource = adm5120_hcd_resources,
131 .dev = {
132 .dma_mask = &adm5120_hcd_dma_mask,
133 .coherent_dma_mask = DMA_BIT_MASK(24),
134 }
135 };
136
137 void __init adm5120_add_device_usb(void)
138 {
139 platform_device_register(&adm5120_hcd_device);
140 }
141
142 /*
143 * NOR flash devices
144 */
145 struct adm5120_flash_platform_data adm5120_flash0_data;
146 struct platform_device adm5120_flash0_device = {
147 .name = "adm5120-flash",
148 .id = 0,
149 .dev.platform_data = &adm5120_flash0_data,
150 };
151
152 struct adm5120_flash_platform_data adm5120_flash1_data;
153 struct platform_device adm5120_flash1_device = {
154 .name = "adm5120-flash",
155 .id = 1,
156 .dev.platform_data = &adm5120_flash1_data,
157 };
158
159 void __init adm5120_add_device_flash(unsigned id)
160 {
161 struct platform_device *pdev;
162
163 switch (id) {
164 case 0:
165 pdev = &adm5120_flash0_device;
166 break;
167 case 1:
168 pdev = &adm5120_flash1_device;
169 break;
170 default:
171 pdev = NULL;
172 break;
173 }
174
175 if (pdev)
176 platform_device_register(pdev);
177 }
178
179 /*
180 * built-in UARTs
181 */
182 static void adm5120_uart_set_mctrl(struct amba_device *dev, void __iomem *base,
183 unsigned int mctrl)
184 {
185 }
186
187 struct amba_pl010_data adm5120_uart0_data = {
188 .set_mctrl = adm5120_uart_set_mctrl
189 };
190
191 struct amba_device adm5120_uart0_device = {
192 .dev = {
193 .bus_id = "APB:UART0",
194 .platform_data = &adm5120_uart0_data,
195 },
196 .res = {
197 .start = ADM5120_UART0_BASE,
198 .end = ADM5120_UART0_BASE + ADM5120_UART_SIZE - 1,
199 .flags = IORESOURCE_MEM,
200 },
201 .irq = { ADM5120_IRQ_UART0, -1 },
202 .periphid = 0x0041010,
203 };
204
205 struct amba_pl010_data adm5120_uart1_data = {
206 .set_mctrl = adm5120_uart_set_mctrl
207 };
208
209 struct amba_device adm5120_uart1_device = {
210 .dev = {
211 .bus_id = "APB:UART1",
212 .platform_data = &adm5120_uart1_data,
213 },
214 .res = {
215 .start = ADM5120_UART1_BASE,
216 .end = ADM5120_UART1_BASE + ADM5120_UART_SIZE - 1,
217 .flags = IORESOURCE_MEM,
218 },
219 .irq = { ADM5120_IRQ_UART1, -1 },
220 .periphid = 0x0041010,
221 };
222
223 void __init adm5120_add_device_uart(unsigned id)
224 {
225 struct amba_device *dev;
226
227 switch (id) {
228 case 0:
229 dev = &adm5120_uart0_device;
230 break;
231 case 1:
232 dev = &adm5120_uart1_device;
233 break;
234 default:
235 dev = NULL;
236 break;
237 }
238
239 if (dev)
240 amba_device_register(dev, &iomem_resource);
241 }
242
243 /*
244 * GPIO buttons
245 */
246 #define ADM5120_BUTTON_INTERVAL 20
247 struct gpio_buttons_platform_data adm5120_gpio_buttons_data = {
248 .poll_interval = ADM5120_BUTTON_INTERVAL,
249 };
250
251 struct platform_device adm5120_gpio_buttons_device = {
252 .name = "gpio-buttons",
253 .id = -1,
254 .dev.platform_data = &adm5120_gpio_buttons_data,
255 };
256
257 void __init adm5120_add_device_gpio_buttons(unsigned nbuttons,
258 struct gpio_button *buttons)
259 {
260 struct gpio_button *p;
261
262 p = kmalloc(nbuttons * sizeof(*p), GFP_KERNEL);
263 if (!p)
264 return;
265
266 memcpy(p, buttons, nbuttons * sizeof(*p));
267 adm5120_gpio_buttons_data.nbuttons = nbuttons;
268 adm5120_gpio_buttons_data.buttons = p;
269
270 platform_device_register(&adm5120_gpio_buttons_device);
271 }
272
273 /*
274 * GPIO LEDS
275 */
276 struct gpio_led_platform_data adm5120_gpio_leds_data;
277 struct platform_device adm5120_gpio_leds_device = {
278 .name = "leds-gpio",
279 .id = -1,
280 .dev.platform_data = &adm5120_gpio_leds_data,
281 };
282
283 void __init adm5120_add_device_gpio_leds(unsigned num_leds,
284 struct gpio_led *leds)
285 {
286 struct gpio_led *p;
287
288 p = kmalloc(num_leds * sizeof(*p), GFP_KERNEL);
289 if (!p)
290 return;
291
292 memcpy(p, leds, num_leds * sizeof(*p));
293 adm5120_gpio_leds_data.num_leds = num_leds;
294 adm5120_gpio_leds_data.leds = p;
295
296 platform_device_register(&adm5120_gpio_leds_device);
297 }
298
299 /*
300 * GPIO device
301 */
302 static struct resource adm5120_gpio_resource[] __initdata = {
303 {
304 .start = 0x3fffff,
305 },
306 };
307
308 void __init adm5120_add_device_gpio(u32 disable_mask)
309 {
310 if (adm5120_package_pqfp())
311 disable_mask |= 0xf0;
312
313 adm5120_gpio_resource[0].start &= ~disable_mask;
314 platform_device_register_simple("GPIODEV", -1,
315 adm5120_gpio_resource,
316 ARRAY_SIZE(adm5120_gpio_resource));
317 }
318
319 /*
320 * NAND flash
321 */
322 struct resource adm5120_nand_resources[] = {
323 [0] = {
324 .start = ADM5120_NAND_BASE,
325 .end = ADM5120_NAND_BASE + ADM5120_NAND_SIZE-1,
326 .flags = IORESOURCE_MEM,
327 },
328 };
329
330 static int adm5120_nand_ready(struct mtd_info *mtd)
331 {
332 return ((adm5120_nand_get_status() & ADM5120_NAND_STATUS_READY) != 0);
333 }
334
335 static void adm5120_nand_cmd_ctrl(struct mtd_info *mtd, int cmd,
336 unsigned int ctrl)
337 {
338 if (ctrl & NAND_CTRL_CHANGE) {
339 adm5120_nand_set_cle(ctrl & NAND_CLE);
340 adm5120_nand_set_ale(ctrl & NAND_ALE);
341 adm5120_nand_set_cen(ctrl & NAND_NCE);
342 }
343
344 if (cmd != NAND_CMD_NONE)
345 NAND_WRITE_REG(NAND_REG_DATA, cmd);
346 }
347
348 void __init adm5120_add_device_nand(struct platform_nand_data *pdata)
349 {
350 struct platform_device *pdev;
351 int err;
352
353 pdev = platform_device_alloc("gen_nand", -1);
354 if (!pdev)
355 goto err_out;
356
357 err = platform_device_add_resources(pdev, adm5120_nand_resources,
358 ARRAY_SIZE(adm5120_nand_resources));
359 if (err)
360 goto err_put;
361
362 err = platform_device_add_data(pdev, pdata, sizeof(*pdata));
363 if (err)
364 goto err_put;
365
366 pdata = pdev->dev.platform_data;
367 pdata->ctrl.dev_ready = adm5120_nand_ready;
368 pdata->ctrl.cmd_ctrl = adm5120_nand_cmd_ctrl;
369
370 err = platform_device_add(pdev);
371 if (err)
372 goto err_put;
373
374 return;
375
376 err_put:
377 platform_device_put(pdev);
378 err_out:
379 return;
380 }