target/linux/adm5120/files/arch/mips/adm5120/adm5120_info.c

   1 /*
   2  *  $Id$
   3  *
   4  *  Copyright (C) 2007 OpenWrt.org
   5  *  Copyright (C) 2007 Gabor Juhos <juhosg at openwrt.org>
   6  *
   7  *  This program is free software; you can redistribute it and/or
   8  *  modify it under the terms of the GNU General Public License
   9  *  as published by the Free Software Foundation; either version 2
  10  *  of the License, or (at your option) any later version.
  11  *
  12  *  This program is distributed in the hope that it will be useful,
  13  *  but WITHOUT ANY WARRANTY; without even the implied warranty of
  14  *  MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
  15  *  GNU General Public License for more details.
  16  *
  17  *  You should have received a copy of the GNU General Public License
  18  *  along with this program; if not, write to the
  19  *  Free Software Foundation, Inc., 51 Franklin Street, Fifth Floor,
  20  *  Boston, MA  02110-1301, USA.
  21  *
  22  */
  23
  24 #include <linux/types.h>
  25 #include <linux/kernel.h>
  26 #include <linux/init.h>
  27
  28 #include <asm/bootinfo.h>
  29 #include <asm/addrspace.h>
  30
  31 #include <asm/mach-adm5120/adm5120_info.h>
  32 #include <asm/mach-adm5120/adm5120_defs.h>
  33 #include <asm/mach-adm5120/adm5120_switch.h>
  34
  35 unsigned int adm5120_product_code;
  36 unsigned int adm5120_revision;
  37 unsigned int adm5120_package;
  38 unsigned int adm5120_nand_boot;
  39 unsigned long adm5120_speed;
  40
  41 #define SWITCH_READ(r) *(u32 *)(KSEG1ADDR(ADM5120_SWITCH_BASE)+(r))
  42 #define SWITCH_WRITE(r,v) *(u32 *)(KSEG1ADDR(ADM5120_SWITCH_BASE)+(r))=(v)
  43
  44 /*
  45  * CPU settings detection
  46  */
  47 #define CODE_GET_PC(c)          ((c) & CODE_PC_MASK)
  48 #define CODE_GET_REV(c)         (((c) >> CODE_REV_SHIFT) & CODE_REV_MASK)
  49 #define CODE_GET_PK(c)          (((c) >> CODE_PK_SHIFT) & CODE_PK_MASK)
  50 #define CODE_GET_CLKS(c)        (((c) >> CODE_CLKS_SHIFT) & CODE_CLKS_MASK)
  51 #define CODE_GET_NAB(c)         (((c) & CODE_NAB) != 0)
  52
  53 void adm5120_ndelay(u32 ns)
  54 {
  55         u32     t;
  56
  57         SWITCH_WRITE(SWITCH_REG_TIMER, TIMER_PERIOD_DEFAULT);
  58         SWITCH_WRITE(SWITCH_REG_TIMER_INT, (TIMER_INT_TOS | TIMER_INT_TOM));
  59
  60         t = (ns+640) / 640;
  61         t &= TIMER_PERIOD_MASK;
  62         SWITCH_WRITE(SWITCH_REG_TIMER, t | TIMER_TE);
  63
  64         /* wait until the timer expires */
  65         do {
  66                 t = SWITCH_READ(SWITCH_REG_TIMER_INT);
  67         } while ((t & TIMER_INT_TOS) == 0);
  68
  69         /* leave the timer disabled */
  70         SWITCH_WRITE(SWITCH_REG_TIMER, TIMER_PERIOD_DEFAULT);
  71         SWITCH_WRITE(SWITCH_REG_TIMER_INT, (TIMER_INT_TOS | TIMER_INT_TOM));
  72 }
  73
  74 void __init adm5120_soc_init(void)
  75 {
  76         u32 code;
  77         u32 clks;
  78
  79         code = SWITCH_READ(SWITCH_REG_CODE);
  80
  81         adm5120_product_code = CODE_GET_PC(code);
  82         adm5120_revision = CODE_GET_REV(code);
  83         adm5120_package = (CODE_GET_PK(code) == CODE_PK_BGA) ?
  84                 ADM5120_PACKAGE_BGA : ADM5120_PACKAGE_PQFP;
  85         adm5120_nand_boot = CODE_GET_NAB(code);
  86
  87         clks = CODE_GET_CLKS(code);
  88         adm5120_speed = ADM5120_SPEED_175;
  89         if (clks & 1)
  90                 adm5120_speed += 25000000;
  91         if (clks & 2)
  92                 adm5120_speed += 50000000;
  93 }