48ea92f22be8fd5784f29555ea54c06be7f17d4c
[openwrt/svn-archive/archive.git] / target / linux / adm5120 / files / arch / mips / adm5120 / boards / mikrotik.c
1 /*
2 * $Id$
3 *
4 * Mikrotik RouterBOARD 1xx series
5 *
6 * Copyright (C) 2007 OpenWrt.org
7 * Copyright (C) 2007 Gabor Juhos <juhosg at openwrt.org>
8 *
9 * NAND initialization code was based on a driver for Linux 2.6.19+ which
10 * was derived from the driver for Linux 2.4.xx published by Mikrotik for
11 * their RouterBoard 1xx and 5xx series boards.
12 * Copyright (C) 2007 David Goodenough <david.goodenough@linkchoose.co.uk>
13 * Copyright (C) 2007 Florian Fainelli <florian@openwrt.org>
14 * The original Mikrotik code seems not to have a license.
15 *
16 * This program is free software; you can redistribute it and/or modify it
17 * under the terms of the GNU General Public License version 2 as published
18 * by the Free Software Foundation.
19 *
20 */
21
22 #include <linux/kernel.h>
23 #include <linux/init.h>
24 #include <linux/delay.h>
25
26 #include <asm/bootinfo.h>
27 #include <asm/gpio.h>
28
29 #include <adm5120_defs.h>
30 #include <adm5120_irq.h>
31 #include <adm5120_nand.h>
32 #include <adm5120_board.h>
33 #include <adm5120_platform.h>
34 #include <adm5120_info.h>
35
36 #include <prom/routerboot.h>
37
38 #define RB1XX_NAND_CHIP_DELAY 25
39
40 #define RB150_NAND_BASE 0x1FC80000
41 #define RB150_NAND_SIZE 1
42
43 #define RB150_GPIO_NAND_READY ADM5120_GPIO_PIN0
44 #define RB150_GPIO_NAND_NCE ADM5120_GPIO_PIN1
45 #define RB150_GPIO_NAND_CLE ADM5120_GPIO_P2L2
46 #define RB150_GPIO_NAND_ALE ADM5120_GPIO_P3L2
47
48 #define RB150_NAND_DELAY 100
49
50 #define RB150_NAND_WRITE(v) \
51 writeb((v), (void __iomem *)KSEG1ADDR(RB150_NAND_BASE))
52
53 /*--------------------------------------------------------------------------*/
54
55 static struct adm5120_pci_irq rb1xx_pci_irqs[] __initdata = {
56 PCIIRQ(1, 0, 1, ADM5120_IRQ_PCI0),
57 PCIIRQ(2, 0, 1, ADM5120_IRQ_PCI1),
58 PCIIRQ(3, 0, 1, ADM5120_IRQ_PCI2)
59 };
60
61 static struct mtd_partition rb1xx_nor_parts[] = {
62 {
63 .name = "booter",
64 .offset = 0,
65 .size = 64*1024,
66 .mask_flags = MTD_WRITEABLE,
67 } , {
68 .name = "firmware",
69 .offset = MTDPART_OFS_APPEND,
70 .size = MTDPART_SIZ_FULL,
71 }
72 };
73
74 static struct mtd_partition rb1xx_nand_parts[] = {
75 {
76 .name = "kernel",
77 .offset = 0,
78 .size = 4 * 1024 * 1024,
79 } , {
80 .name = "rootfs",
81 .offset = MTDPART_OFS_NXTBLK,
82 .size = MTDPART_SIZ_FULL
83 }
84 };
85
86 static struct platform_device *rb1xx_devices[] __initdata = {
87 &adm5120_flash0_device,
88 &adm5120_nand_device,
89 };
90
91 /*
92 * We need to use the OLD Yaffs-1 OOB layout, otherwise the RB bootloader
93 * will not be able to find the kernel that we load. So set the oobinfo
94 * when creating the partitions
95 */
96 static struct nand_ecclayout rb1xx_nand_ecclayout = {
97 .eccbytes = 6,
98 .eccpos = { 8, 9, 10, 13, 14, 15 },
99 .oobavail = 9,
100 .oobfree = { { 0, 4 }, { 6, 2 }, { 11, 2 }, { 4, 1 } }
101 };
102
103 static struct resource rb150_nand_resource[] = {
104 [0] = {
105 .start = RB150_NAND_BASE,
106 .end = RB150_NAND_BASE + RB150_NAND_SIZE-1,
107 .flags = IORESOURCE_MEM,
108 },
109 };
110
111 static struct resource rb153_cf_resources[] = {
112 {
113 .name = "cf_membase",
114 .start = ADM5120_EXTIO1_BASE,
115 .end = ADM5120_EXTIO1_BASE + ADM5120_EXTIO1_SIZE-1 ,
116 .flags = IORESOURCE_MEM
117 }, {
118 .name = "cf_irq",
119 .start = ADM5120_IRQ_GPIO4,
120 .end = ADM5120_IRQ_GPIO4,
121 .flags = IORESOURCE_IRQ
122 }
123 };
124
125 static struct platform_device rb153_cf_device = {
126 .name = "pata-rb153-cf",
127 .id = -1,
128 .resource = rb153_cf_resources,
129 .num_resources = ARRAY_SIZE(rb153_cf_resources),
130 };
131
132 static struct platform_device *rb153_devices[] __initdata = {
133 &adm5120_flash0_device,
134 &adm5120_nand_device,
135 &rb153_cf_device,
136 };
137
138 #if 0
139 /*
140 * RB1xx boards have bad network performance with the default VLAN matrixes.
141 * Disable it while the ethernet driver gets fixed.
142 */
143 static unsigned char rb11x_vlans[6] __initdata = {
144 /* FIXME: untested */
145 0x41, 0x00, 0x00, 0x00, 0x00, 0x00
146 };
147
148 static unsigned char rb133_vlans[6] __initdata = {
149 /* FIXME: untested */
150 0x44, 0x42, 0x41, 0x00, 0x00, 0x00
151 };
152
153 static unsigned char rb133c_vlans[6] __initdata = {
154 /* FIXME: untested */
155 0x44, 0x00, 0x00, 0x00, 0x00, 0x00
156 };
157
158 static unsigned char rb15x_vlans[6] __initdata = {
159 /* FIXME: untested */
160 0x41, 0x42, 0x44, 0x48, 0x50, 0x00
161 };
162
163 static unsigned char rb192_vlans[6] __initdata = {
164 /* FIXME: untested */
165 0x41, 0x50, 0x48, 0x44, 0x42, 0x00
166 };
167 #else
168 static unsigned char rb_vlans[6] __initdata = {
169 0x7F, 0x00, 0x00, 0x00, 0x00, 0x00
170 };
171 #define rb11x_vlans rb_vlans
172 #define rb133_vlans rb_vlans
173 #define rb133c_vlans rb_vlans
174 #define rb15x_vlans rb_vlans
175 #define rb192_vlans rb_vlans
176 #endif
177
178 /*--------------------------------------------------------------------------*/
179
180 static int rb150_nand_ready(struct mtd_info *mtd)
181 {
182 return gpio_get_value(RB150_GPIO_NAND_READY);
183 }
184
185 static void rb150_nand_cmd_ctrl(struct mtd_info *mtd, int cmd,
186 unsigned int ctrl)
187 {
188 if (ctrl & NAND_CTRL_CHANGE) {
189 gpio_set_value(RB150_GPIO_NAND_CLE, (ctrl & NAND_CLE) ? 1 : 0);
190 gpio_set_value(RB150_GPIO_NAND_ALE, (ctrl & NAND_ALE) ? 1 : 0);
191 gpio_set_value(RB150_GPIO_NAND_NCE, (ctrl & NAND_NCE) ? 0 : 1);
192 }
193
194 udelay(RB150_NAND_DELAY);
195
196 if (cmd != NAND_CMD_NONE)
197 RB150_NAND_WRITE(cmd);
198 }
199
200 /*--------------------------------------------------------------------------*/
201
202 static void __init rb1xx_mac_setup(void)
203 {
204 int i, j;
205
206 if (!rb_hs.mac_base)
207 return;
208
209 for (i = 0; i < 6; i++) {
210 for (j = 0; j < 5; j++)
211 adm5120_eth_macs[i][j] = rb_hs.mac_base[j];
212 adm5120_eth_macs[i][5] = rb_hs.mac_base[5]+i;
213 }
214 }
215
216 static void __init rb1xx_flash_setup(void)
217 {
218 /* setup data for flash0 device */
219 adm5120_flash0_data.nr_parts = ARRAY_SIZE(rb1xx_nor_parts);
220 adm5120_flash0_data.parts = rb1xx_nor_parts;
221
222 /* setup data for NAND device */
223 adm5120_nand_data.chip.nr_chips = 1;
224 adm5120_nand_data.chip.nr_partitions = ARRAY_SIZE(rb1xx_nand_parts);
225 adm5120_nand_data.chip.partitions = rb1xx_nand_parts;
226 adm5120_nand_data.chip.ecclayout = &rb1xx_nand_ecclayout;
227 adm5120_nand_data.chip.chip_delay = RB1XX_NAND_CHIP_DELAY;
228 adm5120_nand_data.chip.options = NAND_NO_AUTOINCR;
229 }
230
231 static void __init rb1xx_setup(void)
232 {
233 /* enable NAND flash interface */
234 adm5120_nand_enable();
235
236 /* initialize NAND chip */
237 adm5120_nand_set_spn(1);
238 adm5120_nand_set_wpn(0);
239
240 rb1xx_flash_setup();
241 rb1xx_mac_setup();
242 }
243
244 static void __init rb150_setup(void)
245 {
246 /* setup GPIO pins for NAND flash chip */
247 gpio_request(RB150_GPIO_NAND_READY, "nand-ready");
248 gpio_direction_input(RB150_GPIO_NAND_READY);
249 gpio_request(RB150_GPIO_NAND_NCE, "nand-nce");
250 gpio_direction_output(RB150_GPIO_NAND_NCE, 1);
251 gpio_request(RB150_GPIO_NAND_CLE, "nand-cle");
252 gpio_direction_output(RB150_GPIO_NAND_CLE, 0);
253 gpio_request(RB150_GPIO_NAND_ALE, "nand-ale");
254 gpio_direction_output(RB150_GPIO_NAND_ALE, 0);
255
256 adm5120_nand_device.num_resources = ARRAY_SIZE(rb150_nand_resource);
257 adm5120_nand_device.resource = rb150_nand_resource;
258 adm5120_nand_data.ctrl.cmd_ctrl = rb150_nand_cmd_ctrl;
259 adm5120_nand_data.ctrl.dev_ready = rb150_nand_ready;
260
261 adm5120_flash0_data.window_size = 512*1024;
262
263 rb1xx_flash_setup();
264 rb1xx_mac_setup();
265 }
266
267 static void __init rb153_setup(void)
268 {
269 /* enable CSX1:INTX1 on GPIO[3:4] for the CF slot */
270 adm5120_gpio_csx1_enable();
271 /* enable the wait state pin GPIO[0] for external I/O control */
272 adm5120_gpio_ew_enable();
273
274 rb1xx_setup();
275 }
276
277 /*--------------------------------------------------------------------------*/
278
279 ADM5120_BOARD_START(RB_111, "Mikrotik RouterBOARD 111")
280 .board_setup = rb1xx_setup,
281 .eth_num_ports = 1,
282 .eth_vlans = rb11x_vlans,
283 .num_devices = ARRAY_SIZE(rb1xx_devices),
284 .devices = rb1xx_devices,
285 .pci_nr_irqs = ARRAY_SIZE(rb1xx_pci_irqs),
286 .pci_irq_map = rb1xx_pci_irqs,
287 ADM5120_BOARD_END
288
289 ADM5120_BOARD_START(RB_112, "Mikrotik RouterBOARD 112")
290 .board_setup = rb1xx_setup,
291 .eth_num_ports = 1,
292 .eth_vlans = rb11x_vlans,
293 .num_devices = ARRAY_SIZE(rb1xx_devices),
294 .devices = rb1xx_devices,
295 .pci_nr_irqs = ARRAY_SIZE(rb1xx_pci_irqs),
296 .pci_irq_map = rb1xx_pci_irqs,
297 ADM5120_BOARD_END
298
299 ADM5120_BOARD_START(RB_133, "Mikrotik RouterBOARD 133")
300 .board_setup = rb1xx_setup,
301 .eth_num_ports = 3,
302 .eth_vlans = rb133_vlans,
303 .num_devices = ARRAY_SIZE(rb1xx_devices),
304 .devices = rb1xx_devices,
305 .pci_nr_irqs = ARRAY_SIZE(rb1xx_pci_irqs),
306 .pci_irq_map = rb1xx_pci_irqs,
307 ADM5120_BOARD_END
308
309 ADM5120_BOARD_START(RB_133C, "Mikrotik RouterBOARD 133C")
310 .board_setup = rb1xx_setup,
311 .eth_num_ports = 1,
312 .eth_vlans = rb133c_vlans,
313 .num_devices = ARRAY_SIZE(rb1xx_devices),
314 .devices = rb1xx_devices,
315 .pci_nr_irqs = ARRAY_SIZE(rb1xx_pci_irqs),
316 .pci_irq_map = rb1xx_pci_irqs,
317 ADM5120_BOARD_END
318
319 ADM5120_BOARD_START(RB_150, "Mikrotik RouterBOARD 150")
320 .board_setup = rb150_setup,
321 .eth_num_ports = 5,
322 .eth_vlans = rb15x_vlans,
323 .num_devices = ARRAY_SIZE(rb1xx_devices),
324 .devices = rb1xx_devices,
325 ADM5120_BOARD_END
326
327 ADM5120_BOARD_START(RB_153, "Mikrotik RouterBOARD 153")
328 .board_setup = rb153_setup,
329 .eth_num_ports = 5,
330 .eth_vlans = rb15x_vlans,
331 .num_devices = ARRAY_SIZE(rb153_devices),
332 .devices = rb153_devices,
333 .pci_nr_irqs = ARRAY_SIZE(rb1xx_pci_irqs),
334 .pci_irq_map = rb1xx_pci_irqs,
335 ADM5120_BOARD_END
336
337 ADM5120_BOARD_START(RB_192, "Mikrotik RouterBOARD 192")
338 .board_setup = rb1xx_setup,
339 .eth_num_ports = 5,
340 .eth_vlans = rb192_vlans,
341 .num_devices = ARRAY_SIZE(rb1xx_devices),
342 .devices = rb1xx_devices,
343 .pci_nr_irqs = ARRAY_SIZE(rb1xx_pci_irqs),
344 .pci_irq_map = rb1xx_pci_irqs,
345 ADM5120_BOARD_END