Add preliminary support for the Routerboard 153 CF slot (#2550)
[openwrt/svn-archive/archive.git] / target / linux / adm5120 / files / arch / mips / adm5120 / boards / mikrotik.c
1 /*
2 * $Id$
3 *
4 * Mikrotik RouterBOARD 1xx series
5 *
6 * Copyright (C) 2007 OpenWrt.org
7 * Copyright (C) 2007 Gabor Juhos <juhosg at openwrt.org>
8 *
9 * NAND initialization code was based on a driver for Linux 2.6.19+ which
10 * was derived from the driver for Linux 2.4.xx published by Mikrotik for
11 * their RouterBoard 1xx and 5xx series boards.
12 * Copyright (C) 2007 David Goodenough <david.goodenough@linkchoose.co.uk>
13 * Copyright (C) 2007 Florian Fainelli <florian@openwrt.org>
14 * The original Mikrotik code seems not to have a license.
15 *
16 * This program is free software; you can redistribute it and/or
17 * modify it under the terms of the GNU General Public License
18 * as published by the Free Software Foundation; either version 2
19 * of the License, or (at your option) any later version.
20 *
21 * This program is distributed in the hope that it will be useful,
22 * but WITHOUT ANY WARRANTY; without even the implied warranty of
23 * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
24 * GNU General Public License for more details.
25 *
26 * You should have received a copy of the GNU General Public License
27 * along with this program; if not, write to the
28 * Free Software Foundation, Inc., 51 Franklin Street, Fifth Floor,
29 * Boston, MA 02110-1301, USA.
30 *
31 */
32
33 #include <linux/kernel.h>
34 #include <linux/init.h>
35 #include <linux/delay.h>
36
37 #include <asm/bootinfo.h>
38 #include <asm/gpio.h>
39
40 #include <adm5120_defs.h>
41 #include <adm5120_irq.h>
42 #include <adm5120_nand.h>
43 #include <adm5120_board.h>
44 #include <adm5120_platform.h>
45 #include <adm5120_cf.h>
46
47 #define RB1XX_NAND_CHIP_DELAY 25
48
49 #define RB150_NAND_BASE 0x1FC80000
50 #define RB150_NAND_SIZE 1
51
52 #define RB150_GPIO_NAND_READY ADM5120_GPIO_PIN0
53 #define RB150_GPIO_NAND_NCE ADM5120_GPIO_PIN1
54 #define RB150_GPIO_NAND_CLE ADM5120_GPIO_P2L2
55 #define RB150_GPIO_NAND_ALE ADM5120_GPIO_P3L2
56
57 #define RB150_NAND_DELAY 100
58
59 #define RB150_NAND_WRITE(v) \
60 writeb((v), (void __iomem *)KSEG1ADDR(RB150_NAND_BASE))
61
62 /*--------------------------------------------------------------------------*/
63
64 static struct adm5120_pci_irq rb1xx_pci_irqs[] __initdata = {
65 PCIIRQ(1, 0, 1, ADM5120_IRQ_PCI0),
66 PCIIRQ(2, 0, 1, ADM5120_IRQ_PCI1),
67 PCIIRQ(3, 0, 1, ADM5120_IRQ_PCI2)
68 };
69
70 static struct mtd_partition rb1xx_nor_parts[] = {
71 {
72 .name = "booter",
73 .offset = 0,
74 .size = 64*1024,
75 .mask_flags = MTD_WRITEABLE,
76 } , {
77 .name = "firmware",
78 .offset = MTDPART_OFS_APPEND,
79 .size = MTDPART_SIZ_FULL,
80 }
81 };
82
83 static struct mtd_partition rb1xx_nand_parts[] = {
84 {
85 .name = "kernel",
86 .offset = 0,
87 .size = 4 * 1024 * 1024,
88 } , {
89 .name = "rootfs",
90 .offset = MTDPART_OFS_NXTBLK,
91 .size = MTDPART_SIZ_FULL
92 }
93 };
94
95 static struct platform_device *rb1xx_devices[] __initdata = {
96 &adm5120_flash0_device,
97 &adm5120_nand_device,
98 };
99
100 /*
101 * We need to use the OLD Yaffs-1 OOB layout, otherwise the RB bootloader
102 * will not be able to find the kernel that we load. So set the oobinfo
103 * when creating the partitions
104 */
105 static struct nand_ecclayout rb1xx_nand_ecclayout = {
106 .eccbytes = 6,
107 .eccpos = { 8, 9, 10, 13, 14, 15 },
108 .oobavail = 9,
109 .oobfree = { { 0, 4 }, { 6, 2 }, { 11, 2 }, { 4, 1 } }
110 };
111
112 static struct resource rb150_nand_resource[] = {
113 [0] = {
114 .start = RB150_NAND_BASE,
115 .end = RB150_NAND_BASE + RB150_NAND_SIZE-1,
116 .flags = IORESOURCE_MEM,
117 },
118 };
119
120 #if 0
121 /*
122 * RB1xx boards have bad network performance with the default VLAN matrixes.
123 * Disable it while the ethernet driver gets fixed.
124 */
125 static unsigned char rb11x_vlans[6] __initdata = {
126 /* FIXME: untested */
127 0x41, 0x00, 0x00, 0x00, 0x00, 0x00
128 };
129
130 static unsigned char rb133_vlans[6] __initdata = {
131 /* FIXME: untested */
132 0x44, 0x42, 0x41, 0x00, 0x00, 0x00
133 };
134
135 static unsigned char rb133c_vlans[6] __initdata = {
136 /* FIXME: untested */
137 0x44, 0x00, 0x00, 0x00, 0x00, 0x00
138 };
139
140 static unsigned char rb15x_vlans[6] __initdata = {
141 /* FIXME: untested */
142 0x41, 0x42, 0x44, 0x48, 0x50, 0x00
143
144 static unsigned char rb192_vlans[6] __initdata = {
145 /* FIXME: untested */
146 0x41, 0x50, 0x48, 0x44, 0x42, 0x00
147 };
148 #else
149 static unsigned char rb_vlans[6] __initdata = {
150 0x7F, 0x00, 0x00, 0x00, 0x00, 0x00
151 };
152 #define rb11x_vlans rb_vlans
153 #define rb133_vlans rb_vlans
154 #define rb133c_vlans rb_vlans
155 #define rb15x_vlans rb_vlans
156 #define rb192_vlans rb_vlans
157 #endif
158
159 /*--------------------------------------------------------------------------*/
160
161 static int rb150_nand_ready(struct mtd_info *mtd)
162 {
163 return gpio_get_value(RB150_GPIO_NAND_READY);
164 }
165
166 static void rb150_nand_cmd_ctrl(struct mtd_info *mtd, int cmd,
167 unsigned int ctrl)
168 {
169 if (ctrl & NAND_CTRL_CHANGE) {
170 gpio_set_value(RB150_GPIO_NAND_CLE, (ctrl & NAND_CLE) ? 1 : 0);
171 gpio_set_value(RB150_GPIO_NAND_ALE, (ctrl & NAND_ALE) ? 1 : 0);
172 gpio_set_value(RB150_GPIO_NAND_NCE, (ctrl & NAND_NCE) ? 0 : 1);
173 }
174
175 udelay(RB150_NAND_DELAY);
176
177 if (cmd != NAND_CMD_NONE)
178 RB150_NAND_WRITE(cmd);
179 }
180
181 /*--------------------------------------------------------------------------*/
182 static struct resource cf_slot0_res[] = {
183 {
184 .name = "cf_membase",
185 .flags = IORESOURCE_MEM
186 }, {
187 .name = "cf_irq",
188 .start = INTC_IRQ_GPIO4, /* 5 */
189 .end = INTC_IRQ_GPIO4,
190 .flags = IORESOURCE_IRQ
191 }
192 };
193
194 static struct cf_device cf_slot0_data = {
195 .gpio_pin = 4
196 };
197
198 static struct platform_device cf_slot0 = {
199 .id = 0,
200 .name = "rb153-cf",
201 .dev.platform_data = &cf_slot0_data,
202 .resource = cf_slot0_res,
203 .num_resources = ARRAY_SIZE(cf_slot0_res),
204 };
205
206 static struct platform_device *rb153_devices[] __initdata = {
207 &adm5120_flash0_device,
208 &adm5120_nand_device,
209 &cf_slot0,
210 };
211
212 static void __init rb1xx_mac_setup(void)
213 {
214 /* TODO */
215 }
216
217 static void __init rb1xx_flash_setup(void)
218 {
219 /* setup data for flash0 device */
220 adm5120_flash0_data.nr_parts = ARRAY_SIZE(rb1xx_nor_parts);
221 adm5120_flash0_data.parts = rb1xx_nor_parts;
222
223 /* setup data for NAND device */
224 adm5120_nand_data.chip.nr_chips = 1;
225 adm5120_nand_data.chip.nr_partitions = ARRAY_SIZE(rb1xx_nand_parts);
226 adm5120_nand_data.chip.partitions = rb1xx_nand_parts;
227 adm5120_nand_data.chip.ecclayout = &rb1xx_nand_ecclayout;
228 adm5120_nand_data.chip.chip_delay = RB1XX_NAND_CHIP_DELAY;
229 adm5120_nand_data.chip.options = NAND_NO_AUTOINCR;
230 }
231
232 static void __init rb1xx_setup(void)
233 {
234 /* enable NAND flash interface */
235 adm5120_nand_enable();
236
237 /* initialize NAND chip */
238 adm5120_nand_set_spn(1);
239 adm5120_nand_set_wpn(0);
240
241 rb1xx_flash_setup();
242 rb1xx_mac_setup();
243 }
244
245 static void __init rb150_setup(void)
246 {
247 /* setup GPIO pins for NAND flash chip */
248 gpio_request(RB150_GPIO_NAND_READY, "nand-ready");
249 gpio_direction_input(RB150_GPIO_NAND_READY);
250 gpio_request(RB150_GPIO_NAND_NCE, "nand-nce");
251 gpio_direction_output(RB150_GPIO_NAND_NCE, 1);
252 gpio_request(RB150_GPIO_NAND_CLE, "nand-cle");
253 gpio_direction_output(RB150_GPIO_NAND_CLE, 0);
254 gpio_request(RB150_GPIO_NAND_ALE, "nand-ale");
255 gpio_direction_output(RB150_GPIO_NAND_ALE, 0);
256
257 adm5120_nand_device.num_resources = ARRAY_SIZE(rb150_nand_resource);
258 adm5120_nand_device.resource = rb150_nand_resource;
259 adm5120_nand_data.ctrl.cmd_ctrl = rb150_nand_cmd_ctrl;
260 adm5120_nand_data.ctrl.dev_ready = rb150_nand_ready;
261
262 rb1xx_flash_setup();
263 rb1xx_mac_setup();
264 }
265
266 /*--------------------------------------------------------------------------*/
267
268 static struct adm5120_board rb111_board __initdata = {
269 .mach_type = MACH_ADM5120_RB_111,
270 .name = "Mikrotik RouterBOARD 111",
271 .board_setup = rb1xx_setup,
272 .eth_num_ports = 1,
273 .eth_vlans = rb11x_vlans,
274 .num_devices = ARRAY_SIZE(rb1xx_devices),
275 .devices = rb1xx_devices,
276 .pci_nr_irqs = ARRAY_SIZE(rb1xx_pci_irqs),
277 .pci_irq_map = rb1xx_pci_irqs,
278 };
279
280 static struct adm5120_board rb112_board __initdata = {
281 .mach_type = MACH_ADM5120_RB_112,
282 .name = "Mikrotik RouterBOARD 112",
283 .board_setup = rb1xx_setup,
284 .eth_num_ports = 1,
285 .eth_vlans = rb11x_vlans,
286 .num_devices = ARRAY_SIZE(rb1xx_devices),
287 .devices = rb1xx_devices,
288 .pci_nr_irqs = ARRAY_SIZE(rb1xx_pci_irqs),
289 .pci_irq_map = rb1xx_pci_irqs,
290 };
291
292 static struct adm5120_board rb133_board __initdata = {
293 .mach_type = MACH_ADM5120_RB_133,
294 .name = "Mikrotik RouterBOARD 133",
295 .board_setup = rb1xx_setup,
296 .eth_num_ports = 3,
297 .eth_vlans = rb133_vlans,
298 .num_devices = ARRAY_SIZE(rb1xx_devices),
299 .devices = rb1xx_devices,
300 .pci_nr_irqs = ARRAY_SIZE(rb1xx_pci_irqs),
301 .pci_irq_map = rb1xx_pci_irqs,
302 };
303
304 static struct adm5120_board rb133c_board __initdata = {
305 .mach_type = MACH_ADM5120_RB_133C,
306 .name = "Mikrotik RouterBOARD 133C",
307 .board_setup = rb1xx_setup,
308 .eth_num_ports = 1,
309 .eth_vlans = rb133c_vlans,
310 .num_devices = ARRAY_SIZE(rb1xx_devices),
311 .devices = rb1xx_devices,
312 .pci_nr_irqs = ARRAY_SIZE(rb1xx_pci_irqs),
313 .pci_irq_map = rb1xx_pci_irqs,
314 };
315
316 static struct adm5120_board rb150_board __initdata = {
317 .mach_type = MACH_ADM5120_RB_150,
318 .name = "Mikrotik RouterBOARD 150",
319 .board_setup = rb150_setup,
320 .eth_num_ports = 5,
321 .eth_vlans = rb15x_vlans,
322 .num_devices = ARRAY_SIZE(rb1xx_devices),
323 .devices = rb1xx_devices,
324 };
325
326 static struct adm5120_board rb153_board __initdata = {
327 .mach_type = MACH_ADM5120_RB_153,
328 .name = "Mikrotik RouterBOARD 153",
329 .board_setup = rb1xx_setup,
330 .eth_num_ports = 5,
331 .eth_vlans = rb15x_vlans,
332 .num_devices = ARRAY_SIZE(rb153_devices),
333 .devices = rb153_devices,
334 .pci_nr_irqs = ARRAY_SIZE(rb1xx_pci_irqs),
335 .pci_irq_map = rb1xx_pci_irqs,
336 };
337
338 static struct adm5120_board rb192_board __initdata = {
339 .mach_type = MACH_ADM5120_RB_192,
340 .name = "Mikrotik RouterBOARD 192",
341 .board_setup = rb1xx_setup,
342 .eth_num_ports = 5,
343 .eth_vlans = rb192_vlans,
344 .num_devices = ARRAY_SIZE(rb1xx_devices),
345 .devices = rb1xx_devices,
346 .pci_nr_irqs = ARRAY_SIZE(rb1xx_pci_irqs),
347 .pci_irq_map = rb1xx_pci_irqs,
348 };
349
350 static int __init register_boards(void)
351 {
352 adm5120_board_register(&rb111_board);
353 adm5120_board_register(&rb112_board);
354 adm5120_board_register(&rb133_board);
355 adm5120_board_register(&rb133c_board);
356 adm5120_board_register(&rb150_board);
357 adm5120_board_register(&rb153_board);
358 adm5120_board_register(&rb192_board);
359 return 0;
360 }
361
362 pure_initcall(register_boards);