[adm5120] USB driver fixes
[openwrt/svn-archive/archive.git] / target / linux / adm5120 / files / drivers / usb / host / adm5120-hub.c
1 /*
2 * OHCI HCD (Host Controller Driver) for USB.
3 *
4 * (C) Copyright 1999 Roman Weissgaerber <weissg@vienna.at>
5 * (C) Copyright 2000-2004 David Brownell <dbrownell@users.sourceforge.net>
6 *
7 * This file is licenced under GPL
8 */
9
10 /*-------------------------------------------------------------------------*/
11
12 /*
13 * OHCI Root Hub ... the nonsharable stuff
14 */
15
16 #define dbg_port(hc,label,num,value) \
17 admhc_dbg(hc, \
18 "%s port%d " \
19 "= 0x%08x%s%s%s%s%s%s%s%s%s%s%s%s\n", \
20 label, num, temp, \
21 (temp & ADMHC_PS_PRSC) ? " PRSC" : "", \
22 (temp & ADMHC_PS_OCIC) ? " OCIC" : "", \
23 (temp & ADMHC_PS_PSSC) ? " PSSC" : "", \
24 (temp & ADMHC_PS_PESC) ? " PESC" : "", \
25 (temp & ADMHC_PS_CSC) ? " CSC" : "", \
26 \
27 (temp & ADMHC_PS_LSDA) ? " LSDA" : "", \
28 (temp & ADMHC_PS_PPS) ? " PPS" : "", \
29 (temp & ADMHC_PS_PRS) ? " PRS" : "", \
30 (temp & ADMHC_PS_POCI) ? " POCI" : "", \
31 (temp & ADMHC_PS_PSS) ? " PSS" : "", \
32 \
33 (temp & ADMHC_PS_PES) ? " PES" : "", \
34 (temp & ADMHC_PS_CCS) ? " CCS" : "" \
35 );
36
37 #define dbg_port_write(hc,label,num,value) \
38 admhc_dbg(hc, \
39 "%s port%d " \
40 "= 0x%08x%s%s%s%s%s%s%s%s%s%s%s%s\n", \
41 label, num, temp, \
42 (temp & ADMHC_PS_PRSC) ? " PRSC" : "", \
43 (temp & ADMHC_PS_OCIC) ? " OCIC" : "", \
44 (temp & ADMHC_PS_PSSC) ? " PSSC" : "", \
45 (temp & ADMHC_PS_PESC) ? " PESC" : "", \
46 (temp & ADMHC_PS_CSC) ? " CSC" : "", \
47 \
48 (temp & ADMHC_PS_CPP) ? " CPP" : "", \
49 (temp & ADMHC_PS_SPP) ? " SPP" : "", \
50 (temp & ADMHC_PS_SPR) ? " SPR" : "", \
51 (temp & ADMHC_PS_CPS) ? " CPS" : "", \
52 (temp & ADMHC_PS_SPS) ? " SPS" : "", \
53 \
54 (temp & ADMHC_PS_SPE) ? " SPE" : "", \
55 (temp & ADMHC_PS_CPE) ? " CPE" : "" \
56 );
57
58 /*-------------------------------------------------------------------------*/
59
60 /* hcd->hub_irq_enable() */
61 static void admhc_hub_irq_enable(struct usb_hcd *hcd)
62 {
63 struct admhcd *ahcd = hcd_to_admhcd(hcd);
64
65 spin_lock_irq(&ahcd->lock);
66 if (!ahcd->autostop)
67 del_timer(&hcd->rh_timer); /* Prevent next poll */
68 admhc_intr_enable(ahcd, ADMHC_INTR_INSM);
69 spin_unlock_irq(&ahcd->lock);
70 }
71
72 /*-------------------------------------------------------------------------*/
73
74 /* build "status change" packet (one or two bytes) from HC registers */
75
76 static int
77 admhc_hub_status_data(struct usb_hcd *hcd, char *buf)
78 {
79 struct admhcd *ahcd = hcd_to_admhcd(hcd);
80 int i, changed = 0, length = 1;
81 int any_connected = 0;
82 unsigned long flags;
83 u32 status;
84
85 spin_lock_irqsave(&ahcd->lock, flags);
86 if (!test_bit(HCD_FLAG_HW_ACCESSIBLE, &hcd->flags))
87 goto done;
88
89 /* init status */
90 status = admhc_get_rhdesc(ahcd);
91 if (status & (ADMHC_RH_LPSC | ADMHC_RH_OCIC))
92 buf [0] = changed = 1;
93 else
94 buf [0] = 0;
95 if (ahcd->num_ports > 7) {
96 buf [1] = 0;
97 length++;
98 }
99
100 /* look at each port */
101 for (i = 0; i < ahcd->num_ports; i++) {
102 status = admhc_get_portstatus(ahcd, i);
103
104 /* can't autostop if ports are connected */
105 any_connected |= (status & ADMHC_PS_CCS);
106
107 if (status & (ADMHC_PS_CSC | ADMHC_PS_PESC | ADMHC_PS_PSSC
108 | ADMHC_PS_OCIC | ADMHC_PS_PRSC)) {
109 changed = 1;
110 if (i < 7)
111 buf [0] |= 1 << (i + 1);
112 else
113 buf [1] |= 1 << (i - 7);
114 }
115 }
116
117 hcd->poll_rh = admhc_root_hub_state_changes(ahcd, changed,
118 any_connected);
119
120 done:
121 spin_unlock_irqrestore(&ahcd->lock, flags);
122
123 return changed ? length : 0;
124 }
125
126 /*-------------------------------------------------------------------------*/
127
128 static void admhc_hub_descriptor(struct admhcd *ahcd,
129 struct usb_hub_descriptor *desc)
130 {
131 u32 rh = admhc_get_rhdesc(ahcd);
132 u16 temp;
133
134 desc->bDescriptorType = USB_DT_HUB; /* Hub-descriptor */
135 desc->bPwrOn2PwrGood = ADMHC_POTPGT/2; /* use default value */
136 desc->bHubContrCurrent = 0x00; /* 0mA */
137
138 desc->bNbrPorts = ahcd->num_ports;
139 temp = 1 + (ahcd->num_ports / 8);
140 desc->bDescLength = USB_DT_HUB_NONVAR_SIZE + 2 * temp;
141
142 /* FIXME */
143 temp = 0;
144 if (rh & ADMHC_RH_NPS) /* no power switching? */
145 temp |= 0x0002;
146 if (rh & ADMHC_RH_PSM) /* per-port power switching? */
147 temp |= 0x0001;
148 if (rh & ADMHC_RH_NOCP) /* no overcurrent reporting? */
149 temp |= 0x0010;
150 else if (rh & ADMHC_RH_OCPM) /* per-port overcurrent reporting? */
151 temp |= 0x0008;
152 desc->wHubCharacteristics = (__force __u16)cpu_to_hc16(ahcd, temp);
153
154 /* two bitmaps: ports removable, and usb 1.0 legacy PortPwrCtrlMask */
155 desc->bitmap [0] = 0;
156 desc->bitmap [0] = ~0;
157 }
158
159 /*-------------------------------------------------------------------------*/
160
161 #ifdef CONFIG_USB_OTG
162
163 static int admhc_start_port_reset(struct usb_hcd *hcd, unsigned port)
164 {
165 struct admhcd *ahcd = hcd_to_admhcd(hcd);
166 u32 status;
167
168 if (!port)
169 return -EINVAL;
170 port--;
171
172 /* start port reset before HNP protocol times out */
173 status = admhc_readl(ahcd, &ahcd->regs->portstatus[port]);
174 if (!(status & ADMHC_PS_CCS))
175 return -ENODEV;
176
177 /* khubd will finish the reset later */
178 admhc_writel(ahcd, ADMHC_PS_PRS, &ahcd->regs->portstatus[port]);
179 return 0;
180 }
181
182 static void start_hnp(struct admhcd *ahcd);
183
184 #else
185
186 #define admhc_start_port_reset NULL
187
188 #endif
189
190 /*-------------------------------------------------------------------------*/
191
192
193 /* See usb 7.1.7.5: root hubs must issue at least 50 msec reset signaling,
194 * not necessarily continuous ... to guard against resume signaling.
195 * The short timeout is safe for non-root hubs, and is backward-compatible
196 * with earlier Linux hosts.
197 */
198 #ifdef CONFIG_USB_SUSPEND
199 #define PORT_RESET_MSEC 50
200 #else
201 #define PORT_RESET_MSEC 10
202 #endif
203
204 /* this timer value might be vendor-specific ... */
205 #define PORT_RESET_HW_MSEC 10
206
207 /* wrap-aware logic morphed from <linux/jiffies.h> */
208 #define tick_before(t1,t2) ((s16)(((s16)(t1))-((s16)(t2))) < 0)
209
210 /* called from some task, normally khubd */
211 static inline int root_port_reset(struct admhcd *ahcd, unsigned port)
212 {
213 #if 0
214 /* FIXME: revert to this when frame numbers are updated */
215 __hc32 __iomem *portstat = &ahcd->regs->portstatus[port];
216 u32 temp;
217 u16 now = admhc_readl(ahcd, &ahcd->regs->fmnumber);
218 u16 reset_done = now + PORT_RESET_MSEC;
219
220 /* build a "continuous enough" reset signal, with up to
221 * 3msec gap between pulses. scheduler HZ==100 must work;
222 * this might need to be deadline-scheduled.
223 */
224 do {
225 /* spin until any current reset finishes */
226 for (;;) {
227 temp = admhc_readl(ahcd, portstat);
228 /* handle e.g. CardBus eject */
229 if (temp == ~(u32)0)
230 return -ESHUTDOWN;
231 if (!(temp & ADMHC_PS_PRS))
232 break;
233 udelay (500);
234 }
235
236 if (!(temp & ADMHC_PS_CCS))
237 break;
238 if (temp & ADMHC_PS_PRSC)
239 admhc_writel(ahcd, ADMHC_PS_PRSC, portstat);
240
241 /* start the next reset, sleep till it's probably done */
242 admhc_writel(ahcd, ADMHC_PS_PRS, portstat);
243 msleep(PORT_RESET_HW_MSEC);
244 now = admhc_readl(ahcd, &ahcd->regs->fmnumber);
245 } while (tick_before(now, reset_done));
246 /* caller synchronizes using PRSC */
247 #else
248 __hc32 __iomem *portstat = &ahcd->regs->portstatus[port];
249 u32 temp;
250 unsigned long reset_done = jiffies + msecs_to_jiffies(PORT_RESET_MSEC);
251
252 /* build a "continuous enough" reset signal, with up to
253 * 3msec gap between pulses. scheduler HZ==100 must work;
254 * this might need to be deadline-scheduled.
255 */
256 do {
257 /* spin until any current reset finishes */
258 for (;;) {
259 temp = admhc_readl(ahcd, portstat);
260 /* handle e.g. CardBus eject */
261 if (temp == ~(u32)0)
262 return -ESHUTDOWN;
263 if (!(temp & ADMHC_PS_PRS))
264 break;
265 udelay (500);
266 }
267
268 if (!(temp & ADMHC_PS_CCS))
269 break;
270
271 if (temp & ADMHC_PS_PRSC)
272 admhc_writel(ahcd, ADMHC_PS_PRSC, portstat);
273
274 /* start the next reset, sleep till it's probably done */
275 admhc_writel(ahcd, ADMHC_PS_PRS, portstat);
276 msleep(PORT_RESET_HW_MSEC);
277 } while (time_before(jiffies, reset_done));
278
279 admhc_writel(ahcd, ADMHC_PS_SPE | ADMHC_PS_CSC, portstat);
280 msleep(100);
281 #endif
282 return 0;
283 }
284
285 static int admhc_hub_control (
286 struct usb_hcd *hcd,
287 u16 typeReq,
288 u16 wValue,
289 u16 wIndex,
290 char *buf,
291 u16 wLength
292 ) {
293 struct admhcd *ahcd = hcd_to_admhcd(hcd);
294 int ports = hcd_to_bus (hcd)->root_hub->maxchild;
295 u32 temp;
296 int ret = 0;
297
298 if (unlikely(!test_bit(HCD_FLAG_HW_ACCESSIBLE, &hcd->flags)))
299 return -ESHUTDOWN;
300
301 switch (typeReq) {
302 case ClearHubFeature:
303 switch (wValue) {
304 case C_HUB_OVER_CURRENT:
305 #if 0 /* FIXME */
306 admhc_writel(ahcd, ADMHC_RH_OCIC,
307 &ahcd->regs->roothub.status);
308 #endif
309 case C_HUB_LOCAL_POWER:
310 break;
311 default:
312 goto error;
313 }
314 break;
315 case ClearPortFeature:
316 if (!wIndex || wIndex > ports)
317 goto error;
318 wIndex--;
319
320 switch (wValue) {
321 case USB_PORT_FEAT_ENABLE:
322 temp = ADMHC_PS_CPE;
323 break;
324 case USB_PORT_FEAT_SUSPEND:
325 temp = ADMHC_PS_CPS;
326 break;
327 case USB_PORT_FEAT_POWER:
328 temp = ADMHC_PS_CPP;
329 break;
330 case USB_PORT_FEAT_C_CONNECTION:
331 temp = ADMHC_PS_CSC;
332 break;
333 case USB_PORT_FEAT_C_ENABLE:
334 temp = ADMHC_PS_PESC;
335 break;
336 case USB_PORT_FEAT_C_SUSPEND:
337 temp = ADMHC_PS_PSSC;
338 break;
339 case USB_PORT_FEAT_C_OVER_CURRENT:
340 temp = ADMHC_PS_OCIC;
341 break;
342 case USB_PORT_FEAT_C_RESET:
343 temp = ADMHC_PS_PRSC;
344 break;
345 default:
346 goto error;
347 }
348 admhc_writel(ahcd, temp, &ahcd->regs->portstatus[wIndex]);
349 break;
350 case GetHubDescriptor:
351 admhc_hub_descriptor(ahcd, (struct usb_hub_descriptor *) buf);
352 break;
353 case GetHubStatus:
354 temp = admhc_get_rhdesc(ahcd);
355 temp &= ~(ADMHC_RH_CRWE | ADMHC_RH_DRWE);
356 put_unaligned(cpu_to_le32 (temp), (__le32 *) buf);
357 break;
358 case GetPortStatus:
359 if (!wIndex || wIndex > ports)
360 goto error;
361 wIndex--;
362 temp = admhc_get_portstatus(ahcd, wIndex);
363 put_unaligned(cpu_to_le32 (temp), (__le32 *) buf);
364
365 dbg_port(ahcd, "GetPortStatus", wIndex, temp);
366 break;
367 case SetHubFeature:
368 switch (wValue) {
369 case C_HUB_OVER_CURRENT:
370 // FIXME: this can be cleared, yes?
371 case C_HUB_LOCAL_POWER:
372 break;
373 default:
374 goto error;
375 }
376 break;
377 case SetPortFeature:
378 if (!wIndex || wIndex > ports)
379 goto error;
380 wIndex--;
381
382 switch (wValue) {
383 case USB_PORT_FEAT_ENABLE:
384 admhc_writel(ahcd, ADMHC_PS_SPE,
385 &ahcd->regs->portstatus[wIndex]);
386 break;
387 case USB_PORT_FEAT_SUSPEND:
388 #ifdef CONFIG_USB_OTG
389 if (hcd->self.otg_port == (wIndex + 1)
390 && hcd->self.b_hnp_enable)
391 start_hnp(ahcd);
392 else
393 #endif
394 admhc_writel(ahcd, ADMHC_PS_SPS,
395 &ahcd->regs->portstatus[wIndex]);
396 break;
397 case USB_PORT_FEAT_POWER:
398 admhc_writel(ahcd, ADMHC_PS_SPP,
399 &ahcd->regs->portstatus[wIndex]);
400 break;
401 case USB_PORT_FEAT_RESET:
402 ret = root_port_reset(ahcd, wIndex);
403 break;
404 default:
405 goto error;
406 }
407 break;
408
409 default:
410 error:
411 /* "protocol stall" on error */
412 ret = -EPIPE;
413 }
414 return ret;
415 }
416