[adm5120] remove 'svn:executable' property from adm5120_uart.h (closes #3086)
[openwrt/svn-archive/archive.git] / target / linux / adm5120 / files / include / asm-mips / mach-adm5120 / adm5120_uart.h
1 /*
2 * ADM5120 UART definitions
3 *
4 * This header file defines the hardware registers of the ADM5120 SoC
5 * built-in UARTs.
6 *
7 * Copyright (C) 2007 OpenWrt.org
8 * Copyright (C) 2007 Gabor Juhos <juhosg at openwrt.org>
9 *
10 * This program is free software; you can redistribute it and/or
11 * modify it under the terms of the GNU General Public License
12 * as published by the Free Software Foundation; either version 2
13 * of the License, or (at your option) any later version.
14 *
15 * This program is distributed in the hope that it will be useful,
16 * but WITHOUT ANY WARRANTY; without even the implied warranty of
17 * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
18 * GNU General Public License for more details.
19 *
20 * You should have received a copy of the GNU General Public License
21 * along with this program; if not, write to the
22 * Free Software Foundation, Inc., 51 Franklin Street, Fifth Floor,
23 * Boston, MA 02110-1301, USA.
24 */
25
26 #ifndef _ADM5120_UART_H_
27 #define _ADM5120_UART_H_
28
29 #define UART_BAUDDIV(clk, baud) ((clk/(16 * (baud)))-1)
30
31 #define UART_REG_DATA 0x00
32 #define UART_REG_RSR 0x04
33 #define UART_REG_ECR UART_REG_RSR
34 #define UART_REG_LCRH 0x08
35 #define UART_REG_LCRM 0x0C
36 #define UART_REG_LCRL 0x10
37 #define UART_REG_CTRL 0x14
38 #define UART_REG_FLAG 0x18
39
40 /* Receive Status Register bits */
41 #define UART_RSR_FE ( 1 << 0 )
42 #define UART_RSR_PE ( 1 << 1 )
43 #define UART_RSR_BE ( 1 << 2 )
44 #define UART_RSR_OE ( 1 << 3 )
45 #define UART_RSR_ERR ( UART_RSR_FE | UART_RSR_PE | UART_RSR_BE )
46
47 #define UART_ECR_ALL 0xFF
48
49 /* Line Control High register bits */
50 #define UART_LCRH_BRK ( 1 << 0 ) /* send break */
51 #define UART_LCRH_PEN ( 1 << 1 ) /* parity enable */
52 #define UART_LCRH_EPS ( 1 << 2 ) /* even parity select */
53 #define UART_LCRH_STP1 ( 0 << 3 ) /* one stop bits select */
54 #define UART_LCRH_STP2 ( 1 << 3 ) /* two stop bits select */
55 #define UART_LCRH_FEN ( 1 << 4 ) /* FIFO enable */
56
57 #define UART_LCRH_WLEN5 ( 0 << 5 )
58 #define UART_LCRH_WLEN6 ( 1 << 5 )
59 #define UART_LCRH_WLEN7 ( 2 << 5 )
60 #define UART_LCRH_WLEN8 ( 3 << 5 )
61
62 /* Control register bits */
63 #define UART_CTRL_EN ( 1 << 0 )
64
65 /* Flag register bits */
66 #define UART_FLAG_CTS ( 1 << 0 )
67 #define UART_FLAG_DSR ( 1 << 1 )
68 #define UART_FLAG_DCD ( 1 << 2 )
69 #define UART_FLAG_BUSY ( 1 << 3 )
70 #define UART_FLAG_RXFE ( 1 << 4 )
71 #define UART_FLAG_TXFF ( 1 << 5 )
72 #define UART_FLAG_RXFF ( 1 << 6 )
73 #define UART_FLAG_TXFE ( 1 << 7 )
74
75 #endif /* _ADM5120_UART_H_ */