target/linux/adm5120/patches-2.6.30/202-pci_disable_common_quirks.patch

   1 --- a/drivers/pci/Kconfig
   2 +++ b/drivers/pci/Kconfig
   3 @@ -51,6 +51,12 @@ config PCI_STUB
   4
   5           When in doubt, say N.
   6
   7 +config PCI_DISABLE_COMMON_QUIRKS
   8 +       bool "PCI disable common quirks"
   9 +       depends on PCI
  10 +       help
  11 +         If you don't know what to do here, say N.
  12 +
  13  config HT_IRQ
  14         bool "Interrupts on hypertransport devices"
  15         default y
  16 --- a/drivers/pci/quirks.c
  17 +++ b/drivers/pci/quirks.c
  18 @@ -98,6 +98,7 @@ static void __devinit quirk_resource_ali
  19  }
  20  DECLARE_PCI_FIXUP_HEADER(PCI_ANY_ID, PCI_ANY_ID, quirk_resource_alignment);
  21
  22 +#ifndef CONFIG_PCI_DISABLE_COMMON_QUIRKS
  23  /* The Mellanox Tavor device gives false positive parity errors
  24   * Mark this device with a broken_parity_status, to allow
  25   * PCI scanning code to "skip" this now blacklisted device.
  26 @@ -132,11 +133,11 @@ DECLARE_PCI_FIXUP_RESUME(PCI_VENDOR_ID_I
  27
  28  /*  The VIA VP2/VP3/MVP3 seem to have some 'features'. There may be a workaround
  29      but VIA don't answer queries. If you happen to have good contacts at VIA
  30 -    ask them for me please -- Alan
  31 -
  32 -    This appears to be BIOS not version dependent. So presumably there is a
  33 +    ask them for me please -- Alan
  34 +
  35 +    This appears to be BIOS not version dependent. So presumably there is a
  36      chipset level fix */
  37 -
  38 +
  39  static void __devinit quirk_isa_dma_hangs(struct pci_dev *dev)
  40  {
  41         if (!isa_dma_bridge_buggy) {
  42 @@ -204,7 +205,7 @@ DECLARE_PCI_FIXUP_FINAL(PCI_VENDOR_ID_IN
  43   *      the info on which Mr Breese based his work.
  44   *
  45   *     Updated based on further information from the site and also on
  46 - *     information provided by VIA
  47 + *     information provided by VIA
  48   */
  49  static void quirk_vialatency(struct pci_dev *dev)
  50  {
  51 @@ -212,7 +213,7 @@ static void quirk_vialatency(struct pci_
  52         u8 busarb;
  53         /* Ok we have a potential problem chipset here. Now see if we have
  54            a buggy southbridge */
  55 -
  56 +
  57         p = pci_get_device(PCI_VENDOR_ID_VIA, PCI_DEVICE_ID_VIA_82C686, NULL);
  58         if (p!=NULL) {
  59                 /* 0x40 - 0x4f == 686B, 0x10 - 0x2f == 686A; thanks Dan Hollis */
  60 @@ -227,9 +228,9 @@ static void quirk_vialatency(struct pci_
  61                 if (p->revision < 0x10 || p->revision > 0x12)
  62                         goto exit;
  63         }
  64 -
  65 +
  66         /*
  67 -        *      Ok we have the problem. Now set the PCI master grant to
  68 +        *      Ok we have the problem. Now set the PCI master grant to
  69          *      occur every master grant. The apparent bug is that under high
  70          *      PCI load (quite common in Linux of course) you can get data
  71          *      loss when the CPU is held off the bus for 3 bus master requests
  72 @@ -242,7 +243,7 @@ static void quirk_vialatency(struct pci_
  73          */
  74
  75         pci_read_config_byte(dev, 0x76, &busarb);
  76 -       /* Set bit 4 and bi 5 of byte 76 to 0x01
  77 +       /* Set bit 4 and bi 5 of byte 76 to 0x01
  78            "Master priority rotation on every PCI master grant */
  79         busarb &= ~(1<<5);
  80         busarb |= (1<<4);
  81 @@ -285,7 +286,7 @@ DECLARE_PCI_FIXUP_FINAL(PCI_VENDOR_ID_VI
  82   *     that DMA to AGP space. Latency must be set to 0xA and triton
  83   *     workaround applied too
  84   *     [Info kindly provided by ALi]
  85 - */
  86 + */
  87  static void __init quirk_alimagik(struct pci_dev *dev)
  88  {
  89         if ((pci_pci_problems&PCIPCI_ALIMAGIK)==0) {
  90 @@ -361,7 +362,7 @@ static void __devinit quirk_io_region(st
  91                 pci_claim_resource(dev, nr);
  92                 dev_info(&dev->dev, "quirk: region %04x-%04x claimed by %s\n", region, region + size - 1, name);
  93         }
  94 -}
  95 +}
  96
  97  /*
  98   *     ATI Northbridge setups MCE the processor if you even
  99 @@ -418,7 +419,7 @@ static void piix4_io_quirk(struct pci_de
 100         /*
 101          * For now we only print it out. Eventually we'll want to
 102          * reserve it (at least if it's in the 0x1000+ range), but
 103 -        * let's get enough confirmation reports first.
 104 +        * let's get enough confirmation reports first.
 105          */
 106         base &= -size;
 107         dev_info(&dev->dev, "%s PIO at %04x-%04x\n", name, base, base + size - 1);
 108 @@ -443,7 +444,7 @@ static void piix4_mem_quirk(struct pci_d
 109         }
 110         /*
 111          * For now we only print it out. Eventually we'll want to
 112 -        * reserve it, but let's get enough confirmation reports first.
 113 +        * reserve it, but let's get enough confirmation reports first.
 114          */
 115         base &= -size;
 116         dev_info(&dev->dev, "%s MMIO at %04x-%04x\n", name, base, base + size - 1);
 117 @@ -673,7 +674,7 @@ static void __devinit quirk_vt8235_acpi(
 118  DECLARE_PCI_FIXUP_HEADER(PCI_VENDOR_ID_VIA,    PCI_DEVICE_ID_VIA_8235, quirk_vt8235_acpi);
 119
 120
 121 -#ifdef CONFIG_X86_IO_APIC
 122 +#ifdef CONFIG_X86_IO_APIC
 123
 124  #include <asm/io_apic.h>
 125
 126 @@ -687,12 +688,12 @@ DECLARE_PCI_FIXUP_HEADER(PCI_VENDOR_ID_V
 127  static void quirk_via_ioapic(struct pci_dev *dev)
 128  {
 129         u8 tmp;
 130 -
 131 +
 132         if (nr_ioapics < 1)
 133                 tmp = 0;    /* nothing routed to external APIC */
 134         else
 135                 tmp = 0x1f; /* all known bits (4-0) routed to external APIC */
 136 -
 137 +
 138         dev_info(&dev->dev, "%sbling VIA external APIC routing\n",
 139                tmp == 0 ? "Disa" : "Ena");
 140
 141 @@ -977,7 +978,7 @@ DECLARE_PCI_FIXUP_RESUME(PCI_VENDOR_ID_C
 142  static void quirk_disable_pxb(struct pci_dev *pdev)
 143  {
 144         u16 config;
 145 -
 146 +
 147         if (pdev->revision != 0x04)             /* Only C0 requires this */
 148                 return;
 149         pci_read_config_word(pdev, 0x40, &config);
 150 @@ -1073,11 +1074,11 @@ DECLARE_PCI_FIXUP_HEADER(PCI_VENDOR_ID_I
 151   * On ASUS P4B boards, the SMBus PCI Device within the ICH2/4 southbridge
 152   * is not activated. The myth is that Asus said that they do not want the
 153   * users to be irritated by just another PCI Device in the Win98 device
 154 - * manager. (see the file prog/hotplug/README.p4b in the lm_sensors
 155 + * manager. (see the file prog/hotplug/README.p4b in the lm_sensors
 156   * package 2.7.0 for details)
 157   *
 158 - * The SMBus PCI Device can be activated by setting a bit in the ICH LPC
 159 - * bridge. Unfortunately, this device has no subvendor/subdevice ID. So it
 160 + * The SMBus PCI Device can be activated by setting a bit in the ICH LPC
 161 + * bridge. Unfortunately, this device has no subvendor/subdevice ID. So it
 162   * becomes necessary to do this tweak in two steps -- the chosen trigger
 163   * is either the Host bridge (preferred) or on-board VGA controller.
 164   *
 165 @@ -1229,7 +1230,7 @@ DECLARE_PCI_FIXUP_HEADER(PCI_VENDOR_ID_I
 166  static void asus_hides_smbus_lpc(struct pci_dev *dev)
 167  {
 168         u16 val;
 169 -
 170 +
 171         if (likely(!asus_hides_smbus))
 172                 return;
 173
 174 @@ -1859,7 +1860,9 @@ static void __devinit fixup_rev1_53c810(
 175         }
 176  }
 177  DECLARE_PCI_FIXUP_HEADER(PCI_VENDOR_ID_NCR, PCI_DEVICE_ID_NCR_53C810, fixup_rev1_53c810);
 178 +#endif /* !CONFIG_PCI_DISABLE_COMMON_QUIRKS */
 179
 180 +#ifndef CONFIG_PCI_DISABLE_COMMON_QUIRKS
 181  /* Enable 1k I/O space granularity on the Intel P64H2 */
 182  static void __devinit quirk_p64h2_1k_io(struct pci_dev *dev)
 183  {
 184 @@ -2463,6 +2466,7 @@ DECLARE_PCI_FIXUP_HEADER(PCI_VENDOR_ID_I
 185  DECLARE_PCI_FIXUP_HEADER(PCI_VENDOR_ID_INTEL, 0x10e7, quirk_i82576_sriov);
 186
 187  #endif /* CONFIG_PCI_IOV */
 188 +#endif /* !CONFIG_PCI_DISABLE_COMMON_QUIRKS */
 189
 190  static void pci_do_fixups(struct pci_dev *dev, struct pci_fixup *f,
 191                           struct pci_fixup *end)