target/linux/amazon-2.6/files/include/asm-mips/amazon/irq.h

   1 /* irq.h - AMAZON interrupts */
   2
   3 #ifndef __AMAZON_IRQ
   4 #define __AMAZON_IRQ
   5
   6 /************************************************************************
   7  *  Interrupt information
   8 *************************************************************************/
   9
  10 /* these vectors are to handle the interrupts from the internal AMAZON
  11    interrupt controller. THe INT_NUM values are really just indices into
  12    an array and are set up so that we can use the INT_NUM as a shift
  13    to calculate a mask value. */
  14 #define INT_NUM_IRQ0            8
  15 #define INT_NUM_IM0_IRL0        (INT_NUM_IRQ0 + 0)
  16 #define INT_NUM_IM0_IRL1        (INT_NUM_IRQ0 + 1)
  17 #define INT_NUM_IM0_IRL2        (INT_NUM_IRQ0 + 2)
  18 #define INT_NUM_IM0_IRL3        (INT_NUM_IRQ0 + 3)
  19 #define INT_NUM_IM0_IRL4        (INT_NUM_IRQ0 + 4)
  20 #define INT_NUM_IM0_IRL5        (INT_NUM_IRQ0 + 5)
  21 #define INT_NUM_IM0_IRL6        (INT_NUM_IRQ0 + 6)
  22 #define INT_NUM_IM0_IRL7        (INT_NUM_IRQ0 + 7)
  23 #define INT_NUM_IM0_IRL8        (INT_NUM_IRQ0 + 8)
  24 #define INT_NUM_IM0_IRL9        (INT_NUM_IRQ0 + 9)
  25 #define INT_NUM_IM0_IRL10       (INT_NUM_IRQ0 + 10)
  26 #define INT_NUM_IM0_IRL11       (INT_NUM_IRQ0 + 11)
  27 #define INT_NUM_IM0_IRL12       (INT_NUM_IRQ0 + 12)
  28 #define INT_NUM_IM0_IRL13       (INT_NUM_IRQ0 + 13)
  29 #define INT_NUM_IM0_IRL14       (INT_NUM_IRQ0 + 14)
  30 #define INT_NUM_IM0_IRL15       (INT_NUM_IRQ0 + 15)
  31 #define INT_NUM_IM0_IRL16       (INT_NUM_IRQ0 + 16)
  32 #define INT_NUM_IM0_IRL17       (INT_NUM_IRQ0 + 17)
  33 #define INT_NUM_IM0_IRL18       (INT_NUM_IRQ0 + 18)
  34 #define INT_NUM_IM0_IRL19       (INT_NUM_IRQ0 + 19)
  35 #define INT_NUM_IM0_IRL20       (INT_NUM_IRQ0 + 20)
  36 #define INT_NUM_IM0_IRL21       (INT_NUM_IRQ0 + 21)
  37 #define INT_NUM_IM0_IRL22       (INT_NUM_IRQ0 + 22)
  38 #define INT_NUM_IM0_IRL23       (INT_NUM_IRQ0 + 23)
  39 #define INT_NUM_IM0_IRL24       (INT_NUM_IRQ0 + 24)
  40 #define INT_NUM_IM0_IRL25       (INT_NUM_IRQ0 + 25)
  41 #define INT_NUM_IM0_IRL26       (INT_NUM_IRQ0 + 26)
  42 #define INT_NUM_IM0_IRL27       (INT_NUM_IRQ0 + 27)
  43 #define INT_NUM_IM0_IRL28       (INT_NUM_IRQ0 + 28)
  44 #define INT_NUM_IM0_IRL29       (INT_NUM_IRQ0 + 29)
  45 #define INT_NUM_IM0_IRL30       (INT_NUM_IRQ0 + 30)
  46 #define INT_NUM_IM0_IRL31       (INT_NUM_IRQ0 + 31)
  47
  48 #define INT_NUM_IM1_IRL0        (INT_NUM_IRQ0 + 32)
  49 #define INT_NUM_IM1_IRL1        (INT_NUM_IM1_IRL0 + 1)
  50 #define INT_NUM_IM1_IRL2        (INT_NUM_IM1_IRL0 + 2)
  51 #define INT_NUM_IM1_IRL3        (INT_NUM_IM1_IRL0 + 3)
  52 #define INT_NUM_IM1_IRL4        (INT_NUM_IM1_IRL0 + 4)
  53 #define INT_NUM_IM1_IRL5        (INT_NUM_IM1_IRL0 + 5)
  54 #define INT_NUM_IM1_IRL6        (INT_NUM_IM1_IRL0 + 6)
  55 #define INT_NUM_IM1_IRL7        (INT_NUM_IM1_IRL0 + 7)
  56 #define INT_NUM_IM1_IRL8        (INT_NUM_IM1_IRL0 + 8)
  57 #define INT_NUM_IM1_IRL9        (INT_NUM_IM1_IRL0 + 9)
  58 #define INT_NUM_IM1_IRL10       (INT_NUM_IM1_IRL0 + 10)
  59 #define INT_NUM_IM1_IRL11       (INT_NUM_IM1_IRL0 + 11)
  60 #define INT_NUM_IM1_IRL12       (INT_NUM_IM1_IRL0 + 12)
  61 #define INT_NUM_IM1_IRL13       (INT_NUM_IM1_IRL0 + 13)
  62 #define INT_NUM_IM1_IRL14       (INT_NUM_IM1_IRL0 + 14)
  63 #define INT_NUM_IM1_IRL15       (INT_NUM_IM1_IRL0 + 15)
  64 #define INT_NUM_IM1_IRL16       (INT_NUM_IM1_IRL0 + 16)
  65 #define INT_NUM_IM1_IRL17       (INT_NUM_IM1_IRL0 + 17)
  66 #define INT_NUM_IM1_IRL18       (INT_NUM_IM1_IRL0 + 18)
  67 #define INT_NUM_IM1_IRL19       (INT_NUM_IM1_IRL0 + 19)
  68 #define INT_NUM_IM1_IRL20       (INT_NUM_IM1_IRL0 + 20)
  69 #define INT_NUM_IM1_IRL21       (INT_NUM_IM1_IRL0 + 21)
  70 #define INT_NUM_IM1_IRL22       (INT_NUM_IM1_IRL0 + 22)
  71 #define INT_NUM_IM1_IRL23       (INT_NUM_IM1_IRL0 + 23)
  72 #define INT_NUM_IM1_IRL24       (INT_NUM_IM1_IRL0 + 24)
  73 #define INT_NUM_IM1_IRL25       (INT_NUM_IM1_IRL0 + 25)
  74 #define INT_NUM_IM1_IRL26       (INT_NUM_IM1_IRL0 + 26)
  75 #define INT_NUM_IM1_IRL27       (INT_NUM_IM1_IRL0 + 27)
  76 #define INT_NUM_IM1_IRL28       (INT_NUM_IM1_IRL0 + 28)
  77 #define INT_NUM_IM1_IRL29       (INT_NUM_IM1_IRL0 + 29)
  78 #define INT_NUM_IM1_IRL30       (INT_NUM_IM1_IRL0 + 30)
  79 #define INT_NUM_IM1_IRL31       (INT_NUM_IM1_IRL0 + 31)
  80
  81 #define INT_NUM_IM2_IRL0        (INT_NUM_IRQ0 + 64)
  82 #define INT_NUM_IM2_IRL1        (INT_NUM_IM2_IRL0 + 1)
  83 #define INT_NUM_IM2_IRL2        (INT_NUM_IM2_IRL0 + 2)
  84 #define INT_NUM_IM2_IRL3        (INT_NUM_IM2_IRL0 + 3)
  85 #define INT_NUM_IM2_IRL4        (INT_NUM_IM2_IRL0 + 4)
  86 #define INT_NUM_IM2_IRL5        (INT_NUM_IM2_IRL0 + 5)
  87 #define INT_NUM_IM2_IRL6        (INT_NUM_IM2_IRL0 + 6)
  88 #define INT_NUM_IM2_IRL7        (INT_NUM_IM2_IRL0 + 7)
  89 #define INT_NUM_IM2_IRL8        (INT_NUM_IM2_IRL0 + 8)
  90 #define INT_NUM_IM2_IRL9        (INT_NUM_IM2_IRL0 + 9)
  91 #define INT_NUM_IM2_IRL10       (INT_NUM_IM2_IRL0 + 10)
  92 #define INT_NUM_IM2_IRL11       (INT_NUM_IM2_IRL0 + 11)
  93 #define INT_NUM_IM2_IRL12       (INT_NUM_IM2_IRL0 + 12)
  94 #define INT_NUM_IM2_IRL13       (INT_NUM_IM2_IRL0 + 13)
  95 #define INT_NUM_IM2_IRL14       (INT_NUM_IM2_IRL0 + 14)
  96 #define INT_NUM_IM2_IRL15       (INT_NUM_IM2_IRL0 + 15)
  97 #define INT_NUM_IM2_IRL16       (INT_NUM_IM2_IRL0 + 16)
  98 #define INT_NUM_IM2_IRL17       (INT_NUM_IM2_IRL0 + 17)
  99 #define INT_NUM_IM2_IRL18       (INT_NUM_IM2_IRL0 + 18)
 100 #define INT_NUM_IM2_IRL19       (INT_NUM_IM2_IRL0 + 19)
 101 #define INT_NUM_IM2_IRL20       (INT_NUM_IM2_IRL0 + 20)
 102 #define INT_NUM_IM2_IRL21       (INT_NUM_IM2_IRL0 + 21)
 103 #define INT_NUM_IM2_IRL22       (INT_NUM_IM2_IRL0 + 22)
 104 #define INT_NUM_IM2_IRL23       (INT_NUM_IM2_IRL0 + 23)
 105 #define INT_NUM_IM2_IRL24       (INT_NUM_IM2_IRL0 + 24)
 106 #define INT_NUM_IM2_IRL25       (INT_NUM_IM2_IRL0 + 25)
 107 #define INT_NUM_IM2_IRL26       (INT_NUM_IM2_IRL0 + 26)
 108 #define INT_NUM_IM2_IRL27       (INT_NUM_IM2_IRL0 + 27)
 109 #define INT_NUM_IM2_IRL28       (INT_NUM_IM2_IRL0 + 28)
 110 #define INT_NUM_IM2_IRL29       (INT_NUM_IM2_IRL0 + 29)
 111 #define INT_NUM_IM2_IRL30       (INT_NUM_IM2_IRL0 + 30)
 112 #define INT_NUM_IM2_IRL31       (INT_NUM_IM2_IRL0 + 31)
 113
 114 #define INT_NUM_IM3_IRL0        (INT_NUM_IRQ0 + 96)
 115 #define INT_NUM_IM3_IRL1        (INT_NUM_IM3_IRL0 + 1)
 116 #define INT_NUM_IM3_IRL2        (INT_NUM_IM3_IRL0 + 2)
 117 #define INT_NUM_IM3_IRL3        (INT_NUM_IM3_IRL0 + 3)
 118 #define INT_NUM_IM3_IRL4        (INT_NUM_IM3_IRL0 + 4)
 119 #define INT_NUM_IM3_IRL5        (INT_NUM_IM3_IRL0 + 5)
 120 #define INT_NUM_IM3_IRL6        (INT_NUM_IM3_IRL0 + 6)
 121 #define INT_NUM_IM3_IRL7        (INT_NUM_IM3_IRL0 + 7)
 122 #define INT_NUM_IM3_IRL8        (INT_NUM_IM3_IRL0 + 8)
 123 #define INT_NUM_IM3_IRL9        (INT_NUM_IM3_IRL0 + 9)
 124 #define INT_NUM_IM3_IRL10       (INT_NUM_IM3_IRL0 + 10)
 125 #define INT_NUM_IM3_IRL11       (INT_NUM_IM3_IRL0 + 11)
 126 #define INT_NUM_IM3_IRL12       (INT_NUM_IM3_IRL0 + 12)
 127 #define INT_NUM_IM3_IRL13       (INT_NUM_IM3_IRL0 + 13)
 128 #define INT_NUM_IM3_IRL14       (INT_NUM_IM3_IRL0 + 14)
 129 #define INT_NUM_IM3_IRL15       (INT_NUM_IM3_IRL0 + 15)
 130 #define INT_NUM_IM3_IRL16       (INT_NUM_IM3_IRL0 + 16)
 131 #define INT_NUM_IM3_IRL17       (INT_NUM_IM3_IRL0 + 17)
 132 #define INT_NUM_IM3_IRL18       (INT_NUM_IM3_IRL0 + 18)
 133 #define INT_NUM_IM3_IRL19       (INT_NUM_IM3_IRL0 + 19)
 134 #define INT_NUM_IM3_IRL20       (INT_NUM_IM3_IRL0 + 20)
 135 #define INT_NUM_IM3_IRL21       (INT_NUM_IM3_IRL0 + 21)
 136 #define INT_NUM_IM3_IRL22       (INT_NUM_IM3_IRL0 + 22)
 137 #define INT_NUM_IM3_IRL23       (INT_NUM_IM3_IRL0 + 23)
 138 #define INT_NUM_IM3_IRL24       (INT_NUM_IM3_IRL0 + 24)
 139 #define INT_NUM_IM3_IRL25       (INT_NUM_IM3_IRL0 + 25)
 140 #define INT_NUM_IM3_IRL26       (INT_NUM_IM3_IRL0 + 26)
 141 #define INT_NUM_IM3_IRL27       (INT_NUM_IM3_IRL0 + 27)
 142 #define INT_NUM_IM3_IRL28       (INT_NUM_IM3_IRL0 + 28)
 143 #define INT_NUM_IM3_IRL29       (INT_NUM_IM3_IRL0 + 29)
 144 #define INT_NUM_IM3_IRL30       (INT_NUM_IM3_IRL0 + 30)
 145 #define INT_NUM_IM3_IRL31       (INT_NUM_IM3_IRL0 + 31)
 146
 147 #define INT_NUM_IM4_IRL0        (INT_NUM_IRQ0 + 128)
 148 #define INT_NUM_IM4_IRL1        (INT_NUM_IM4_IRL0 + 1)
 149 #define INT_NUM_IM4_IRL2        (INT_NUM_IM4_IRL0 + 2)
 150 #define INT_NUM_IM4_IRL3        (INT_NUM_IM4_IRL0 + 3)
 151 #define INT_NUM_IM4_IRL4        (INT_NUM_IM4_IRL0 + 4)
 152 #define INT_NUM_IM4_IRL5        (INT_NUM_IM4_IRL0 + 5)
 153 #define INT_NUM_IM4_IRL6        (INT_NUM_IM4_IRL0 + 6)
 154 #define INT_NUM_IM4_IRL7        (INT_NUM_IM4_IRL0 + 7)
 155 #define INT_NUM_IM4_IRL8        (INT_NUM_IM4_IRL0 + 8)
 156 #define INT_NUM_IM4_IRL9        (INT_NUM_IM4_IRL0 + 9)
 157 #define INT_NUM_IM4_IRL10       (INT_NUM_IM4_IRL0 + 10)
 158 #define INT_NUM_IM4_IRL11       (INT_NUM_IM4_IRL0 + 11)
 159 #define INT_NUM_IM4_IRL12       (INT_NUM_IM4_IRL0 + 12)
 160 #define INT_NUM_IM4_IRL13       (INT_NUM_IM4_IRL0 + 13)
 161 #define INT_NUM_IM4_IRL14       (INT_NUM_IM4_IRL0 + 14)
 162 #define INT_NUM_IM4_IRL15       (INT_NUM_IM4_IRL0 + 15)
 163 #define INT_NUM_IM4_IRL16       (INT_NUM_IM4_IRL0 + 16)
 164 #define INT_NUM_IM4_IRL17       (INT_NUM_IM4_IRL0 + 17)
 165 #define INT_NUM_IM4_IRL18       (INT_NUM_IM4_IRL0 + 18)
 166 #define INT_NUM_IM4_IRL19       (INT_NUM_IM4_IRL0 + 19)
 167 #define INT_NUM_IM4_IRL20       (INT_NUM_IM4_IRL0 + 20)
 168 #define INT_NUM_IM4_IRL21       (INT_NUM_IM4_IRL0 + 21)
 169 #define INT_NUM_IM4_IRL22       (INT_NUM_IM4_IRL0 + 22)
 170 #define INT_NUM_IM4_IRL23       (INT_NUM_IM4_IRL0 + 23)
 171 #define INT_NUM_IM4_IRL24       (INT_NUM_IM4_IRL0 + 24)
 172 #define INT_NUM_IM4_IRL25       (INT_NUM_IM4_IRL0 + 25)
 173 #define INT_NUM_IM4_IRL26       (INT_NUM_IM4_IRL0 + 26)
 174 #define INT_NUM_IM4_IRL27       (INT_NUM_IM4_IRL0 + 27)
 175 #define INT_NUM_IM4_IRL28       (INT_NUM_IM4_IRL0 + 28)
 176 #define INT_NUM_IM4_IRL29       (INT_NUM_IM4_IRL0 + 29)
 177 #define INT_NUM_IM4_IRL30       (INT_NUM_IM4_IRL0 + 30)
 178 #define INT_NUM_IM4_IRL31       (INT_NUM_IM4_IRL0 + 31)
 179
 180 /****** Interrupt Assigments ***********/
 181 #define AMAZON_DMA_INT          INT_NUM_IM0_IRL0
 182 #define IFX_SSC_TIR             INT_NUM_IM0_IRL29
 183 #define IFX_SSC_RIR             INT_NUM_IM0_IRL30
 184 #define IFX_SSC_EIR             INT_NUM_IM0_IRL31
 185
 186 #define AMAZON_MEI_INT          INT_NUM_IM2_IRL8
 187
 188 #define AMAZONASC_TIR           INT_NUM_IM4_IRL15/* TX interrupt */
 189 #define AMAZONASC_RIR           INT_NUM_IM4_IRL16/* RX interrupt */
 190 #define AMAZONASC_EIR           INT_NUM_IM4_IRL17/* ERROR interrupt */
 191
 192 #define AMAZON_TIMER6_INT       INT_NUM_IM1_IRL23
 193
 194 #define AMAZON_SWIE_INT         INT_NUM_IM3_IRL8
 195 #define AMAZON_CBM_INT          INT_NUM_IM3_IRL9
 196 #define AMAZON_AAL5_INT         INT_NUM_IM3_IRL10
 197 #define AMAZON_HTU_INT          INT_NUM_IM3_IRL11
 198 #define AMAZON_QSB_INT          INT_NUM_IM3_IRL12
 199 #define MIPS_CPU_TIMER_IRQ      7
 200 #endif  /* __AMAZON_IRQ */