4d957f0113c76957f20b779f47fe8dd64746b2fc
[openwrt/svn-archive/archive.git] / target / linux / ar7-2.6 / files / drivers / net / cpmac.c
1 /*
2 * $Id$
3 *
4 * Copyright (C) 2006, 2007 OpenWrt.org
5 *
6 * This program is free software; you can redistribute it and/or modify
7 * it under the terms of the GNU General Public License as published by
8 * the Free Software Foundation; either version 2 of the License, or
9 * (at your option) any later version.
10 *
11 * This program is distributed in the hope that it will be useful,
12 * but WITHOUT ANY WARRANTY; without even the implied warranty of
13 * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
14 * GNU General Public License for more details.
15 *
16 * You should have received a copy of the GNU General Public License
17 * along with this program; if not, write to the Free Software
18 * Foundation, Inc., 51 Franklin St, Fifth Floor, Boston, MA 02110-1301 USA
19 */
20
21 #include <linux/module.h>
22 #include <linux/init.h>
23 #include <linux/moduleparam.h>
24
25 #include <linux/sched.h>
26 #include <linux/kernel.h> /* printk() */
27 #include <linux/slab.h>
28 #include <linux/errno.h>
29 #include <linux/types.h>
30 #include <linux/delay.h>
31 #include <linux/version.h>
32
33 #include <linux/netdevice.h>
34 #include <linux/etherdevice.h>
35 #include <linux/ethtool.h>
36 #include <linux/skbuff.h>
37 #include <linux/mii.h>
38 #include <linux/phy.h>
39 #include <linux/platform_device.h>
40 #include <asm/ar7/ar7.h>
41 #include <asm/gpio.h>
42
43 MODULE_AUTHOR("Eugene Konev");
44 MODULE_DESCRIPTION("TI AR7 ethernet driver (CPMAC)");
45 MODULE_LICENSE("GPL");
46
47 static int rx_ring_size = 64;
48 static int disable_napi = 0;
49 module_param(rx_ring_size, int, 64);
50 module_param(disable_napi, int, 0);
51 MODULE_PARM_DESC(rx_ring_size, "Size of rx ring (in skbs)");
52 MODULE_PARM_DESC(disable_napi, "Disable NAPI polling");
53
54 /* Register definitions */
55 struct cpmac_control_regs {
56 volatile u32 revision;
57 volatile u32 control;
58 volatile u32 teardown;
59 volatile u32 unused;
60 } __attribute__ ((packed));
61
62 struct cpmac_int_regs {
63 volatile u32 stat_raw;
64 volatile u32 stat_masked;
65 volatile u32 enable;
66 volatile u32 clear;
67 } __attribute__ ((packed));
68
69 struct cpmac_stats {
70 volatile u32 good;
71 volatile u32 bcast;
72 volatile u32 mcast;
73 volatile u32 pause;
74 volatile u32 crc_error;
75 volatile u32 align_error;
76 volatile u32 oversized;
77 volatile u32 jabber;
78 volatile u32 undersized;
79 volatile u32 fragment;
80 volatile u32 filtered;
81 volatile u32 qos_filtered;
82 volatile u32 octets;
83 } __attribute__ ((packed));
84
85 struct cpmac_regs {
86 struct cpmac_control_regs tx_ctrl;
87 struct cpmac_control_regs rx_ctrl;
88 volatile u32 unused1[56];
89 volatile u32 mbp;
90 /* MBP bits */
91 #define MBP_RXPASSCRC 0x40000000
92 #define MBP_RXQOS 0x20000000
93 #define MBP_RXNOCHAIN 0x10000000
94 #define MBP_RXCMF 0x01000000
95 #define MBP_RXSHORT 0x00800000
96 #define MBP_RXCEF 0x00400000
97 #define MBP_RXPROMISC 0x00200000
98 #define MBP_PROMISCCHAN(chan) (((chan) & 0x7) << 16)
99 #define MBP_RXBCAST 0x00002000
100 #define MBP_BCASTCHAN(chan) (((chan) & 0x7) << 8)
101 #define MBP_RXMCAST 0x00000020
102 #define MBP_MCASTCHAN(chan) ((chan) & 0x7)
103 volatile u32 unicast_enable;
104 volatile u32 unicast_clear;
105 volatile u32 max_len;
106 volatile u32 buffer_offset;
107 volatile u32 filter_flow_threshold;
108 volatile u32 unused2[2];
109 volatile u32 flow_thre[8];
110 volatile u32 free_buffer[8];
111 volatile u32 mac_control;
112 #define MAC_TXPTYPE 0x00000200
113 #define MAC_TXPACE 0x00000040
114 #define MAC_MII 0x00000020
115 #define MAC_TXFLOW 0x00000010
116 #define MAC_RXFLOW 0x00000008
117 #define MAC_MTEST 0x00000004
118 #define MAC_LOOPBACK 0x00000002
119 #define MAC_FDX 0x00000001
120 volatile u32 mac_status;
121 #define MACST_QOS 0x4
122 #define MACST_RXFLOW 0x2
123 #define MACST_TXFLOW 0x1
124 volatile u32 emc_control;
125 volatile u32 unused3;
126 struct cpmac_int_regs tx_int;
127 volatile u32 mac_int_vector;
128 /* Int Status bits */
129 #define INTST_STATUS 0x80000
130 #define INTST_HOST 0x40000
131 #define INTST_RX 0x20000
132 #define INTST_TX 0x10000
133 volatile u32 mac_eoi_vector;
134 volatile u32 unused4[2];
135 struct cpmac_int_regs rx_int;
136 volatile u32 mac_int_stat_raw;
137 volatile u32 mac_int_stat_masked;
138 volatile u32 mac_int_enable;
139 volatile u32 mac_int_clear;
140 volatile u32 mac_addr_low[8];
141 volatile u32 mac_addr_mid;
142 volatile u32 mac_addr_high;
143 volatile u32 mac_hash_low;
144 volatile u32 mac_hash_high;
145 volatile u32 boff_test;
146 volatile u32 pac_test;
147 volatile u32 rx_pause;
148 volatile u32 tx_pause;
149 volatile u32 unused5[2];
150 struct cpmac_stats rx_stats;
151 struct cpmac_stats tx_stats;
152 volatile u32 unused6[232];
153 volatile u32 tx_ptr[8];
154 volatile u32 rx_ptr[8];
155 volatile u32 tx_ack[8];
156 volatile u32 rx_ack[8];
157
158 } __attribute__ ((packed));
159
160 struct cpmac_mdio_regs {
161 volatile u32 version;
162 volatile u32 control;
163 #define MDIOC_IDLE 0x80000000
164 #define MDIOC_ENABLE 0x40000000
165 #define MDIOC_PREAMBLE 0x00100000
166 #define MDIOC_FAULT 0x00080000
167 #define MDIOC_FAULTDETECT 0x00040000
168 #define MDIOC_INTTEST 0x00020000
169 #define MDIOC_CLKDIV(div) ((div) & 0xff)
170 volatile u32 alive;
171 volatile u32 link;
172 struct cpmac_int_regs link_int;
173 struct cpmac_int_regs user_int;
174 u32 unused[20];
175 volatile u32 access;
176 #define MDIO_BUSY 0x80000000
177 #define MDIO_WRITE 0x40000000
178 #define MDIO_REG(reg) (((reg) & 0x1f) << 21)
179 #define MDIO_PHY(phy) (((phy) & 0x1f) << 16)
180 #define MDIO_DATA(data) ((data) & 0xffff)
181 volatile u32 physel;
182 } __attribute__ ((packed));
183
184 /* Descriptor */
185 struct cpmac_desc {
186 u32 hw_next;
187 u32 hw_data;
188 u16 buflen;
189 u16 bufflags;
190 u16 datalen;
191 u16 dataflags;
192 /* Flags bits */
193 #define CPMAC_SOP 0x8000
194 #define CPMAC_EOP 0x4000
195 #define CPMAC_OWN 0x2000
196 #define CPMAC_EOQ 0x1000
197 struct sk_buff *skb;
198 struct cpmac_desc *next;
199 } __attribute__ ((packed));
200
201 struct cpmac_priv {
202 struct net_device_stats stats;
203 spinlock_t lock;
204 struct sk_buff *skb_pool;
205 int free_skbs;
206 struct cpmac_desc *rx_head;
207 int tx_head, tx_tail;
208 struct cpmac_desc *desc_ring;
209 struct cpmac_regs *regs;
210 struct mii_bus *mii_bus;
211 struct phy_device *phy;
212 char phy_name[BUS_ID_SIZE];
213 struct plat_cpmac_data *config;
214 int oldlink, oldspeed, oldduplex;
215 u32 msg_enable;
216 struct net_device *dev;
217 struct work_struct alloc_work;
218 };
219
220 static irqreturn_t cpmac_irq(int, void *);
221 static void cpmac_reset(struct net_device *dev);
222 static void cpmac_hw_init(struct net_device *dev);
223 static int cpmac_stop(struct net_device *dev);
224 static int cpmac_open(struct net_device *dev);
225
226 #define CPMAC_LOW_THRESH 32
227 #define CPMAC_ALLOC_SIZE 64
228 #define CPMAC_SKB_SIZE 1518
229 #define CPMAC_TX_RING_SIZE 8
230
231 #ifdef CPMAC_DEBUG
232 static void cpmac_dump_regs(u32 *base, int count)
233 {
234 int i;
235 for (i = 0; i < (count + 3) / 4; i++) {
236 if (i % 4 == 0) printk("\nCPMAC[0x%04x]:", i * 4);
237 printk(" 0x%08x", *(base + i));
238 }
239 printk("\n");
240 }
241 #endif
242
243 static int cpmac_mdio_read(struct mii_bus *bus, int phy_id, int regnum)
244 {
245 struct cpmac_mdio_regs *regs = (struct cpmac_mdio_regs *)bus->priv;
246 volatile u32 val;
247
248 while ((val = regs->access) & MDIO_BUSY);
249 regs->access = MDIO_BUSY | MDIO_REG(regnum & 0x1f) |
250 MDIO_PHY(phy_id & 0x1f);
251 while ((val = regs->access) & MDIO_BUSY);
252
253 return val & 0xffff;
254 }
255
256 static int cpmac_mdio_write(struct mii_bus *bus, int phy_id, int regnum, u16 val)
257 {
258 struct cpmac_mdio_regs *regs = (struct cpmac_mdio_regs *)bus->priv;
259 volatile u32 tmp;
260
261 while ((tmp = regs->access) & MDIO_BUSY);
262 regs->access = MDIO_BUSY | MDIO_WRITE |
263 MDIO_REG(regnum & 0x1f) | MDIO_PHY(phy_id & 0x1f) |
264 val;
265
266 return 0;
267 }
268
269 static int cpmac_mdio_reset(struct mii_bus *bus)
270 {
271 struct cpmac_mdio_regs *regs = (struct cpmac_mdio_regs *)bus->priv;
272
273 ar7_device_reset(AR7_RESET_BIT_MDIO);
274 regs->control = MDIOC_ENABLE |
275 MDIOC_CLKDIV(ar7_cpmac_freq() / 2200000 - 1);
276
277 return 0;
278 }
279
280 static int mii_irqs[PHY_MAX_ADDR] = { PHY_POLL, };
281
282 static struct mii_bus cpmac_mii = {
283 .name = "cpmac-mii",
284 .read = cpmac_mdio_read,
285 .write = cpmac_mdio_write,
286 .reset = cpmac_mdio_reset,
287 .irq = mii_irqs,
288 };
289
290 static int cpmac_config(struct net_device *dev, struct ifmap *map)
291 {
292 if (dev->flags & IFF_UP)
293 return -EBUSY;
294
295 /* Don't allow changing the I/O address */
296 if (map->base_addr != dev->base_addr)
297 return -EOPNOTSUPP;
298
299 /* ignore other fields */
300 return 0;
301 }
302
303 static int cpmac_set_mac_address(struct net_device *dev, void *addr)
304 {
305 struct sockaddr *sa = addr;
306
307 if (dev->flags & IFF_UP)
308 return -EBUSY;
309
310 memcpy(dev->dev_addr, sa->sa_data, dev->addr_len);
311
312 return 0;
313 }
314
315 static void cpmac_set_multicast_list(struct net_device *dev)
316 {
317 struct dev_mc_list *iter;
318 int i;
319 int hash, tmp;
320 int hashlo = 0, hashhi = 0;
321 struct cpmac_priv *priv = netdev_priv(dev);
322
323 if(dev->flags & IFF_PROMISC) {
324 priv->regs->mbp &= ~MBP_PROMISCCHAN(0); /* promisc channel 0 */
325 priv->regs->mbp |= MBP_RXPROMISC;
326 } else {
327 priv->regs->mbp &= ~MBP_RXPROMISC;
328 if(dev->flags & IFF_ALLMULTI) {
329 /* enable all multicast mode */
330 priv->regs->mac_hash_low = 0xffffffff;
331 priv->regs->mac_hash_high = 0xffffffff;
332 } else {
333 for(i = 0, iter = dev->mc_list; i < dev->mc_count;
334 i++, iter = iter->next) {
335 hash = 0;
336 tmp = iter->dmi_addr[0];
337 hash ^= (tmp >> 2) ^ (tmp << 4);
338 tmp = iter->dmi_addr[1];
339 hash ^= (tmp >> 4) ^ (tmp << 2);
340 tmp = iter->dmi_addr[2];
341 hash ^= (tmp >> 6) ^ tmp;
342 tmp = iter->dmi_addr[4];
343 hash ^= (tmp >> 2) ^ (tmp << 4);
344 tmp = iter->dmi_addr[5];
345 hash ^= (tmp >> 4) ^ (tmp << 2);
346 tmp = iter->dmi_addr[6];
347 hash ^= (tmp >> 6) ^ tmp;
348 hash &= 0x3f;
349 if(hash < 32) {
350 hashlo |= 1<<hash;
351 } else {
352 hashhi |= 1<<(hash - 32);
353 }
354 }
355
356 priv->regs->mac_hash_low = hashlo;
357 priv->regs->mac_hash_high = hashhi;
358 }
359 }
360 }
361
362 static struct sk_buff *cpmac_get_skb(struct net_device *dev)
363 {
364 struct sk_buff *skb;
365 struct cpmac_priv *priv = netdev_priv(dev);
366
367 skb = priv->skb_pool;
368 if (likely(skb)) {
369 priv->skb_pool = skb->next;
370 } else {
371 skb = dev_alloc_skb(CPMAC_SKB_SIZE + 2);
372 if (skb) {
373 skb->next = NULL;
374 skb_reserve(skb, 2);
375 skb->dev = priv->dev;
376 }
377 }
378
379 if (likely(priv->free_skbs))
380 priv->free_skbs--;
381
382 if (priv->free_skbs < CPMAC_LOW_THRESH)
383 schedule_work(&priv->alloc_work);
384
385 return skb;
386 }
387
388 static inline struct sk_buff *cpmac_rx_one(struct net_device *dev,
389 struct cpmac_priv *priv,
390 struct cpmac_desc *desc)
391 {
392 unsigned long flags;
393 char *data;
394 struct sk_buff *skb, *result = NULL;
395
396 priv->regs->rx_ack[0] = virt_to_phys(desc);
397 if (unlikely(!desc->datalen)) {
398 if (printk_ratelimit())
399 printk(KERN_WARNING "%s: rx: spurious interrupt\n",
400 dev->name);
401 priv->stats.rx_errors++;
402 return NULL;
403 }
404
405 spin_lock_irqsave(&priv->lock, flags);
406 skb = cpmac_get_skb(dev);
407 if (likely(skb)) {
408 data = (char *)phys_to_virt(desc->hw_data);
409 dma_cache_inv((u32)data, desc->datalen);
410 skb_put(desc->skb, desc->datalen);
411 desc->skb->protocol = eth_type_trans(desc->skb, dev);
412 desc->skb->ip_summed = CHECKSUM_NONE;
413 priv->stats.rx_packets++;
414 priv->stats.rx_bytes += desc->datalen;
415 result = desc->skb;
416 desc->skb = skb;
417 } else {
418 #ifdef CPMAC_DEBUG
419 if (printk_ratelimit())
420 printk("%s: low on skbs, dropping packet\n",
421 dev->name);
422 #endif
423 priv->stats.rx_dropped++;
424 }
425 spin_unlock_irqrestore(&priv->lock, flags);
426
427 desc->hw_data = virt_to_phys(desc->skb->data);
428 desc->buflen = CPMAC_SKB_SIZE;
429 desc->dataflags = CPMAC_OWN;
430 dma_cache_wback((u32)desc, 16);
431
432 return result;
433 }
434
435 static void cpmac_rx(struct net_device *dev)
436 {
437 struct sk_buff *skb;
438 struct cpmac_desc *desc;
439 struct cpmac_priv *priv = netdev_priv(dev);
440
441 spin_lock(&priv->lock);
442 if (unlikely(!priv->rx_head)) {
443 spin_unlock(&priv->lock);
444 return;
445 }
446
447 desc = priv->rx_head;
448 dma_cache_inv((u32)desc, 16);
449
450 while ((desc->dataflags & CPMAC_OWN) == 0) {
451 skb = cpmac_rx_one(dev, priv, desc);
452 if (likely(skb)) {
453 netif_rx(skb);
454 }
455 desc = desc->next;
456 dma_cache_inv((u32)desc, 16);
457 }
458
459 priv->rx_head = desc;
460 priv->regs->rx_ptr[0] = virt_to_phys(desc);
461 spin_unlock(&priv->lock);
462 }
463
464 static int cpmac_poll(struct net_device *dev, int *budget)
465 {
466 struct sk_buff *skb;
467 struct cpmac_desc *desc;
468 int received = 0, quota = min(dev->quota, *budget);
469 struct cpmac_priv *priv = netdev_priv(dev);
470
471 if (unlikely(!priv->rx_head)) {
472 if (printk_ratelimit())
473 printk(KERN_WARNING "%s: rx: polling, but no queue\n",
474 dev->name);
475 netif_rx_complete(dev);
476 return 0;
477 }
478
479 desc = priv->rx_head;
480 dma_cache_inv((u32)desc, 16);
481
482 while ((received < quota) && ((desc->dataflags & CPMAC_OWN) == 0)) {
483 skb = cpmac_rx_one(dev, priv, desc);
484 if (likely(skb)) {
485 netif_receive_skb(skb);
486 received++;
487 }
488 desc = desc->next;
489 priv->rx_head = desc;
490 dma_cache_inv((u32)desc, 16);
491 }
492
493 *budget -= received;
494 dev->quota -= received;
495 #ifdef CPMAC_DEBUG
496 printk("%s: processed %d packets\n", dev->name, received);
497 #endif
498 if (desc->dataflags & CPMAC_OWN) {
499 priv->regs->rx_ptr[0] = virt_to_phys(desc);
500 netif_rx_complete(dev);
501 priv->regs->rx_int.enable = 0x1;
502 priv->regs->rx_int.clear = 0xfe;
503 return 0;
504 }
505
506 return 1;
507 }
508
509 #if LINUX_VERSION_CODE >= KERNEL_VERSION(2, 6, 20)
510 static void
511 cpmac_alloc_skbs(struct work_struct *work)
512 {
513 struct cpmac_priv *priv = container_of(work, struct cpmac_priv,
514 alloc_work);
515 #else
516 static void
517 cpmac_alloc_skbs(void *data)
518 {
519 struct net_device *dev = (struct net_device*)data;
520 struct cpmac_priv *priv = netdev_priv(dev);
521 #endif
522 unsigned long flags;
523 int i, num_skbs = 0;
524 struct sk_buff *skb, *skbs = NULL;
525
526 for (i = 0; i < CPMAC_ALLOC_SIZE; i++) {
527 skb = alloc_skb(CPMAC_SKB_SIZE + 2, GFP_KERNEL);
528 if (!skb)
529 break;
530 skb->next = skbs;
531 skb_reserve(skb, 2);
532 skb->dev = priv->dev;
533 num_skbs++;
534 skbs = skb;
535 }
536
537 if (skbs) {
538 spin_lock_irqsave(&priv->lock, flags);
539 for (skb = priv->skb_pool; skb && skb->next; skb = skb->next);
540 if (!skb) {
541 priv->skb_pool = skbs;
542 } else {
543 skb->next = skbs;
544 }
545 priv->free_skbs += num_skbs;
546 spin_unlock_irqrestore(&priv->lock, flags);
547 #ifdef CPMAC_DEBUG
548 printk("%s: allocated %d skbs\n", priv->dev->name, num_skbs);
549 #endif
550 }
551 }
552
553 static int cpmac_start_xmit(struct sk_buff *skb, struct net_device *dev)
554 {
555 unsigned long flags;
556 int len, chan;
557 struct cpmac_desc *desc;
558 struct cpmac_priv *priv = netdev_priv(dev);
559
560 len = skb->len;
561 if (unlikely(len < ETH_ZLEN)) {
562 if (unlikely(skb_padto(skb, ETH_ZLEN))) {
563 if (printk_ratelimit())
564 printk(KERN_NOTICE "%s: padding failed, dropping\n",
565 dev->name);
566 spin_lock_irqsave(&priv->lock, flags);
567 priv->stats.tx_dropped++;
568 spin_unlock_irqrestore(&priv->lock, flags);
569 return -ENOMEM;
570 }
571 len = ETH_ZLEN;
572 }
573 spin_lock_irqsave(&priv->lock, flags);
574 chan = priv->tx_tail++;
575 priv->tx_tail %= 8;
576 if (priv->tx_tail == priv->tx_head)
577 netif_stop_queue(dev);
578
579 desc = &priv->desc_ring[chan];
580 dma_cache_inv((u32)desc, 16);
581 if (desc->dataflags & CPMAC_OWN) {
582 printk(KERN_NOTICE "%s: tx dma ring full, dropping\n", dev->name);
583 priv->stats.tx_dropped++;
584 spin_unlock_irqrestore(&priv->lock, flags);
585 return -ENOMEM;
586 }
587
588 dev->trans_start = jiffies;
589 desc->dataflags = CPMAC_SOP | CPMAC_EOP | CPMAC_OWN;
590 desc->skb = skb;
591 desc->hw_data = virt_to_phys(skb->data);
592 dma_cache_wback((u32)skb->data, len);
593 desc->buflen = len;
594 desc->datalen = len;
595 desc->hw_next = 0;
596 dma_cache_wback((u32)desc, 16);
597 priv->regs->tx_ptr[chan] = virt_to_phys(desc);
598 spin_unlock_irqrestore(&priv->lock, flags);
599
600 return 0;
601 }
602
603 static void cpmac_end_xmit(struct net_device *dev, int channel)
604 {
605 struct cpmac_desc *desc;
606 struct cpmac_priv *priv = netdev_priv(dev);
607
608 spin_lock(&priv->lock);
609 desc = &priv->desc_ring[channel];
610 priv->regs->tx_ack[channel] = virt_to_phys(desc);
611 if (likely(desc->skb)) {
612 priv->stats.tx_packets++;
613 priv->stats.tx_bytes += desc->skb->len;
614 dev_kfree_skb_irq(desc->skb);
615 if (netif_queue_stopped(dev))
616 netif_wake_queue(dev);
617 } else {
618 if (printk_ratelimit())
619 printk(KERN_NOTICE "%s: end_xmit: spurious interrupt\n",
620 dev->name);
621 }
622 spin_unlock(&priv->lock);
623 }
624
625 static void cpmac_reset(struct net_device *dev)
626 {
627 int i;
628 struct cpmac_priv *priv = netdev_priv(dev);
629
630 ar7_device_reset(priv->config->reset_bit);
631 priv->regs->rx_ctrl.control &= ~1;
632 priv->regs->tx_ctrl.control &= ~1;
633 for (i = 0; i < 8; i++) {
634 priv->regs->tx_ptr[i] = 0;
635 priv->regs->rx_ptr[i] = 0;
636 }
637 priv->regs->mac_control &= ~MAC_MII; /* disable mii */
638 }
639
640 static inline void cpmac_free_rx_ring(struct net_device *dev)
641 {
642 struct cpmac_desc *desc;
643 int i;
644 struct cpmac_priv *priv = netdev_priv(dev);
645
646 if (unlikely(!priv->rx_head))
647 return;
648
649 desc = priv->rx_head;
650 dma_cache_inv((u32)desc, 16);
651
652 for (i = 0; i < rx_ring_size; i++) {
653 desc->buflen = CPMAC_SKB_SIZE;
654 if ((desc->dataflags & CPMAC_OWN) == 0) {
655 desc->dataflags = CPMAC_OWN;
656 priv->stats.rx_dropped++;
657 }
658 dma_cache_wback((u32)desc, 16);
659 desc = desc->next;
660 dma_cache_inv((u32)desc, 16);
661 }
662 }
663
664 static irqreturn_t cpmac_irq(int irq, void *dev_id)
665 {
666 struct net_device *dev = (struct net_device *)dev_id;
667 struct cpmac_priv *priv = netdev_priv(dev);
668 u32 status;
669
670 if (!dev)
671 return IRQ_NONE;
672
673 status = priv->regs->mac_int_vector;
674
675 if (status & INTST_TX) {
676 cpmac_end_xmit(dev, (status & 7));
677 }
678
679 if (status & INTST_RX) {
680 if (disable_napi) {
681 cpmac_rx(dev);
682 } else {
683 priv->regs->rx_int.enable = 0;
684 priv->regs->rx_int.clear = 0xff;
685 netif_rx_schedule(dev);
686 }
687 }
688
689 priv->regs->mac_eoi_vector = 0;
690
691 if (unlikely(status & (INTST_HOST | INTST_STATUS))) {
692 printk(KERN_ERR "%s: hw error, resetting...\n", dev->name);
693 spin_lock(&priv->lock);
694 phy_stop(priv->phy);
695 cpmac_reset(dev);
696 cpmac_free_rx_ring(dev);
697 cpmac_hw_init(dev);
698 spin_unlock(&priv->lock);
699 }
700
701 return IRQ_HANDLED;
702 }
703
704 static void cpmac_tx_timeout(struct net_device *dev)
705 {
706 struct cpmac_priv *priv = netdev_priv(dev);
707 struct cpmac_desc *desc;
708
709 priv->stats.tx_errors++;
710 desc = &priv->desc_ring[priv->tx_head++];
711 priv->tx_head %= 8;
712 printk("%s: transmit timeout\n", dev->name);
713 if (desc->skb)
714 dev_kfree_skb(desc->skb);
715 netif_wake_queue(dev);
716 }
717
718 static int cpmac_ioctl(struct net_device *dev, struct ifreq *ifr, int cmd)
719 {
720 struct cpmac_priv *priv = netdev_priv(dev);
721 if (!(netif_running(dev)))
722 return -EINVAL;
723 if (!priv->phy)
724 return -EINVAL;
725 if ((cmd == SIOCGMIIPHY) || (cmd == SIOCGMIIREG) ||
726 (cmd == SIOCSMIIREG))
727 return phy_mii_ioctl(priv->phy, if_mii(ifr), cmd);
728
729 return -EINVAL;
730 }
731
732 static int cpmac_get_settings(struct net_device *dev, struct ethtool_cmd *cmd)
733 {
734 struct cpmac_priv *priv = netdev_priv(dev);
735
736 if (priv->phy)
737 return phy_ethtool_gset(priv->phy, cmd);
738
739 return -EINVAL;
740 }
741
742 static int cpmac_set_settings(struct net_device *dev, struct ethtool_cmd *cmd)
743 {
744 struct cpmac_priv *priv = netdev_priv(dev);
745
746 if (!capable(CAP_NET_ADMIN))
747 return -EPERM;
748
749 if (priv->phy)
750 return phy_ethtool_sset(priv->phy, cmd);
751
752 return -EINVAL;
753 }
754
755 static void cpmac_get_drvinfo(struct net_device *dev,
756 struct ethtool_drvinfo *info)
757 {
758 strcpy(info->driver, "cpmac");
759 strcpy(info->version, "0.0.3");
760 info->fw_version[0] = '\0';
761 sprintf(info->bus_info, "%s", "cpmac");
762 info->regdump_len = 0;
763 }
764
765 static const struct ethtool_ops cpmac_ethtool_ops = {
766 .get_settings = cpmac_get_settings,
767 .set_settings = cpmac_set_settings,
768 .get_drvinfo = cpmac_get_drvinfo,
769 .get_link = ethtool_op_get_link,
770 };
771
772 static struct net_device_stats *cpmac_stats(struct net_device *dev)
773 {
774 struct cpmac_priv *priv = netdev_priv(dev);
775
776 if (netif_device_present(dev))
777 return &priv->stats;
778
779 return NULL;
780 }
781
782 static int cpmac_change_mtu(struct net_device *dev, int mtu)
783 {
784 unsigned long flags;
785 struct cpmac_priv *priv = netdev_priv(dev);
786 spinlock_t *lock = &priv->lock;
787
788 if ((mtu < 68) || (mtu > 1500))
789 return -EINVAL;
790
791 spin_lock_irqsave(lock, flags);
792 dev->mtu = mtu;
793 spin_unlock_irqrestore(lock, flags);
794
795 return 0;
796 }
797
798 static void cpmac_adjust_link(struct net_device *dev)
799 {
800 struct cpmac_priv *priv = netdev_priv(dev);
801 unsigned long flags;
802 int new_state = 0;
803
804 spin_lock_irqsave(&priv->lock, flags);
805 if (priv->phy->link) {
806 if (priv->phy->duplex != priv->oldduplex) {
807 new_state = 1;
808 priv->oldduplex = priv->phy->duplex;
809 }
810
811 if (priv->phy->speed != priv->oldspeed) {
812 new_state = 1;
813 priv->oldspeed = priv->phy->speed;
814 }
815
816 if (!priv->oldlink) {
817 new_state = 1;
818 priv->oldlink = 1;
819 netif_schedule(dev);
820 }
821 } else if (priv->oldlink) {
822 new_state = 1;
823 priv->oldlink = 0;
824 priv->oldspeed = 0;
825 priv->oldduplex = -1;
826 }
827
828 if (new_state)
829 phy_print_status(priv->phy);
830
831 spin_unlock_irqrestore(&priv->lock, flags);
832 }
833
834 static void cpmac_hw_init(struct net_device *dev)
835 {
836 int i;
837 struct cpmac_priv *priv = netdev_priv(dev);
838
839 for (i = 0; i < 8; i++)
840 priv->regs->tx_ptr[i] = 0;
841 priv->regs->rx_ptr[0] = virt_to_phys(priv->rx_head);
842
843 priv->regs->mbp = MBP_RXSHORT | MBP_RXBCAST | MBP_RXMCAST;
844 priv->regs->unicast_enable = 0x1;
845 priv->regs->unicast_clear = 0xfe;
846 priv->regs->buffer_offset = 0;
847 for (i = 0; i < 8; i++)
848 priv->regs->mac_addr_low[i] = dev->dev_addr[5];
849 priv->regs->mac_addr_mid = dev->dev_addr[4];
850 priv->regs->mac_addr_high = dev->dev_addr[0] | (dev->dev_addr[1] << 8)
851 | (dev->dev_addr[2] << 16) | (dev->dev_addr[3] << 24);
852 priv->regs->max_len = CPMAC_SKB_SIZE;
853 priv->regs->rx_int.enable = 0x1;
854 priv->regs->rx_int.clear = 0xfe;
855 priv->regs->tx_int.enable = 0xff;
856 priv->regs->tx_int.clear = 0;
857 priv->regs->mac_int_enable = 3;
858 priv->regs->mac_int_clear = 0xfc;
859
860 priv->regs->rx_ctrl.control |= 1;
861 priv->regs->tx_ctrl.control |= 1;
862 priv->regs->mac_control |= MAC_MII | MAC_FDX;
863
864 priv->phy->state = PHY_CHANGELINK;
865 phy_start(priv->phy);
866 }
867
868 static int cpmac_open(struct net_device *dev)
869 {
870 int i, size, res;
871 struct cpmac_priv *priv = netdev_priv(dev);
872 struct cpmac_desc *desc;
873 struct sk_buff *skb;
874
875 #if LINUX_VERSION_CODE >= KERNEL_VERSION(2, 6, 20)
876 priv->phy = phy_connect(dev, priv->phy_name, &cpmac_adjust_link,
877 0, PHY_INTERFACE_MODE_MII);
878 #else
879 priv->phy = phy_connect(dev, priv->phy_name, &cpmac_adjust_link, 0);
880 #endif
881 if (IS_ERR(priv->phy)) {
882 printk(KERN_ERR "%s: Could not attach to PHY\n", dev->name);
883 return PTR_ERR(priv->phy);
884 }
885
886 if (!request_mem_region(dev->mem_start, dev->mem_end -
887 dev->mem_start, dev->name)) {
888 printk("%s: failed to request registers\n",
889 dev->name);
890 res = -ENXIO;
891 goto fail_reserve;
892 }
893
894 priv->regs = ioremap_nocache(dev->mem_start, dev->mem_end -
895 dev->mem_start);
896 if (!priv->regs) {
897 printk("%s: failed to remap registers\n", dev->name);
898 res = -ENXIO;
899 goto fail_remap;
900 }
901
902 priv->rx_head = NULL;
903 size = sizeof(struct cpmac_desc) * (rx_ring_size +
904 CPMAC_TX_RING_SIZE);
905 priv->desc_ring = (struct cpmac_desc *)kmalloc(size, GFP_KERNEL);
906 if (!priv->desc_ring) {
907 res = -ENOMEM;
908 goto fail_alloc;
909 }
910
911 memset((char *)priv->desc_ring, 0, size);
912
913 priv->skb_pool = NULL;
914 priv->free_skbs = 0;
915 priv->rx_head = &priv->desc_ring[CPMAC_TX_RING_SIZE];
916
917 #if LINUX_VERSION_CODE >= KERNEL_VERSION(2, 6, 20)
918 INIT_WORK(&priv->alloc_work, cpmac_alloc_skbs);
919 #else
920 INIT_WORK(&priv->alloc_work, cpmac_alloc_skbs, dev);
921 #endif
922 schedule_work(&priv->alloc_work);
923 flush_scheduled_work();
924
925 for (i = 0; i < rx_ring_size; i++) {
926 desc = &priv->rx_head[i];
927 skb = cpmac_get_skb(dev);
928 if (!skb) {
929 res = -ENOMEM;
930 goto fail_desc;
931 }
932 desc->skb = skb;
933 desc->hw_data = virt_to_phys(skb->data);
934 desc->buflen = CPMAC_SKB_SIZE;
935 desc->dataflags = CPMAC_OWN;
936 desc->next = &priv->rx_head[(i + 1) % rx_ring_size];
937 desc->hw_next = virt_to_phys(desc->next);
938 dma_cache_wback((u32)desc, 16);
939 }
940
941 if((res = request_irq(dev->irq, cpmac_irq, SA_INTERRUPT,
942 dev->name, dev))) {
943 printk("%s: failed to obtain irq\n", dev->name);
944 goto fail_irq;
945 }
946
947 cpmac_reset(dev);
948 cpmac_hw_init(dev);
949
950 netif_start_queue(dev);
951 return 0;
952
953 fail_irq:
954 fail_desc:
955 for (i = 0; i < rx_ring_size; i++)
956 if (priv->rx_head[i].skb)
957 kfree_skb(priv->rx_head[i].skb);
958 fail_alloc:
959 kfree(priv->desc_ring);
960
961 for (skb = priv->skb_pool; skb; skb = priv->skb_pool) {
962 priv->skb_pool = skb->next;
963 kfree_skb(skb);
964 }
965
966 iounmap(priv->regs);
967
968 fail_remap:
969 release_mem_region(dev->mem_start, dev->mem_end -
970 dev->mem_start);
971
972 fail_reserve:
973 phy_disconnect(priv->phy);
974
975 return res;
976 }
977
978 static int cpmac_stop(struct net_device *dev)
979 {
980 int i;
981 struct sk_buff *skb;
982 struct cpmac_priv *priv = netdev_priv(dev);
983
984 netif_stop_queue(dev);
985
986 phy_stop(priv->phy);
987 phy_disconnect(priv->phy);
988 priv->phy = NULL;
989
990 cpmac_reset(dev);
991
992 for (i = 0; i < 8; i++) {
993 priv->regs->rx_ptr[i] = 0;
994 priv->regs->tx_ptr[i] = 0;
995 priv->regs->mbp = 0;
996 }
997
998 free_irq(dev->irq, dev);
999 release_mem_region(dev->mem_start, dev->mem_end -
1000 dev->mem_start);
1001
1002 cancel_delayed_work(&priv->alloc_work);
1003 flush_scheduled_work();
1004
1005 priv->rx_head = &priv->desc_ring[CPMAC_TX_RING_SIZE];
1006 for (i = 0; i < rx_ring_size; i++)
1007 if (priv->rx_head[i].skb)
1008 kfree_skb(priv->rx_head[i].skb);
1009
1010 kfree(priv->desc_ring);
1011
1012 for (skb = priv->skb_pool; skb; skb = priv->skb_pool) {
1013 priv->skb_pool = skb->next;
1014 kfree_skb(skb);
1015 }
1016
1017 return 0;
1018 }
1019
1020 static int external_switch = 0;
1021
1022 static int __devinit cpmac_probe(struct platform_device *pdev)
1023 {
1024 int i, rc, phy_id;
1025 struct resource *res;
1026 struct cpmac_priv *priv;
1027 struct net_device *dev;
1028 struct plat_cpmac_data *pdata;
1029
1030 if (strcmp(pdev->name, "cpmac") != 0)
1031 return -ENODEV;
1032
1033 pdata = pdev->dev.platform_data;
1034
1035 for (phy_id = 0; phy_id < PHY_MAX_ADDR; phy_id++) {
1036 if (!(pdata->phy_mask & (1 << phy_id)))
1037 continue;
1038 if (!cpmac_mii.phy_map[phy_id])
1039 continue;
1040 break;
1041 }
1042
1043 if (phy_id == PHY_MAX_ADDR) {
1044 if (external_switch) {
1045 phy_id = 0;
1046 } else {
1047 printk("cpmac: no PHY present\n");
1048 return -ENODEV;
1049 }
1050 }
1051
1052 dev = alloc_etherdev(sizeof(struct cpmac_priv));
1053
1054 if (!dev) {
1055 printk(KERN_ERR "cpmac: Unable to allocate net_device structure!\n");
1056 return -ENOMEM;
1057 }
1058
1059 SET_MODULE_OWNER(dev);
1060 platform_set_drvdata(pdev, dev);
1061 priv = netdev_priv(dev);
1062
1063 res = platform_get_resource_byname(pdev, IORESOURCE_MEM, "regs");
1064 if (!res) {
1065 rc = -ENODEV;
1066 goto fail;
1067 }
1068
1069 dev->mem_start = res->start;
1070 dev->mem_end = res->end;
1071 dev->irq = platform_get_irq_byname(pdev, "irq");
1072
1073 dev->mtu = 1500;
1074 dev->open = cpmac_open;
1075 dev->stop = cpmac_stop;
1076 dev->set_config = cpmac_config;
1077 dev->hard_start_xmit = cpmac_start_xmit;
1078 dev->do_ioctl = cpmac_ioctl;
1079 dev->get_stats = cpmac_stats;
1080 dev->change_mtu = cpmac_change_mtu;
1081 dev->set_mac_address = cpmac_set_mac_address;
1082 dev->set_multicast_list = cpmac_set_multicast_list;
1083 dev->tx_timeout = cpmac_tx_timeout;
1084 dev->ethtool_ops = &cpmac_ethtool_ops;
1085 if (!disable_napi) {
1086 dev->poll = cpmac_poll;
1087 dev->weight = min(rx_ring_size, 64);
1088 }
1089
1090 memset(priv, 0, sizeof(struct cpmac_priv));
1091 spin_lock_init(&priv->lock);
1092 priv->msg_enable = netif_msg_init(NETIF_MSG_WOL, 0x3fff);
1093 priv->config = pdata;
1094 priv->dev = dev;
1095 memcpy(dev->dev_addr, priv->config->dev_addr, sizeof(dev->dev_addr));
1096 if (phy_id == 31) {
1097 snprintf(priv->phy_name, BUS_ID_SIZE, PHY_ID_FMT,
1098 cpmac_mii.id, phy_id);
1099 } else {
1100 snprintf(priv->phy_name, BUS_ID_SIZE, "fixed@%d:%d", 100, 1);
1101 }
1102
1103 if ((rc = register_netdev(dev))) {
1104 printk("cpmac: error %i registering device %s\n",
1105 rc, dev->name);
1106 goto fail;
1107 }
1108
1109 printk("cpmac: device %s (regs: %p, irq: %d, phy: %s, mac: ",
1110 dev->name, (u32 *)dev->mem_start, dev->irq,
1111 priv->phy_name);
1112 for (i = 0; i < 6; i++) {
1113 printk("%02x", dev->dev_addr[i]);
1114 if (i < 5) printk(":");
1115 else printk(")\n");
1116 }
1117
1118 return 0;
1119
1120 fail:
1121 free_netdev(dev);
1122 return rc;
1123 }
1124
1125 static int __devexit cpmac_remove(struct platform_device *pdev)
1126 {
1127 struct net_device *dev = platform_get_drvdata(pdev);
1128 unregister_netdev(dev);
1129 free_netdev(dev);
1130 return 0;
1131 }
1132
1133 static struct platform_driver cpmac_driver = {
1134 .driver.name = "cpmac",
1135 .probe = cpmac_probe,
1136 .remove = cpmac_remove,
1137 };
1138
1139 int __devinit cpmac_init(void)
1140 {
1141 volatile u32 mask;
1142 int i, res;
1143 cpmac_mii.priv = (struct cpmac_mdio_regs *)
1144 ioremap_nocache(AR7_REGS_MDIO, sizeof(struct cpmac_mdio_regs));
1145
1146 if (!cpmac_mii.priv) {
1147 printk("Can't ioremap mdio registers\n");
1148 return -ENXIO;
1149 }
1150
1151 #warning FIXME: unhardcode gpio&reset bits
1152 ar7_gpio_disable(26);
1153 ar7_gpio_disable(27);
1154 ar7_device_reset(17);
1155 ar7_device_reset(21);
1156 ar7_device_reset(26);
1157
1158 cpmac_mii.reset(&cpmac_mii);
1159
1160 for (i = 0; i < 300000; i++) {
1161 mask = ((struct cpmac_mdio_regs *)cpmac_mii.priv)->alive;
1162 if (mask)
1163 break;
1164 }
1165
1166 mask &= 0x7fffffff;
1167 if (mask & (mask - 1)) {
1168 external_switch = 1;
1169 mask = 0;
1170 }
1171
1172 cpmac_mii.phy_mask = ~(mask | 0x80000000);
1173
1174 res = mdiobus_register(&cpmac_mii);
1175 if (res)
1176 goto fail_mii;
1177
1178 res = platform_driver_register(&cpmac_driver);
1179 if (res)
1180 goto fail_cpmac;
1181
1182 return 0;
1183
1184 fail_cpmac:
1185 mdiobus_unregister(&cpmac_mii);
1186
1187 fail_mii:
1188 iounmap(cpmac_mii.priv);
1189
1190 return res;
1191 }
1192
1193 void __devexit cpmac_exit(void)
1194 {
1195 platform_driver_unregister(&cpmac_driver);
1196 mdiobus_unregister(&cpmac_mii);
1197 }
1198
1199 module_init(cpmac_init);
1200 module_exit(cpmac_exit);