revert to vlynq bus clock divisor guessing
[openwrt/svn-archive/archive.git] / target / linux / ar7 / files / arch / mips / ar7 / platform.c
1 /*
2 * Copyright (C) 2006, 2007 OpenWrt.org
3 *
4 * This program is free software; you can redistribute it and/or modify
5 * it under the terms of the GNU General Public License as published by
6 * the Free Software Foundation; either version 2 of the License, or
7 * (at your option) any later version.
8 *
9 * This program is distributed in the hope that it will be useful,
10 * but WITHOUT ANY WARRANTY; without even the implied warranty of
11 * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
12 * GNU General Public License for more details.
13 *
14 * You should have received a copy of the GNU General Public License
15 * along with this program; if not, write to the Free Software
16 * Foundation, Inc., 51 Franklin St, Fifth Floor, Boston, MA 02110-1301 USA
17 */
18
19 #include <linux/autoconf.h>
20 #include <linux/init.h>
21 #include <linux/types.h>
22 #include <linux/module.h>
23 #include <linux/delay.h>
24 #include <linux/dma-mapping.h>
25 #include <linux/platform_device.h>
26 #include <linux/mtd/physmap.h>
27 #include <linux/serial.h>
28 #include <linux/serial_8250.h>
29 #include <linux/ioport.h>
30 #include <linux/io.h>
31 #include <linux/version.h>
32 #if LINUX_VERSION_CODE >= KERNEL_VERSION(2,6,23)
33 #include <linux/leds.h>
34 #endif
35
36 #include <asm/addrspace.h>
37 #include <asm/ar7/ar7.h>
38 #include <asm/ar7/gpio.h>
39 #include <asm/ar7/prom.h>
40 #include <asm/ar7/vlynq.h>
41
42 struct plat_vlynq_data {
43 struct plat_vlynq_ops ops;
44 int gpio_bit;
45 int reset_bit;
46 };
47
48
49 static int vlynq_on(struct vlynq_device *dev)
50 {
51 int result;
52 struct plat_vlynq_data *pdata = dev->dev.platform_data;
53
54 if ((result = gpio_request(pdata->gpio_bit, "vlynq")))
55 goto out;
56
57 ar7_device_reset(pdata->reset_bit);
58
59 if ((result = ar7_gpio_disable(pdata->gpio_bit)))
60 goto out_enabled;
61
62 if ((result = ar7_gpio_enable(pdata->gpio_bit)))
63 goto out_enabled;
64
65 if ((result = gpio_direction_output(pdata->gpio_bit, 0)))
66 goto out_gpio_enabled;
67
68 mdelay(50);
69
70 gpio_set_value(pdata->gpio_bit, 1);
71 mdelay(50);
72
73 return 0;
74
75 out_gpio_enabled:
76 ar7_gpio_disable(pdata->gpio_bit);
77 out_enabled:
78 ar7_device_disable(pdata->reset_bit);
79 gpio_free(pdata->gpio_bit);
80 out:
81 return result;
82 }
83
84 static void vlynq_off(struct vlynq_device *dev)
85 {
86 struct plat_vlynq_data *pdata = dev->dev.platform_data;
87 ar7_gpio_disable(pdata->gpio_bit);
88 gpio_free(pdata->gpio_bit);
89 ar7_device_disable(pdata->reset_bit);
90 }
91
92 static struct resource physmap_flash_resource = {
93 .name = "mem",
94 .flags = IORESOURCE_MEM,
95 .start = 0x10000000,
96 .end = 0x107fffff,
97 };
98
99 static struct resource cpmac_low_res[] = {
100 {
101 .name = "regs",
102 .flags = IORESOURCE_MEM,
103 .start = AR7_REGS_MAC0,
104 .end = AR7_REGS_MAC0 + 0x7ff,
105 },
106 {
107 .name = "irq",
108 .flags = IORESOURCE_IRQ,
109 .start = 27,
110 .end = 27,
111 },
112 };
113
114 static struct resource cpmac_high_res[] = {
115 {
116 .name = "regs",
117 .flags = IORESOURCE_MEM,
118 .start = AR7_REGS_MAC1,
119 .end = AR7_REGS_MAC1 + 0x7ff,
120 },
121 {
122 .name = "irq",
123 .flags = IORESOURCE_IRQ,
124 .start = 41,
125 .end = 41,
126 },
127 };
128
129 static struct resource vlynq_low_res[] = {
130 {
131 .name = "regs",
132 .flags = IORESOURCE_MEM,
133 .start = AR7_REGS_VLYNQ0,
134 .end = AR7_REGS_VLYNQ0 + 0xff,
135 },
136 {
137 .name = "irq",
138 .flags = IORESOURCE_IRQ,
139 .start = 29,
140 .end = 29,
141 },
142 {
143 .name = "mem",
144 .flags = IORESOURCE_MEM,
145 .start = 0x04000000,
146 .end = 0x04ffffff,
147 },
148 {
149 .name = "devirq",
150 .flags = IORESOURCE_IRQ,
151 .start = 80,
152 .end = 111,
153 },
154 };
155
156 static struct resource vlynq_high_res[] = {
157 {
158 .name = "regs",
159 .flags = IORESOURCE_MEM,
160 .start = AR7_REGS_VLYNQ1,
161 .end = AR7_REGS_VLYNQ1 + 0xff,
162 },
163 {
164 .name = "irq",
165 .flags = IORESOURCE_IRQ,
166 .start = 33,
167 .end = 33,
168 },
169 {
170 .name = "mem",
171 .flags = IORESOURCE_MEM,
172 .start = 0x0c000000,
173 .end = 0x0cffffff,
174 },
175 {
176 .name = "devirq",
177 .flags = IORESOURCE_IRQ,
178 .start = 112,
179 .end = 143,
180 },
181 };
182
183 static struct physmap_flash_data physmap_flash_data = {
184 .width = 2,
185 };
186
187 static struct plat_cpmac_data cpmac_low_data = {
188 .reset_bit = 17,
189 .power_bit = 20,
190 .phy_mask = 0x80000000,
191 };
192
193 static struct plat_cpmac_data cpmac_high_data = {
194 .reset_bit = 21,
195 .power_bit = 22,
196 .phy_mask = 0x7fffffff,
197 };
198
199 static struct plat_vlynq_data vlynq_low_data = {
200 .ops.on = vlynq_on,
201 .ops.off = vlynq_off,
202 .reset_bit = 20,
203 .gpio_bit = 18,
204 };
205
206 static struct plat_vlynq_data vlynq_high_data = {
207 .ops.on = vlynq_on,
208 .ops.off = vlynq_off,
209 .reset_bit = 16,
210 .gpio_bit = 19,
211 };
212
213 static struct platform_device physmap_flash = {
214 .id = 0,
215 .name = "physmap-flash",
216 .dev.platform_data = &physmap_flash_data,
217 .resource = &physmap_flash_resource,
218 .num_resources = 1,
219 };
220
221 static u64 cpmac_dma_mask = DMA_32BIT_MASK;
222 static struct platform_device cpmac_low = {
223 .id = 0,
224 .name = "cpmac",
225 .dev = {
226 .dma_mask = &cpmac_dma_mask,
227 .coherent_dma_mask = DMA_32BIT_MASK,
228 .platform_data = &cpmac_low_data,
229 },
230 .resource = cpmac_low_res,
231 .num_resources = ARRAY_SIZE(cpmac_low_res),
232 };
233
234 static struct platform_device cpmac_high = {
235 .id = 1,
236 .name = "cpmac",
237 .dev = {
238 .dma_mask = &cpmac_dma_mask,
239 .coherent_dma_mask = DMA_32BIT_MASK,
240 .platform_data = &cpmac_high_data,
241 },
242 .resource = cpmac_high_res,
243 .num_resources = ARRAY_SIZE(cpmac_high_res),
244 };
245
246 static struct platform_device vlynq_low = {
247 .id = 0,
248 .name = "vlynq",
249 .dev.platform_data = &vlynq_low_data,
250 .resource = vlynq_low_res,
251 .num_resources = ARRAY_SIZE(vlynq_low_res),
252 };
253
254 static struct platform_device vlynq_high = {
255 .id = 1,
256 .name = "vlynq",
257 .dev.platform_data = &vlynq_high_data,
258 .resource = vlynq_high_res,
259 .num_resources = ARRAY_SIZE(vlynq_high_res),
260 };
261
262
263 /* This is proper way to define uart ports, but they are then detected
264 * as xscale and, obviously, don't work...
265 */
266 #if !defined(CONFIG_SERIAL_8250)
267
268 static struct plat_serial8250_port uart0_data = {
269 .mapbase = AR7_REGS_UART0,
270 .irq = AR7_IRQ_UART0,
271 .regshift = 2,
272 .iotype = UPIO_MEM,
273 .flags = UPF_BOOT_AUTOCONF | UPF_IOREMAP,
274 };
275
276 static struct plat_serial8250_port uart1_data = {
277 .mapbase = UR8_REGS_UART1,
278 .irq = AR7_IRQ_UART1,
279 .regshift = 2,
280 .iotype = UPIO_MEM,
281 .flags = UPF_BOOT_AUTOCONF | UPF_IOREMAP,
282 };
283
284 static struct plat_serial8250_port uart_data[] = {
285 uart0_data,
286 uart1_data,
287 { .flags = 0 }
288 };
289
290 static struct plat_serial8250_port uart_data_single[] = {
291 uart0_data,
292 { .flags = 0 }
293 };
294
295 static struct platform_device uart = {
296 .id = 0,
297 .name = "serial8250",
298 .dev.platform_data = uart_data_single
299 };
300 #endif
301
302 #if LINUX_VERSION_CODE >= KERNEL_VERSION(2,6,23)
303 static struct gpio_led default_leds[] = {
304 { .name = "status", .gpio = 8, .active_low = 1, },
305 };
306
307 static struct gpio_led fb_leds[] = {
308 { .name = "1", .gpio = 7, },
309 { .name = "2", .gpio = 13, .active_low = 1, },
310 { .name = "3", .gpio = 10, .active_low = 1, },
311 { .name = "4", .gpio = 12, .active_low = 1, },
312 { .name = "5", .gpio = 9, .active_low = 1, },
313 };
314
315 static struct gpio_led fb_fon_leds[] = {
316 { .name = "1", .gpio = 8, },
317 { .name = "2", .gpio = 3, .active_low = 1, },
318 { .name = "3", .gpio = 5, },
319 { .name = "4", .gpio = 4, .active_low = 1, },
320 { .name = "5", .gpio = 11, .active_low = 1, },
321 };
322
323 static struct gpio_led_platform_data ar7_led_data;
324
325 static struct platform_device ar7_gpio_leds = {
326 .name = "leds-gpio",
327 .id = -1,
328 .dev = {
329 .platform_data = &ar7_led_data,
330 }
331 };
332 #endif
333
334 static inline unsigned char char2hex(char h)
335 {
336 switch (h) {
337 case '0': case '1': case '2': case '3': case '4':
338 case '5': case '6': case '7': case '8': case '9':
339 return h - '0';
340 case 'A': case 'B': case 'C': case 'D': case 'E': case 'F':
341 return h - 'A' + 10;
342 case 'a': case 'b': case 'c': case 'd': case 'e': case 'f':
343 return h - 'a' + 10;
344 default:
345 return 0;
346 }
347 }
348
349 static void cpmac_get_mac(int instance, unsigned char *dev_addr)
350 {
351 int i;
352 char name[5], default_mac[] = "00:00:00:12:34:56", *mac;
353
354 mac = NULL;
355 sprintf(name, "mac%c", 'a' + instance);
356 mac = prom_getenv(name);
357 if (!mac) {
358 sprintf(name, "mac%c", 'a');
359 mac = prom_getenv(name);
360 }
361 if (!mac)
362 mac = default_mac;
363 for (i = 0; i < 6; i++)
364 dev_addr[i] = (char2hex(mac[i * 3]) << 4) +
365 char2hex(mac[i * 3 + 1]);
366 }
367
368 static int __init ar7_register_devices(void)
369 {
370 int res;
371
372 #ifdef CONFIG_SERIAL_8250
373
374 static struct uart_port uart_port[2];
375
376 memset(uart_port, 0, sizeof(struct uart_port) * 2);
377
378 uart_port[0].type = PORT_AR7;
379 uart_port[0].line = 0;
380 uart_port[0].irq = AR7_IRQ_UART0;
381 uart_port[0].uartclk = ar7_bus_freq() / 2;
382 uart_port[0].iotype = UPIO_MEM;
383 uart_port[0].mapbase = AR7_REGS_UART0;
384 uart_port[0].membase = ioremap(uart_port[0].mapbase, 256);
385 uart_port[0].regshift = 2;
386 res = early_serial_setup(&uart_port[0]);
387 if (res)
388 return res;
389
390
391 /* Only TNETD73xx have a second serial port */
392 if (ar7_has_second_uart()) {
393 uart_port[1].type = PORT_AR7;
394 uart_port[1].line = 1;
395 uart_port[1].irq = AR7_IRQ_UART1;
396 uart_port[1].uartclk = ar7_bus_freq() / 2;
397 uart_port[1].iotype = UPIO_MEM;
398 uart_port[1].mapbase = UR8_REGS_UART1;
399 uart_port[1].membase = ioremap(uart_port[1].mapbase, 256);
400 uart_port[1].regshift = 2;
401 res = early_serial_setup(&uart_port[1]);
402 if (res)
403 return res;
404 }
405
406 #else /* !CONFIG_SERIAL_8250 */
407
408 uart_data[0].uartclk = ar7_bus_freq() / 2;
409 uart_data[1].uartclk = uart_data[0].uartclk;
410
411 /* Only TNETD73xx have a second serial port */
412 if (ar7_has_second_uart())
413 uart.dev.platform_data = uart_data;
414
415 res = platform_device_register(&uart);
416 if (res)
417 return res;
418
419 #endif /* CONFIG_SERIAL_8250 */
420
421 res = platform_device_register(&physmap_flash);
422 if (res)
423 return res;
424
425 res = platform_device_register(&vlynq_low);
426 if (res)
427 return res;
428
429 ar7_device_disable(vlynq_low_data.reset_bit);
430 if (ar7_has_high_vlynq()) {
431 ar7_device_disable(vlynq_high_data.reset_bit);
432 res = platform_device_register(&vlynq_high);
433 if (res)
434 return res;
435 }
436
437 if (ar7_has_high_cpmac()) {
438 cpmac_get_mac(1, cpmac_high_data.dev_addr);
439 res = platform_device_register(&cpmac_high);
440 if (res)
441 return res;
442 } else {
443 cpmac_low_data.phy_mask = 0xffffffff;
444 }
445
446 cpmac_get_mac(0, cpmac_low_data.dev_addr);
447 res = platform_device_register(&cpmac_low);
448 if (res)
449 return res;
450
451 #if LINUX_VERSION_CODE >= KERNEL_VERSION(2,6,23)
452 #warning FIXME: add model detection
453 ar7_led_data.num_leds = ARRAY_SIZE(default_leds);
454 ar7_led_data.leds = default_leds;
455 res = platform_device_register(&ar7_gpio_leds);
456 #endif
457 return res;
458 }
459
460
461 arch_initcall(ar7_register_devices);