7a640dbef7568014281f5519e76c169b17edf4d0
[openwrt/svn-archive/archive.git] / target / linux / ar7 / files / arch / mips / ar7 / vlynq-pci.c
1 /*
2 * Copyright (C) 2006, 2007 OpenWrt.org
3 *
4 * This program is free software; you can redistribute it and/or modify
5 * it under the terms of the GNU General Public License as published by
6 * the Free Software Foundation; either version 2 of the License, or
7 * (at your option) any later version.
8 *
9 * This program is distributed in the hope that it will be useful,
10 * but WITHOUT ANY WARRANTY; without even the implied warranty of
11 * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
12 * GNU General Public License for more details.
13 *
14 * You should have received a copy of the GNU General Public License
15 * along with this program; if not, write to the Free Software
16 * Foundation, Inc., 51 Franklin St, Fifth Floor, Boston, MA 02110-1301 USA
17 */
18
19 #include <linux/types.h>
20 #include <linux/pci.h>
21 #include <linux/kernel.h>
22 #include <linux/init.h>
23 #include <linux/irq.h>
24 #include <asm/ar7/vlynq.h>
25
26 #define VLYNQ_PCI_SLOTS 2
27
28 struct vlynq_reg_config {
29 u32 offset;
30 u32 value;
31 };
32
33 struct vlynq_pci_config {
34 u32 chip_id;
35 char name[32];
36 struct vlynq_mapping rx_mapping[4];
37 int irq;
38 int irq_type;
39 u32 chip;
40 u32 class;
41 int num_regs;
42 struct vlynq_reg_config regs[10];
43 };
44
45 struct vlynq_pci_private {
46 u32 latency;
47 u32 cache_line;
48 u32 command;
49 u32 sz_mask;
50 struct vlynq_pci_config *config;
51 };
52
53 static struct vlynq_pci_config known_devices[] = {
54 {
55 .chip_id = 0x00000009, .name = "TI TNETW1130",
56 .rx_mapping = {
57 { .size = 0x22000, .offset = 0xf0000000 },
58 { .size = 0x40000, .offset = 0xc0000000 },
59 { .size = 0x0, .offset = 0x0 },
60 { .size = 0x0, .offset = 0x0 },
61 },
62 .irq = 0, .chip = 0x9066104c,
63 .irq_type = IRQ_TYPE_EDGE_RISING,
64 .class = PCI_CLASS_NETWORK_OTHER,
65 .num_regs = 5,
66 .regs = {
67 {
68 .offset = 0x790,
69 .value = (0xd0000000 - PHYS_OFFSET)
70 },
71 {
72 .offset = 0x794,
73 .value = (0xd0000000 - PHYS_OFFSET)
74 },
75 { .offset = 0x740, .value = 0 },
76 { .offset = 0x744, .value = 0x00010000 },
77 { .offset = 0x764, .value = 0x00010000 },
78 },
79 },
80 {
81 .chip_id = 0x00000029, .name = "TI TNETW1350",
82 .rx_mapping = {
83 { .size = 0x100000, .offset = 0x00300000 },
84 { .size = 0x80000, .offset = 0x00000000 },
85 { .size = 0x0, .offset = 0x0 },
86 { .size = 0x0, .offset = 0x0 },
87 },
88 .irq = 0, .chip = 0x9066104c,
89 .irq_type = IRQ_TYPE_EDGE_RISING,
90 .class = PCI_CLASS_NETWORK_OTHER,
91 .num_regs = 5,
92 .regs = {
93 {
94 .offset = 0x790,
95 .value = (0x60000000 - PHYS_OFFSET)
96 },
97 {
98 .offset = 0x794,
99 .value = (0x60000000 - PHYS_OFFSET)
100 },
101 { .offset = 0x740, .value = 0 },
102 { .offset = 0x744, .value = 0x00010000 },
103 { .offset = 0x764, .value = 0x00010000 },
104 },
105 },
106 };
107
108 static struct vlynq_device *slots[VLYNQ_PCI_SLOTS] = { NULL, };
109
110 static struct resource vlynq_io_resource = {
111 .start = 0x00000000,
112 .end = 0x00000000,
113 .name = "pci IO space",
114 .flags = IORESOURCE_IO
115 };
116
117 static struct resource vlynq_mem_resource = {
118 .start = 0x00000000,
119 .end = 0x00000000,
120 .name = "pci memory space",
121 .flags = IORESOURCE_MEM
122 };
123
124 static inline u32 vlynq_get_mapped(struct vlynq_device *dev, int res)
125 {
126 int i;
127 struct vlynq_pci_private *priv = dev->priv;
128 u32 ret = dev->mem_start;
129 if (!priv->config->rx_mapping[res].size) return 0;
130 for (i = 0; i < res; i++)
131 ret += priv->config->rx_mapping[i].size;
132
133 return ret;
134 }
135
136 static inline u32 vlynq_read(u32 val, int size)
137 {
138 switch (size) {
139 case 1:
140 return *(u8 *)&val;
141 case 2:
142 return *(u16 *)&val;
143 }
144 return val;
145 }
146
147 static int vlynq_config_read(struct pci_bus *bus, unsigned int devfn,
148 int where, int size, u32 *val)
149 {
150 struct vlynq_device *dev;
151 struct vlynq_pci_private *priv;
152 int resno, slot = PCI_SLOT(devfn);
153
154 if ((size == 2) && (where & 1))
155 return PCIBIOS_BAD_REGISTER_NUMBER;
156 else if ((size == 4) && (where & 3))
157 return PCIBIOS_BAD_REGISTER_NUMBER;
158
159 if (slot >= VLYNQ_PCI_SLOTS)
160 return PCIBIOS_DEVICE_NOT_FOUND;
161
162 dev = slots[slot];
163
164 if (!dev || (PCI_FUNC(devfn) > 0))
165 return PCIBIOS_DEVICE_NOT_FOUND;
166
167 priv = dev->priv;
168
169 switch (where) {
170 case PCI_VENDOR_ID:
171 *val = vlynq_read(priv->config->chip, size);
172 break;
173 case PCI_DEVICE_ID:
174 *val = priv->config->chip & 0xffff;
175 case PCI_COMMAND:
176 *val = priv->command;
177 case PCI_STATUS:
178 /* *val = PCI_STATUS_CAP_LIST;*/
179 *val = 0;
180 break;
181 case PCI_CLASS_REVISION:
182 *val = priv->config->class;
183 break;
184 case PCI_LATENCY_TIMER:
185 *val = priv->latency;
186 break;
187 case PCI_HEADER_TYPE:
188 *val = PCI_HEADER_TYPE_NORMAL;
189 break;
190 case PCI_CACHE_LINE_SIZE:
191 *val = priv->cache_line;
192 break;
193 case PCI_BASE_ADDRESS_0:
194 case PCI_BASE_ADDRESS_1:
195 case PCI_BASE_ADDRESS_2:
196 case PCI_BASE_ADDRESS_3:
197 resno = (where - PCI_BASE_ADDRESS_0) >> 2;
198 if (priv->sz_mask & (1 << resno)) {
199 priv->sz_mask &= ~(1 << resno);
200 *val = priv->config->rx_mapping[resno].size;
201 } else {
202 *val = vlynq_get_mapped(dev, resno);
203 }
204 break;
205 case PCI_BASE_ADDRESS_4:
206 case PCI_BASE_ADDRESS_5:
207 case PCI_SUBSYSTEM_VENDOR_ID:
208 case PCI_SUBSYSTEM_ID:
209 case PCI_ROM_ADDRESS:
210 case PCI_INTERRUPT_LINE:
211 case PCI_CARDBUS_CIS:
212 case PCI_CAPABILITY_LIST:
213 *val = 0;
214 break;
215 case PCI_INTERRUPT_PIN:
216 *val = 1;
217 break;
218 default:
219 printk(KERN_NOTICE "%s: Read of unknown register 0x%x "
220 "(size %d)\n", dev->dev.bus_id, where, size);
221 return PCIBIOS_BAD_REGISTER_NUMBER;
222 }
223 return PCIBIOS_SUCCESSFUL;
224 }
225
226 static int vlynq_config_write(struct pci_bus *bus, unsigned int devfn,
227 int where, int size, u32 val)
228 {
229 struct vlynq_device *dev;
230 struct vlynq_pci_private *priv;
231 int resno, slot = PCI_SLOT(devfn);
232
233 if ((size == 2) && (where & 1))
234 return PCIBIOS_BAD_REGISTER_NUMBER;
235 else if ((size == 4) && (where & 3))
236 return PCIBIOS_BAD_REGISTER_NUMBER;
237
238 if (slot >= VLYNQ_PCI_SLOTS)
239 return PCIBIOS_DEVICE_NOT_FOUND;
240
241 dev = slots[slot];
242
243 if (!dev || (PCI_FUNC(devfn) > 0))
244 return PCIBIOS_DEVICE_NOT_FOUND;
245
246 priv = dev->priv;
247
248 switch (where) {
249 case PCI_VENDOR_ID:
250 case PCI_DEVICE_ID:
251 case PCI_STATUS:
252 case PCI_CLASS_REVISION:
253 case PCI_HEADER_TYPE:
254 case PCI_CACHE_LINE_SIZE:
255 case PCI_SUBSYSTEM_VENDOR_ID:
256 case PCI_SUBSYSTEM_ID:
257 case PCI_INTERRUPT_LINE:
258 case PCI_INTERRUPT_PIN:
259 case PCI_CARDBUS_CIS:
260 case PCI_CAPABILITY_LIST:
261 return PCIBIOS_FUNC_NOT_SUPPORTED;
262 case PCI_COMMAND:
263 priv->command = val;
264 case PCI_LATENCY_TIMER:
265 priv->latency = val;
266 break;
267 case PCI_BASE_ADDRESS_0:
268 case PCI_BASE_ADDRESS_1:
269 case PCI_BASE_ADDRESS_2:
270 case PCI_BASE_ADDRESS_3:
271 if (val == 0xffffffff) {
272 resno = (where - PCI_BASE_ADDRESS_0) >> 2;
273 priv->sz_mask |= (1 << resno);
274 break;
275 }
276 case PCI_BASE_ADDRESS_4:
277 case PCI_BASE_ADDRESS_5:
278 case PCI_ROM_ADDRESS:
279 break;
280 default:
281 printk(KERN_NOTICE "%s: Write to unknown register 0x%x "
282 "(size %d) value=0x%x\n", dev->dev.bus_id, where, size,
283 val);
284 return PCIBIOS_BAD_REGISTER_NUMBER;
285 }
286 return PCIBIOS_SUCCESSFUL;
287 }
288
289 static struct pci_ops vlynq_pci_ops = {
290 vlynq_config_read,
291 vlynq_config_write
292 };
293
294 static struct pci_controller vlynq_controller = {
295 .pci_ops = &vlynq_pci_ops,
296 .io_resource = &vlynq_io_resource,
297 .mem_resource = &vlynq_mem_resource,
298 };
299
300 static int vlynq_pci_probe(struct vlynq_device *dev)
301 {
302 int result, i;
303 u32 chip_id, addr;
304 struct vlynq_pci_private *priv;
305 struct vlynq_mapping mapping[4] = { { 0, }, };
306 struct vlynq_pci_config *config = NULL;
307
308 result = vlynq_set_local_irq(dev, 31);
309 if (result)
310 return result;
311
312 result = vlynq_set_remote_irq(dev, 30);
313 if (result)
314 return result;
315
316 dev->divisor = vlynq_div_auto;
317 result = vlynq_device_enable(dev);
318 if (result)
319 return result;
320
321 chip_id = vlynq_remote_id(dev);
322 for (i = 0; i < ARRAY_SIZE(known_devices); i++)
323 if (chip_id == known_devices[i].chip_id)
324 config = &known_devices[i];
325
326 if (!config) {
327 printk(KERN_DEBUG "vlynq-pci: skipping unknown device "
328 "%04x:%04x at %s\n", chip_id >> 16,
329 chip_id & 0xffff, dev->dev.bus_id);
330 result = -ENODEV;
331 goto fail;
332 }
333
334 printk(KERN_NOTICE "vlynq-pci: attaching device %s at %s\n",
335 config->name, dev->dev.bus_id);
336
337 priv = kzalloc(sizeof(*priv), GFP_KERNEL);
338 if (!priv) {
339 printk(KERN_ERR "%s: failed to allocate private data\n",
340 dev->dev.bus_id);
341 result = -ENOMEM;
342 goto fail;
343 }
344
345 priv->latency = 64;
346 priv->cache_line = 32;
347 priv->config = config;
348
349 mapping[0].offset = ARCH_PFN_OFFSET << PAGE_SHIFT;
350 mapping[0].size = 0x02000000;
351 vlynq_set_local_mapping(dev, dev->mem_start, mapping);
352 vlynq_set_remote_mapping(dev, 0, config->rx_mapping);
353
354 set_irq_type(vlynq_virq_to_irq(dev, config->irq), config->irq_type);
355
356 addr = (u32)ioremap_nocache(dev->mem_start, 0x10000);
357 if (!addr) {
358 printk(KERN_ERR "%s: failed to remap io memory\n",
359 dev->dev.bus_id);
360 result = -ENXIO;
361 goto fail;
362 }
363
364 for (i = 0; i < config->num_regs; i++)
365 iowrite32(config->regs[i].value,
366 (u32 *)(addr + config->regs[i].offset));
367
368 dev->priv = priv;
369 for (i = 0; i < VLYNQ_PCI_SLOTS; i++) {
370 if (!slots[i]) {
371 slots[i] = dev;
372 break;
373 }
374 }
375
376 return 0;
377
378 fail:
379 vlynq_device_disable(dev);
380
381 return result;
382 }
383
384 static int vlynq_pci_remove(struct vlynq_device *dev)
385 {
386 int i;
387 struct vlynq_pci_private *priv = dev->priv;
388
389 for (i = 0; i < VLYNQ_PCI_SLOTS; i++)
390 if (slots[i] == dev)
391 slots[i] = NULL;
392
393 vlynq_device_disable(dev);
394 kfree(priv);
395
396 return 0;
397 }
398
399 static struct vlynq_driver vlynq_pci = {
400 .name = "PCI over VLYNQ emulation",
401 .probe = vlynq_pci_probe,
402 .remove = vlynq_pci_remove,
403 };
404
405 int vlynq_pci_init(void)
406 {
407 int res;
408 res = vlynq_register_driver(&vlynq_pci);
409 if (res)
410 return res;
411
412 register_pci_controller(&vlynq_controller);
413
414 return 0;
415 }
416
417 int pcibios_map_irq(struct pci_dev *pdev, u8 slot, u8 pin)
418 {
419 struct vlynq_device *dev;
420 struct vlynq_pci_private *priv;
421
422 dev = slots[slot];
423
424 if (!dev)
425 return 0;
426
427 priv = dev->priv;
428
429 return vlynq_virq_to_irq(dev, priv->config->irq);
430 }
431
432 /* Do platform specific device initialization at pci_enable_device() time */
433 int pcibios_plat_dev_init(struct pci_dev *dev)
434 {
435 return 0;
436 }