target/linux/ar7/patches-2.6.37/100-titan-gpio-size.patch

   1 commit 3e9957b4866f3767f19bf0e543b322ad7906c564
   2 Author: Florian Fainelli <florian@openwrt.org>
   3 Date:   Fri May 13 17:41:21 2011 +0200
   4
   5     MIPS: AR7: Fix GPIO register size for Titan variant.
   6
   7     The 'size' variable contains the correct register size for both AR7
   8     and Titan, but we never used it to ioremap the correct register size.
   9     This problem only shows up on Titan.
  10
  11     [ralf@linux-mips.org: Fixed the fix.  The original patch as in patchwork
  12     recognizes the problem correctly then fails to fix it ...]
  13
  14     Reported-by: Alexander Clouter <alex@digriz.org.uk>
  15     Signed-off-by: Florian Fainelli <florian@openwrt.org>
  16     Patchwork: https://patchwork.linux-mips.org/patch/2380/
  17     Signed-off-by: Ralf Baechle <ralf@linux-mips.org>
  18
  19 diff --git a/arch/mips/ar7/gpio.c b/arch/mips/ar7/gpio.c
  20 index 425dfa5..bb571bc 100644
  21 --- a/arch/mips/ar7/gpio.c
  22 +++ b/arch/mips/ar7/gpio.c
  23 @@ -325,9 +325,7 @@ int __init ar7_gpio_init(void)
  24                 size = 0x1f;
  25         }
  26
  27 -       gpch->regs = ioremap_nocache(AR7_REGS_GPIO,
  28 -                                       AR7_REGS_GPIO + 0x10);
  29 -
  30 +       gpch->regs = ioremap_nocache(AR7_REGS_GPIO, size);
  31         if (!gpch->regs) {
  32                 printk(KERN_ERR "%s: failed to ioremap regs\n",
  33                                         gpch->chip.label);