[ar7] enable mvswitch driver
[openwrt/svn-archive/archive.git] / target / linux / ar7 / patches-3.3 / 972-cpmac_fixup.patch
1 Index: linux-3.3.8/arch/mips/ar7/platform.c
2 ===================================================================
3 --- linux-3.3.8.orig/arch/mips/ar7/platform.c 2012-10-06 21:15:51.930451885 -0700
4 +++ linux-3.3.8/arch/mips/ar7/platform.c 2012-10-06 21:15:51.962452050 -0700
5 @@ -33,7 +33,6 @@
6 #include <linux/string.h>
7 #include <linux/etherdevice.h>
8 #include <linux/phy.h>
9 -#include <linux/phy_fixed.h>
10 #include <linux/gpio.h>
11 #include <linux/clk.h>
12
13 @@ -248,12 +247,6 @@
14 },
15 };
16
17 -static struct fixed_phy_status fixed_phy_status __initdata = {
18 - .link = 1,
19 - .speed = 100,
20 - .duplex = 1,
21 -};
22 -
23 static struct plat_cpmac_data cpmac_low_data = {
24 .reset_bit = 17,
25 .power_bit = 20,
26 @@ -709,26 +702,19 @@
27 }
28
29 if (ar7_has_high_cpmac()) {
30 - res = fixed_phy_add(PHY_POLL, cpmac_high.id, &fixed_phy_status);
31 - if (!res) {
32 - cpmac_get_mac(1, cpmac_high_data.dev_addr);
33 -
34 - res = platform_device_register(&cpmac_high);
35 - if (res)
36 - pr_warning("unable to register cpmac-high: %d\n", res);
37 - } else
38 - pr_warning("unable to add cpmac-high phy: %d\n", res);
39 - } else
40 - cpmac_low_data.phy_mask = 0xffffffff;
41 + cpmac_get_mac(0, cpmac_high_data.dev_addr);
42
43 - res = fixed_phy_add(PHY_POLL, cpmac_low.id, &fixed_phy_status);
44 - if (!res) {
45 - cpmac_get_mac(0, cpmac_low_data.dev_addr);
46 - res = platform_device_register(&cpmac_low);
47 + res = platform_device_register(&cpmac_high);
48 if (res)
49 - pr_warning("unable to register cpmac-low: %d\n", res);
50 - } else
51 - pr_warning("unable to add cpmac-low phy: %d\n", res);
52 + pr_warning("unable to register cpmac-high: %d\n", res);
53 + cpmac_get_mac(1, cpmac_low_data.dev_addr);
54 + } else {
55 + cpmac_low_data.phy_mask = 0xffffffff;
56 + cpmac_get_mac(0, cpmac_low_data.dev_addr);
57 + }
58 + res = platform_device_register(&cpmac_low);
59 + if (res)
60 + pr_warning("unable to register cpmac-low: %d\n", res);
61
62 detect_leds();
63 res = platform_device_register(&ar7_gpio_leds);
64 @@ -741,8 +727,10 @@
65
66 /* Register watchdog only if enabled in hardware */
67 bootcr = ioremap_nocache(AR7_REGS_DCL, 4);
68 - val = readl(bootcr);
69 - iounmap(bootcr);
70 + if (bootcr) {
71 + val = readl(bootcr);
72 + iounmap(bootcr);
73 + }
74 if (val & AR7_WDT_HW_ENA) {
75 if (ar7_has_high_vlynq())
76 ar7_wdt_res.start = UR8_REGS_WDT;
77 Index: linux-3.3.8/arch/mips/include/asm/mach-ar7/ar7.h
78 ===================================================================
79 --- linux-3.3.8.orig/arch/mips/include/asm/mach-ar7/ar7.h 2012-06-01 00:16:13.000000000 -0700
80 +++ linux-3.3.8/arch/mips/include/asm/mach-ar7/ar7.h 2012-10-06 21:15:51.966452059 -0700
81 @@ -42,6 +42,7 @@
82 #define AR7_REGS_PINSEL (AR7_REGS_BASE + 0x160C)
83 #define AR7_REGS_VLYNQ0 (AR7_REGS_BASE + 0x1800)
84 #define AR7_REGS_DCL (AR7_REGS_BASE + 0x1a00)
85 +#define AR7_REGS_MII (AR7_REGS_BASE + 0x1a08)
86 #define AR7_REGS_VLYNQ1 (AR7_REGS_BASE + 0x1c00)
87 #define AR7_REGS_MDIO (AR7_REGS_BASE + 0x1e00)
88 #define AR7_REGS_IRQ (AR7_REGS_BASE + 0x2400)
89 Index: linux-3.3.8/drivers/net/ethernet/ti/cpmac.c
90 ===================================================================
91 --- linux-3.3.8.orig/drivers/net/ethernet/ti/cpmac.c 2012-10-06 21:15:51.946451965 -0700
92 +++ linux-3.3.8/drivers/net/ethernet/ti/cpmac.c 2012-10-11 11:23:17.459719956 -0700
93 @@ -35,7 +35,6 @@
94 #include <linux/skbuff.h>
95 #include <linux/mii.h>
96 #include <linux/phy.h>
97 -#include <linux/phy_fixed.h>
98 #include <linux/platform_device.h>
99 #include <linux/dma-mapping.h>
100 #include <linux/clk.h>
101 @@ -48,14 +47,11 @@
102 MODULE_ALIAS("platform:cpmac");
103
104 static int debug_level = 8;
105 -static int dumb_switch;
106
107 -/* Next 2 are only used in cpmac_probe, so it's pointless to change them */
108 +/* Next is only used in cpmac_probe, so it's pointless to change them */
109 module_param(debug_level, int, 0444);
110 -module_param(dumb_switch, int, 0444);
111
112 MODULE_PARM_DESC(debug_level, "Number of NETIF_MSG bits to enable");
113 -MODULE_PARM_DESC(dumb_switch, "Assume switch is not connected to MDIO bus");
114
115 #define CPMAC_VERSION "0.5.2"
116 /* frame size + 802.1q tag + FCS size */
117 @@ -674,9 +670,8 @@
118 for (i = 0; i < 8; i++)
119 cpmac_write(priv->regs, CPMAC_MAC_ADDR_LO(i), dev->dev_addr[5]);
120 cpmac_write(priv->regs, CPMAC_MAC_ADDR_MID, dev->dev_addr[4]);
121 - cpmac_write(priv->regs, CPMAC_MAC_ADDR_HI, dev->dev_addr[0] |
122 - (dev->dev_addr[1] << 8) | (dev->dev_addr[2] << 16) |
123 - (dev->dev_addr[3] << 24));
124 + cpmac_write(priv->regs, CPMAC_MAC_ADDR_HI, be32_to_cpu(*(u32 *)
125 + dev->dev_addr));
126 cpmac_write(priv->regs, CPMAC_MAX_LENGTH, CPMAC_SKB_SIZE);
127 cpmac_write(priv->regs, CPMAC_UNICAST_CLEAR, 0xff);
128 cpmac_write(priv->regs, CPMAC_RX_INT_CLEAR, 0xff);
129 @@ -1121,25 +1116,18 @@
130
131 pdata = pdev->dev.platform_data;
132
133 - if (external_switch || dumb_switch) {
134 - strncpy(mdio_bus_id, "fixed-0", MII_BUS_ID_SIZE); /* fixed phys bus */
135 - phy_id = pdev->id;
136 - } else {
137 - for (phy_id = 0; phy_id < PHY_MAX_ADDR; phy_id++) {
138 - if (!(pdata->phy_mask & (1 << phy_id)))
139 - continue;
140 - if (!cpmac_mii->phy_map[phy_id])
141 - continue;
142 - strncpy(mdio_bus_id, cpmac_mii->id, MII_BUS_ID_SIZE);
143 - break;
144 - }
145 + for (phy_id = 0; phy_id < PHY_MAX_ADDR; phy_id++) {
146 + if (!(pdata->phy_mask & (1 << phy_id)))
147 + continue;
148 + if (!cpmac_mii->phy_map[phy_id])
149 + continue;
150 + strncpy(mdio_bus_id, cpmac_mii->id, MII_BUS_ID_SIZE);
151 + break;
152 }
153
154 if (phy_id == PHY_MAX_ADDR) {
155 - dev_err(&pdev->dev, "no PHY present, falling back "
156 - "to switch on MDIO bus 0\n");
157 - strncpy(mdio_bus_id, "fixed-0", MII_BUS_ID_SIZE); /* fixed phys bus */
158 - phy_id = pdev->id;
159 + printk(KERN_ERR "cpmac: No PHY present\n");
160 + return -ENXIO;
161 }
162
163 dev = alloc_etherdev_mq(sizeof(*priv), CPMAC_QUEUES);
164 @@ -1178,6 +1166,13 @@
165 snprintf(priv->phy_name, MII_BUS_ID_SIZE, PHY_ID_FMT,
166 mdio_bus_id, phy_id);
167
168 + rc = register_netdev(dev);
169 + if (rc) {
170 + printk(KERN_ERR "cpmac: error %i registering device %s\n", rc,
171 + dev->name);
172 + goto fail;
173 + }
174 +
175 priv->phy = phy_connect(dev, priv->phy_name, cpmac_adjust_link, 0,
176 PHY_INTERFACE_MODE_MII);
177
178 @@ -1189,13 +1184,6 @@
179 goto fail;
180 }
181
182 - rc = register_netdev(dev);
183 - if (rc) {
184 - printk(KERN_ERR "cpmac: error %i registering device %s\n", rc,
185 - dev->name);
186 - goto fail;
187 - }
188 -
189 if (netif_msg_probe(priv)) {
190 printk(KERN_INFO
191 "cpmac: device %s (regs: %p, irq: %d, phy: %s, "
192 @@ -1228,6 +1216,7 @@
193 {
194 u32 mask;
195 int i, res;
196 + void __iomem *mii_reg;
197
198 cpmac_mii = mdiobus_alloc();
199 if (cpmac_mii == NULL)
200 @@ -1251,31 +1240,51 @@
201 ar7_gpio_disable(26);
202 ar7_gpio_disable(27);
203
204 - if (!ar7_is_titan()) {
205 + if (ar7_is_titan()) {
206 + ar7_device_reset(AR7_RESET_BIT_EPHY);
207 + ar7_device_reset(TITAN_RESET_BIT_EPHY1);
208 + } else {
209 + ar7_device_reset(AR7_RESET_BIT_EPHY);
210 ar7_device_reset(AR7_RESET_BIT_CPMAC_LO);
211 ar7_device_reset(AR7_RESET_BIT_CPMAC_HI);
212 }
213 - ar7_device_reset(AR7_RESET_BIT_EPHY);
214 -
215 - if (ar7_is_titan())
216 - ar7_device_reset(TITAN_RESET_BIT_EPHY1);
217
218 cpmac_mii->reset(cpmac_mii);
219
220 for (i = 0; i < 300; i++) {
221 mask = cpmac_read(cpmac_mii->priv, CPMAC_MDIO_ALIVE);
222 + mask &= ar7_is_titan()? ~(0x80000000 | 0x40000000) : ~(0x80000000);
223 if (mask)
224 break;
225 else
226 msleep(10);
227 }
228
229 - mask &= 0x7fffffff;
230 if (mask & (mask - 1)) {
231 external_switch = 1;
232 - mask = 0;
233 + if (!ar7_has_high_cpmac()) {
234 + if (ar7_is_titan()) {
235 + ar7_device_disable(AR7_RESET_BIT_EPHY);
236 + ar7_device_disable(TITAN_RESET_BIT_EPHY1);
237 + } else
238 + ar7_device_disable(AR7_RESET_BIT_EPHY);
239 +
240 + //Titan remap might be different
241 + mii_reg = ioremap(AR7_REGS_MII, 4);
242 + if (mii_reg) {
243 + writel(readl(mii_reg) | 1, mii_reg);
244 + iounmap(mii_reg);
245 + }
246 + }
247 }
248
249 + if (external_switch)
250 + printk(KERN_INFO "EXTERNAL SWITCH!!!\n");
251 + else if (mask)
252 + printk(KERN_INFO "EXTERNAL PHY!!!\n");
253 + else
254 + printk(KERN_INFO "INTERNAL PHY!!!\n");
255 +
256 if (ar7_is_titan())
257 cpmac_mii->phy_mask = ~(mask | 0x80000000 | 0x40000000);
258 else