ar71xx: move arch specific files to files-2.6.39
[openwrt/svn-archive/archive.git] / target / linux / ar71xx / files-2.6.39 / arch / mips / ar71xx / mach-rb4xx.c
1 /*
2 * MikroTik RouterBOARD 4xx series support
3 *
4 * Copyright (C) 2008-2010 Gabor Juhos <juhosg@openwrt.org>
5 * Copyright (C) 2008 Imre Kaloz <kaloz@openwrt.org>
6 *
7 * This program is free software; you can redistribute it and/or modify it
8 * under the terms of the GNU General Public License version 2 as published
9 * by the Free Software Foundation.
10 */
11
12 #include <linux/platform_device.h>
13 #include <linux/irq.h>
14 #include <linux/mdio-gpio.h>
15 #include <linux/mmc/host.h>
16 #include <linux/spi/spi.h>
17 #include <linux/spi/flash.h>
18 #include <linux/spi/mmc_spi.h>
19 #include <linux/mtd/mtd.h>
20 #include <linux/mtd/partitions.h>
21
22 #include <asm/mach-ar71xx/ar71xx.h>
23 #include <asm/mach-ar71xx/pci.h>
24 #include <asm/mach-ar71xx/rb4xx_cpld.h>
25
26 #include "machtype.h"
27 #include "devices.h"
28 #include "dev-gpio-buttons.h"
29 #include "dev-leds-gpio.h"
30 #include "dev-usb.h"
31
32 #define RB4XX_GPIO_USER_LED 4
33 #define RB4XX_GPIO_RESET_SWITCH 7
34
35 #define RB4XX_GPIO_CPLD_BASE 32
36 #define RB4XX_GPIO_CPLD_LED1 (RB4XX_GPIO_CPLD_BASE + CPLD_GPIO_nLED1)
37 #define RB4XX_GPIO_CPLD_LED2 (RB4XX_GPIO_CPLD_BASE + CPLD_GPIO_nLED2)
38 #define RB4XX_GPIO_CPLD_LED3 (RB4XX_GPIO_CPLD_BASE + CPLD_GPIO_nLED3)
39 #define RB4XX_GPIO_CPLD_LED4 (RB4XX_GPIO_CPLD_BASE + CPLD_GPIO_nLED4)
40 #define RB4XX_GPIO_CPLD_LED5 (RB4XX_GPIO_CPLD_BASE + CPLD_GPIO_nLED5)
41
42 #define RB4XX_KEYS_POLL_INTERVAL 20 /* msecs */
43 #define RB4XX_KEYS_DEBOUNCE_INTERVAL (3 * RB4XX_KEYS_POLL_INTERVAL)
44
45 static struct gpio_led rb4xx_leds_gpio[] __initdata = {
46 {
47 .name = "rb4xx:yellow:user",
48 .gpio = RB4XX_GPIO_USER_LED,
49 .active_low = 0,
50 }, {
51 .name = "rb4xx:green:led1",
52 .gpio = RB4XX_GPIO_CPLD_LED1,
53 .active_low = 1,
54 }, {
55 .name = "rb4xx:green:led2",
56 .gpio = RB4XX_GPIO_CPLD_LED2,
57 .active_low = 1,
58 }, {
59 .name = "rb4xx:green:led3",
60 .gpio = RB4XX_GPIO_CPLD_LED3,
61 .active_low = 1,
62 }, {
63 .name = "rb4xx:green:led4",
64 .gpio = RB4XX_GPIO_CPLD_LED4,
65 .active_low = 1,
66 }, {
67 .name = "rb4xx:green:led5",
68 .gpio = RB4XX_GPIO_CPLD_LED5,
69 .active_low = 0,
70 },
71 };
72
73 static struct gpio_keys_button rb4xx_gpio_keys[] __initdata = {
74 {
75 .desc = "reset_switch",
76 .type = EV_KEY,
77 .code = KEY_RESTART,
78 .debounce_interval = RB4XX_KEYS_DEBOUNCE_INTERVAL,
79 .gpio = RB4XX_GPIO_RESET_SWITCH,
80 .active_low = 1,
81 }
82 };
83
84 static struct platform_device rb4xx_nand_device = {
85 .name = "rb4xx-nand",
86 .id = -1,
87 };
88
89 static struct ar71xx_pci_irq rb4xx_pci_irqs[] __initdata = {
90 {
91 .slot = 0,
92 .pin = 1,
93 .irq = AR71XX_PCI_IRQ_DEV2,
94 }, {
95 .slot = 1,
96 .pin = 1,
97 .irq = AR71XX_PCI_IRQ_DEV0,
98 }, {
99 .slot = 1,
100 .pin = 2,
101 .irq = AR71XX_PCI_IRQ_DEV1,
102 }, {
103 .slot = 2,
104 .pin = 1,
105 .irq = AR71XX_PCI_IRQ_DEV1,
106 }, {
107 .slot = 3,
108 .pin = 1,
109 .irq = AR71XX_PCI_IRQ_DEV2,
110 }
111 };
112
113 #ifdef CONFIG_MTD_PARTITIONS
114 static struct mtd_partition rb4xx_partitions[] = {
115 {
116 .name = "routerboot",
117 .offset = 0,
118 .size = 0x0b000,
119 .mask_flags = MTD_WRITEABLE,
120 }, {
121 .name = "hard_config",
122 .offset = 0x0b000,
123 .size = 0x01000,
124 .mask_flags = MTD_WRITEABLE,
125 }, {
126 .name = "bios",
127 .offset = 0x0d000,
128 .size = 0x02000,
129 .mask_flags = MTD_WRITEABLE,
130 }, {
131 .name = "soft_config",
132 .offset = 0x0f000,
133 .size = 0x01000,
134 }
135 };
136 #define rb4xx_num_partitions ARRAY_SIZE(rb4xx_partitions)
137 #else /* CONFIG_MTD_PARTITIONS */
138 #define rb4xx_partitions NULL
139 #define rb4xx_num_partitions 0
140 #endif /* CONFIG_MTD_PARTITIONS */
141
142 static struct flash_platform_data rb4xx_flash_data = {
143 .type = "pm25lv512",
144 .parts = rb4xx_partitions,
145 .nr_parts = rb4xx_num_partitions,
146 };
147
148 static struct rb4xx_cpld_platform_data rb4xx_cpld_data = {
149 .gpio_base = RB4XX_GPIO_CPLD_BASE,
150 };
151
152 static struct mmc_spi_platform_data rb4xx_mmc_data = {
153 .ocr_mask = MMC_VDD_32_33 | MMC_VDD_33_34,
154 };
155
156 static struct spi_board_info rb4xx_spi_info[] = {
157 {
158 .bus_num = 0,
159 .chip_select = 0,
160 .max_speed_hz = 25000000,
161 .modalias = "m25p80",
162 .platform_data = &rb4xx_flash_data,
163 }, {
164 .bus_num = 0,
165 .chip_select = 1,
166 .max_speed_hz = 25000000,
167 .modalias = "spi-rb4xx-cpld",
168 .platform_data = &rb4xx_cpld_data,
169 }
170 };
171
172 static struct spi_board_info rb4xx_microsd_info[] = {
173 {
174 .bus_num = 0,
175 .chip_select = 2,
176 .max_speed_hz = 25000000,
177 .modalias = "mmc_spi",
178 .platform_data = &rb4xx_mmc_data,
179 }
180 };
181
182
183 static struct resource rb4xx_spi_resources[] = {
184 {
185 .start = AR71XX_SPI_BASE,
186 .end = AR71XX_SPI_BASE + AR71XX_SPI_SIZE - 1,
187 .flags = IORESOURCE_MEM,
188 },
189 };
190
191 static struct platform_device rb4xx_spi_device = {
192 .name = "rb4xx-spi",
193 .id = -1,
194 .resource = rb4xx_spi_resources,
195 .num_resources = ARRAY_SIZE(rb4xx_spi_resources),
196 };
197
198 static void __init rb4xx_generic_setup(void)
199 {
200 ar71xx_gpio_function_enable(AR71XX_GPIO_FUNC_SPI_CS1_EN |
201 AR71XX_GPIO_FUNC_SPI_CS2_EN);
202
203 ar71xx_add_device_leds_gpio(-1, ARRAY_SIZE(rb4xx_leds_gpio),
204 rb4xx_leds_gpio);
205
206 ar71xx_register_gpio_keys_polled(-1, RB4XX_KEYS_POLL_INTERVAL,
207 ARRAY_SIZE(rb4xx_gpio_keys),
208 rb4xx_gpio_keys);
209
210 spi_register_board_info(rb4xx_spi_info, ARRAY_SIZE(rb4xx_spi_info));
211 platform_device_register(&rb4xx_spi_device);
212 platform_device_register(&rb4xx_nand_device);
213 }
214
215 static void __init rb411_setup(void)
216 {
217 rb4xx_generic_setup();
218 spi_register_board_info(rb4xx_microsd_info,
219 ARRAY_SIZE(rb4xx_microsd_info));
220
221 ar71xx_add_device_mdio(0, 0xfffffffc);
222
223 ar71xx_init_mac(ar71xx_eth0_data.mac_addr, ar71xx_mac_base, 0);
224 ar71xx_eth0_data.phy_if_mode = PHY_INTERFACE_MODE_MII;
225 ar71xx_eth0_data.phy_mask = 0x00000003;
226
227 ar71xx_add_device_eth(0);
228
229 ar71xx_pci_init(ARRAY_SIZE(rb4xx_pci_irqs), rb4xx_pci_irqs);
230 }
231
232 MIPS_MACHINE(AR71XX_MACH_RB_411, "411", "MikroTik RouterBOARD 411/A/AH",
233 rb411_setup);
234
235 static void __init rb411u_setup(void)
236 {
237 rb411_setup();
238 ar71xx_add_device_usb();
239 }
240
241 MIPS_MACHINE(AR71XX_MACH_RB_411U, "411U", "MikroTik RouterBOARD 411U",
242 rb411u_setup);
243
244 #define RB433_LAN_PHYMASK BIT(0)
245 #define RB433_WAN_PHYMASK BIT(4)
246 #define RB433_MDIO_PHYMASK (RB433_LAN_PHYMASK | RB433_WAN_PHYMASK)
247
248 static void __init rb433_setup(void)
249 {
250 rb4xx_generic_setup();
251 spi_register_board_info(rb4xx_microsd_info,
252 ARRAY_SIZE(rb4xx_microsd_info));
253
254 ar71xx_add_device_mdio(0, ~RB433_MDIO_PHYMASK);
255
256 ar71xx_init_mac(ar71xx_eth0_data.mac_addr, ar71xx_mac_base, 1);
257 ar71xx_eth0_data.phy_if_mode = PHY_INTERFACE_MODE_MII;
258 ar71xx_eth0_data.phy_mask = RB433_LAN_PHYMASK;
259
260 ar71xx_init_mac(ar71xx_eth1_data.mac_addr, ar71xx_mac_base, 0);
261 ar71xx_eth1_data.phy_if_mode = PHY_INTERFACE_MODE_RMII;
262 ar71xx_eth1_data.phy_mask = RB433_WAN_PHYMASK;
263
264 ar71xx_add_device_eth(1);
265 ar71xx_add_device_eth(0);
266
267 ar71xx_pci_init(ARRAY_SIZE(rb4xx_pci_irqs), rb4xx_pci_irqs);
268 }
269
270 MIPS_MACHINE(AR71XX_MACH_RB_433, "433", "MikroTik RouterBOARD 433/AH",
271 rb433_setup);
272
273 static void __init rb433u_setup(void)
274 {
275 rb433_setup();
276 ar71xx_add_device_usb();
277 }
278
279 MIPS_MACHINE(AR71XX_MACH_RB_433U, "433U", "MikroTik RouterBOARD 433UAH",
280 rb433u_setup);
281
282 #define RB450_LAN_PHYMASK BIT(0)
283 #define RB450_WAN_PHYMASK BIT(4)
284 #define RB450_MDIO_PHYMASK (RB450_LAN_PHYMASK | RB450_WAN_PHYMASK)
285
286 static void __init rb450_generic_setup(int gige)
287 {
288 rb4xx_generic_setup();
289 ar71xx_add_device_mdio(0, ~RB450_MDIO_PHYMASK);
290
291 ar71xx_init_mac(ar71xx_eth0_data.mac_addr, ar71xx_mac_base, 1);
292 ar71xx_eth0_data.phy_if_mode = (gige) ?
293 PHY_INTERFACE_MODE_RGMII : PHY_INTERFACE_MODE_MII;
294 ar71xx_eth0_data.phy_mask = RB450_LAN_PHYMASK;
295
296 ar71xx_init_mac(ar71xx_eth1_data.mac_addr, ar71xx_mac_base, 0);
297 ar71xx_eth1_data.phy_if_mode = (gige) ?
298 PHY_INTERFACE_MODE_RGMII : PHY_INTERFACE_MODE_RMII;
299 ar71xx_eth1_data.phy_mask = RB450_WAN_PHYMASK;
300
301 ar71xx_add_device_eth(1);
302 ar71xx_add_device_eth(0);
303 }
304
305 static void __init rb450_setup(void)
306 {
307 rb450_generic_setup(0);
308 }
309
310 MIPS_MACHINE(AR71XX_MACH_RB_450, "450", "MikroTik RouterBOARD 450",
311 rb450_setup);
312
313 static void __init rb450g_setup(void)
314 {
315 rb450_generic_setup(1);
316 spi_register_board_info(rb4xx_microsd_info,
317 ARRAY_SIZE(rb4xx_microsd_info));
318 }
319
320 MIPS_MACHINE(AR71XX_MACH_RB_450G, "450G", "MikroTik RouterBOARD 450G",
321 rb450g_setup);
322
323 static void __init rb493_setup(void)
324 {
325 rb4xx_generic_setup();
326
327 ar71xx_add_device_mdio(0, 0x3fffff00);
328
329 ar71xx_init_mac(ar71xx_eth0_data.mac_addr, ar71xx_mac_base, 0);
330 ar71xx_eth0_data.phy_if_mode = PHY_INTERFACE_MODE_MII;
331 ar71xx_eth0_data.speed = SPEED_100;
332 ar71xx_eth0_data.duplex = DUPLEX_FULL;
333
334 ar71xx_init_mac(ar71xx_eth1_data.mac_addr, ar71xx_mac_base, 1);
335 ar71xx_eth1_data.phy_if_mode = PHY_INTERFACE_MODE_RMII;
336 ar71xx_eth1_data.phy_mask = 0x00000001;
337
338 ar71xx_add_device_eth(0);
339 ar71xx_add_device_eth(1);
340
341 ar71xx_pci_init(ARRAY_SIZE(rb4xx_pci_irqs), rb4xx_pci_irqs);
342 }
343
344 MIPS_MACHINE(AR71XX_MACH_RB_493, "493", "MikroTik RouterBOARD 493/AH",
345 rb493_setup);
346
347 #define RB493G_GPIO_MDIO_MDC 7
348 #define RB493G_GPIO_MDIO_DATA 8
349
350 #define RB493G_MDIO_PHYMASK BIT(0)
351
352 static struct mdio_gpio_platform_data rb493g_mdio_data = {
353 .mdc = RB493G_GPIO_MDIO_MDC,
354 .mdio = RB493G_GPIO_MDIO_DATA,
355
356 .phy_mask = ~RB493G_MDIO_PHYMASK,
357 };
358
359 static struct platform_device rb493g_mdio_device = {
360 .name = "mdio-gpio",
361 .id = -1,
362 .dev = {
363 .platform_data = &rb493g_mdio_data,
364 },
365 };
366
367 static void __init rb493g_setup(void)
368 {
369 ar71xx_gpio_function_enable(AR71XX_GPIO_FUNC_SPI_CS1_EN |
370 AR71XX_GPIO_FUNC_SPI_CS2_EN);
371
372 ar71xx_add_device_leds_gpio(-1, ARRAY_SIZE(rb4xx_leds_gpio),
373 rb4xx_leds_gpio);
374
375 spi_register_board_info(rb4xx_spi_info, ARRAY_SIZE(rb4xx_spi_info));
376 platform_device_register(&rb4xx_spi_device);
377 platform_device_register(&rb4xx_nand_device);
378
379 ar71xx_add_device_mdio(0, ~RB493G_MDIO_PHYMASK);
380
381 ar71xx_init_mac(ar71xx_eth0_data.mac_addr, ar71xx_mac_base, 0);
382 ar71xx_eth0_data.phy_if_mode = PHY_INTERFACE_MODE_RGMII;
383 ar71xx_eth0_data.phy_mask = RB493G_MDIO_PHYMASK;
384 ar71xx_eth0_data.speed = SPEED_1000;
385 ar71xx_eth0_data.duplex = DUPLEX_FULL;
386
387 ar71xx_init_mac(ar71xx_eth1_data.mac_addr, ar71xx_mac_base, 1);
388 ar71xx_eth1_data.phy_if_mode = PHY_INTERFACE_MODE_RGMII;
389 ar71xx_eth1_data.mii_bus_dev = &rb493g_mdio_device.dev;
390 ar71xx_eth1_data.phy_mask = RB493G_MDIO_PHYMASK;
391 ar71xx_eth1_data.speed = SPEED_1000;
392 ar71xx_eth1_data.duplex = DUPLEX_FULL;
393
394
395 platform_device_register(&rb493g_mdio_device);
396
397 ar71xx_add_device_eth(1);
398 ar71xx_add_device_eth(0);
399
400 ar71xx_add_device_usb();
401
402 ar71xx_pci_init(ARRAY_SIZE(rb4xx_pci_irqs), rb4xx_pci_irqs);
403 }
404
405 MIPS_MACHINE(AR71XX_MACH_RB_493G, "493G", "MikroTik RouterBOARD 493G",
406 rb493g_setup);