target/linux/ar71xx/files-3.2/arch/mips/ath79/mach-dir-615-c1.c

   1 /*
   2  *  D-Link DIR-615 rev C1 board support
   3  *
   4  *  Copyright (C) 2008-2012 Gabor Juhos <juhosg@openwrt.org>
   5  *  Copyright (C) 2008 Imre Kaloz <kaloz@openwrt.org>
   6  *
   7  *  This program is free software; you can redistribute it and/or modify it
   8  *  under the terms of the GNU General Public License version 2 as published
   9  *  by the Free Software Foundation.
  10  */
  11
  12 #include <linux/mtd/mtd.h>
  13 #include <linux/mtd/partitions.h>
  14
  15 #include <asm/mach-ath79/ath79.h>
  16
  17 #include "dev-eth.h"
  18 #include "dev-gpio-buttons.h"
  19 #include "dev-leds-gpio.h"
  20 #include "dev-m25p80.h"
  21 #include "dev-wmac.h"
  22 #include "machtypes.h"
  23 #include "nvram.h"
  24
  25 #define DIR_615C1_GPIO_LED_ORANGE_STATUS 1      /* ORANGE:STATUS:TRICOLOR */
  26 #define DIR_615C1_GPIO_LED_BLUE_WPS     3       /* BLUE:WPS */
  27 #define DIR_615C1_GPIO_LED_GREEN_WAN    4       /* GREEN:WAN:TRICOLOR */
  28 #define DIR_615C1_GPIO_LED_GREEN_WANCPU 5       /* GREEN:WAN:CPU:TRICOLOR */
  29 #define DIR_615C1_GPIO_LED_GREEN_WLAN   6       /* GREEN:WLAN */
  30 #define DIR_615C1_GPIO_LED_GREEN_STATUS 14      /* GREEN:STATUS:TRICOLOR */
  31 #define DIR_615C1_GPIO_LED_ORANGE_WAN   15      /* ORANGE:WAN:TRICOLOR */
  32
  33 /* buttons may need refinement */
  34
  35 #define DIR_615C1_GPIO_BTN_WPS          12
  36 #define DIR_615C1_GPIO_BTN_RESET        21
  37
  38 #define DIR_615C1_KEYS_POLL_INTERVAL    20      /* msecs */
  39 #define DIR_615C1_KEYS_DEBOUNCE_INTERVAL (3 * DIR_615C1_KEYS_POLL_INTERVAL)
  40
  41 #define DIR_615C1_CONFIG_ADDR           0x1f020000
  42 #define DIR_615C1_CONFIG_SIZE           0x10000
  43
  44 static struct mtd_partition dir_615c1_partitions[] = {
  45         {
  46                 .name           = "u-boot",
  47                 .offset         = 0,
  48                 .size           = 0x020000,
  49                 .mask_flags     = MTD_WRITEABLE,
  50         }, {
  51                 .name           = "config",
  52                 .offset         = 0x020000,
  53                 .size           = 0x010000,
  54         }, {
  55                 .name           = "kernel",
  56                 .offset         = 0x030000,
  57                 .size           = 0x0e0000,
  58         }, {
  59                 .name           = "rootfs",
  60                 .offset         = 0x110000,
  61                 .size           = 0x2e0000,
  62         }, {
  63                 .name           = "art",
  64                 .offset         = 0x3f0000,
  65                 .size           = 0x010000,
  66                 .mask_flags     = MTD_WRITEABLE,
  67         }, {
  68                 .name           = "firmware",
  69                 .offset         = 0x030000,
  70                 .size           = 0x3c0000,
  71         }
  72 };
  73
  74 static struct flash_platform_data dir_615c1_flash_data = {
  75         .parts          = dir_615c1_partitions,
  76         .nr_parts       = ARRAY_SIZE(dir_615c1_partitions),
  77 };
  78
  79 static struct gpio_led dir_615c1_leds_gpio[] __initdata = {
  80         {
  81                 .name           = "dir-615c1:orange:status",
  82                 .gpio           = DIR_615C1_GPIO_LED_ORANGE_STATUS,
  83                 .active_low     = 1,
  84         }, {
  85                 .name           = "dir-615c1:blue:wps",
  86                 .gpio           = DIR_615C1_GPIO_LED_BLUE_WPS,
  87                 .active_low     = 1,
  88         }, {
  89                 .name           = "dir-615c1:green:wan",
  90                 .gpio           = DIR_615C1_GPIO_LED_GREEN_WAN,
  91                 .active_low     = 1,
  92         }, {
  93                 .name           = "dir-615c1:green:wancpu",
  94                 .gpio           = DIR_615C1_GPIO_LED_GREEN_WANCPU,
  95                 .active_low     = 1,
  96         }, {
  97                 .name           = "dir-615c1:green:wlan",
  98                 .gpio           = DIR_615C1_GPIO_LED_GREEN_WLAN,
  99                 .active_low     = 1,
 100         }, {
 101                 .name           = "dir-615c1:green:status",
 102                 .gpio           = DIR_615C1_GPIO_LED_GREEN_STATUS,
 103                 .active_low     = 1,
 104         }, {
 105                 .name           = "dir-615c1:orange:wan",
 106                 .gpio           = DIR_615C1_GPIO_LED_ORANGE_WAN,
 107                 .active_low     = 1,
 108         }
 109
 110 };
 111
 112 static struct gpio_keys_button dir_615c1_gpio_keys[] __initdata = {
 113         {
 114                 .desc           = "reset",
 115                 .type           = EV_KEY,
 116                 .code           = KEY_RESTART,
 117                 .debounce_interval = DIR_615C1_KEYS_DEBOUNCE_INTERVAL,
 118                 .gpio           = DIR_615C1_GPIO_BTN_RESET,
 119         }, {
 120                 .desc           = "wps",
 121                 .type           = EV_KEY,
 122                 .code           = KEY_WPS_BUTTON,
 123                 .debounce_interval = DIR_615C1_KEYS_DEBOUNCE_INTERVAL,
 124                 .gpio           = DIR_615C1_GPIO_BTN_WPS,
 125         }
 126 };
 127
 128 #define DIR_615C1_LAN_PHYMASK   BIT(0)
 129 #define DIR_615C1_WAN_PHYMASK   BIT(4)
 130 #define DIR_615C1_MDIO_MASK     (~(DIR_615C1_LAN_PHYMASK | \
 131                                    DIR_615C1_WAN_PHYMASK))
 132
 133 static void __init dir_615c1_setup(void)
 134 {
 135         const char *config = (char *) KSEG1ADDR(DIR_615C1_CONFIG_ADDR);
 136         u8 *eeprom = (u8 *) KSEG1ADDR(0x1fff1000);
 137         u8 mac[6];
 138         u8 *wlan_mac = NULL;
 139
 140         if (ath79_nvram_parse_mac_addr(config, DIR_615C1_CONFIG_SIZE,
 141                                        "lan_mac=", mac) == 0) {
 142                 ath79_init_mac(ath79_eth0_data.mac_addr, mac, 0);
 143                 ath79_init_mac(ath79_eth1_data.mac_addr, mac, 1);
 144                 wlan_mac = mac;
 145         }
 146
 147         ath79_register_mdio(0, DIR_615C1_MDIO_MASK);
 148
 149         ath79_eth0_data.phy_if_mode = PHY_INTERFACE_MODE_RMII;
 150         ath79_eth0_data.phy_mask = DIR_615C1_LAN_PHYMASK;
 151
 152         ath79_eth1_data.phy_if_mode = PHY_INTERFACE_MODE_RMII;
 153         ath79_eth1_data.phy_mask = DIR_615C1_WAN_PHYMASK;
 154
 155         ath79_register_eth(0);
 156         ath79_register_eth(1);
 157
 158         ath79_register_m25p80(&dir_615c1_flash_data);
 159
 160         ath79_register_leds_gpio(-1, ARRAY_SIZE(dir_615c1_leds_gpio),
 161                                  dir_615c1_leds_gpio);
 162
 163         ath79_register_gpio_keys_polled(-1, DIR_615C1_KEYS_POLL_INTERVAL,
 164                                         ARRAY_SIZE(dir_615c1_gpio_keys),
 165                                         dir_615c1_gpio_keys);
 166
 167         ath79_register_wmac(eeprom, wlan_mac);
 168 }
 169
 170 MIPS_MACHINE(ATH79_MACH_DIR_615_C1, "DIR-615-C1", "D-Link DIR-615 rev. C1",
 171              dir_615c1_setup);