ar71xx: add support for the D-Link DIR-600 rev. A1 board
[openwrt/svn-archive/archive.git] / target / linux / ar71xx / files / arch / mips / ar71xx / mach-dir-600-a1.c
1 /*
2 * D-Link DIR-600 rev. A1 board support
3 *
4 * Copyright (C) 2010 Gabor Juhos <juhosg@openwrt.org>
5 *
6 * This program is free software; you can redistribute it and/or modify it
7 * under the terms of the GNU General Public License version 2 as published
8 * by the Free Software Foundation.
9 */
10
11 #include <linux/mtd/mtd.h>
12 #include <linux/mtd/partitions.h>
13
14 #include <asm/mach-ar71xx/ar71xx.h>
15
16 #include "machtype.h"
17 #include "devices.h"
18 #include "dev-m25p80.h"
19 #include "dev-ap91-pci.h"
20 #include "dev-gpio-buttons.h"
21 #include "dev-leds-gpio.h"
22
23 #define DIR_600_A1_GPIO_LED_WPS 0
24 #define DIR_600_A1_GPIO_LED_POWER_AMBER 1
25 #define DIR_600_A1_GPIO_LED_POWER_GREEN 6
26
27 #define DIR_600_A1_GPIO_BTN_RESET 8
28 #define DIR_600_A1_GPIO_BTN_WPS 12
29
30 #define DIR_600_A1_BUTTONS_POLL_INTERVAL 20
31
32 #ifdef CONFIG_MTD_PARTITIONS
33 static struct mtd_partition dir_600_a1_partitions[] = {
34 {
35 .name = "u-boot",
36 .offset = 0,
37 .size = 0x030000,
38 .mask_flags = MTD_WRITEABLE,
39 }, {
40 .name = "nvram",
41 .offset = 0x030000,
42 .size = 0x010000,
43 }, {
44 .name = "kernel",
45 .offset = 0x040000,
46 .size = 0x0e0000,
47 }, {
48 .name = "rootfs",
49 .offset = 0x120000,
50 .size = 0x2c0000,
51 }, {
52 .name = "mac",
53 .offset = 0x3e0000,
54 .size = 0x010000,
55 .mask_flags = MTD_WRITEABLE,
56 }, {
57 .name = "art",
58 .offset = 0x3f0000,
59 .size = 0x010000,
60 .mask_flags = MTD_WRITEABLE,
61 }, {
62 .name = "firmware",
63 .offset = 0x040000,
64 .size = 0x3a0000,
65 }
66 };
67 #endif /* CONFIG_MTD_PARTITIONS */
68
69 static struct flash_platform_data dir_600_a1_flash_data = {
70 #ifdef CONFIG_MTD_PARTITIONS
71 .parts = dir_600_a1_partitions,
72 .nr_parts = ARRAY_SIZE(dir_600_a1_partitions),
73 #endif
74 };
75
76 static struct gpio_led dir_600_a1_leds_gpio[] __initdata = {
77 {
78 .name = "dir-600-a1:green:power",
79 .gpio = DIR_600_A1_GPIO_LED_POWER_GREEN,
80 }, {
81 .name = "dir-600-a1:amber:power",
82 .gpio = DIR_600_A1_GPIO_LED_POWER_AMBER,
83 }, {
84 .name = "dir-600-a1:blue:wps",
85 .gpio = DIR_600_A1_GPIO_LED_WPS,
86 .active_low = 1,
87 }
88 };
89
90 static struct gpio_button dir_600_a1_gpio_buttons[] __initdata = {
91 {
92 .desc = "reset",
93 .type = EV_KEY,
94 .code = BTN_0,
95 .threshold = 5,
96 .gpio = DIR_600_A1_GPIO_BTN_RESET,
97 .active_low = 1,
98 }, {
99 .desc = "wps",
100 .type = EV_KEY,
101 .code = BTN_1,
102 .threshold = 5,
103 .gpio = DIR_600_A1_GPIO_BTN_WPS,
104 .active_low = 1,
105 }
106 };
107
108 static void __init dir_600_a1_setup(void)
109 {
110 u8 *mac = (u8 *) KSEG1ADDR(0x1fff0000);
111 u8 *ee = (u8 *) KSEG1ADDR(0x1fff1000);
112
113 ar71xx_set_mac_base(mac);
114 ar71xx_add_device_mdio(0x0);
115
116 /* WAN port */
117 ar71xx_eth0_data.phy_if_mode = PHY_INTERFACE_MODE_RMII;
118 ar71xx_eth0_data.phy_mask = 0x0;
119 ar71xx_eth0_data.speed = SPEED_100;
120 ar71xx_eth0_data.duplex = DUPLEX_FULL;
121 ar71xx_eth0_data.fifo_cfg1 = 0x0fff0000;
122 ar71xx_eth0_data.fifo_cfg2 = 0x00001fff;
123 ar71xx_eth0_data.fifo_cfg3 = 0x008001ff;
124
125 /* LAN ports */
126 ar71xx_eth1_data.phy_if_mode = PHY_INTERFACE_MODE_RMII;
127 ar71xx_eth1_data.phy_mask = 0x0;
128 ar71xx_eth1_data.speed = SPEED_1000;
129 ar71xx_eth1_data.duplex = DUPLEX_FULL;
130 ar71xx_eth1_data.fifo_cfg1 = 0x0fff0000;
131 ar71xx_eth1_data.fifo_cfg2 = 0x00001fff;
132 ar71xx_eth1_data.fifo_cfg3 = 0x008001ff;
133
134 ar71xx_add_device_eth(1);
135 ar71xx_add_device_eth(0);
136
137 ar71xx_add_device_m25p80(&dir_600_a1_flash_data);
138
139 ar71xx_add_device_leds_gpio(-1, ARRAY_SIZE(dir_600_a1_leds_gpio),
140 dir_600_a1_leds_gpio);
141
142 ar71xx_add_device_gpio_buttons(-1, DIR_600_A1_BUTTONS_POLL_INTERVAL,
143 ARRAY_SIZE(dir_600_a1_gpio_buttons),
144 dir_600_a1_gpio_buttons);
145
146 ap91_pci_init(ee, NULL);
147 }
148
149 MIPS_MACHINE(AR71XX_MACH_DIR_600_A1, "DIR-600-A1", "D-Link DIR-600 rev. A1",
150 dir_600_a1_setup);