ar71xx: move AP94 specific PCI init code into a separate file
[openwrt/svn-archive/archive.git] / target / linux / ar71xx / files / arch / mips / ar71xx / mach-dir-825-b1.c
1 /*
2 * D-Link DIR-825 rev. B1 board support
3 *
4 * Copyright (C) 2009 Lukas Kuna, Evkanet, s.r.o.
5 *
6 * based on mach-wndr3700.c
7 *
8 * This program is free software; you can redistribute it and/or modify it
9 * under the terms of the GNU General Public License version 2 as published
10 * by the Free Software Foundation.
11 */
12
13 #include <linux/platform_device.h>
14 #include <linux/mtd/mtd.h>
15 #include <linux/mtd/partitions.h>
16 #include <linux/input.h>
17 #include <linux/delay.h>
18 #include <linux/rtl8366_smi.h>
19
20 #include <asm/mips_machine.h>
21 #include <asm/mach-ar71xx/ar71xx.h>
22
23 #include "devices.h"
24 #include "dev-m25p80.h"
25 #include "dev-ap94-pci.h"
26
27 #define DIR825B1_GPIO_LED_BLUE_USB 0
28 #define DIR825B1_GPIO_LED_ORANGE_POWER 1
29 #define DIR825B1_GPIO_LED_BLUE_POWER 2
30 #define DIR825B1_GPIO_LED_BLUE_POWERSAVE 4
31 #define DIR825B1_GPIO_LED_ORANGE_PLANET 6
32 #define DIR825B1_GPIO_LED_BLUE_PLANET 11
33
34 #define DIR825B1_GPIO_BTN_RESET 3
35 #define DIR825B1_GPIO_BTN_POWERSAVE 8
36
37 #define DIR825B1_GPIO_RTL8366_SDA 5
38 #define DIR825B1_GPIO_RTL8366_SCK 7
39
40 #define DIR825B1_BUTTONS_POLL_INTERVAL 20
41
42 #define DIR825B1_CAL_LOCATION_0 0x1f661000
43 #define DIR825B1_CAL_LOCATION_1 0x1f665000
44
45 #define DIR825B1_MAC_LOCATION_0 0x2ffa81b8
46 #define DIR825B1_MAC_LOCATION_1 0x2ffa8370
47
48 #ifdef CONFIG_MTD_PARTITIONS
49 static struct mtd_partition dir825b1_partitions[] = {
50 {
51 .name = "uboot",
52 .offset = 0,
53 .size = 0x040000,
54 .mask_flags = MTD_WRITEABLE,
55 } , {
56 .name = "config",
57 .offset = 0x040000,
58 .size = 0x010000,
59 .mask_flags = MTD_WRITEABLE,
60 } , {
61 .name = "firmware",
62 .offset = 0x050000,
63 .size = 0x610000,
64 } , {
65 .name = "caldata",
66 .offset = 0x660000,
67 .size = 0x010000,
68 .mask_flags = MTD_WRITEABLE,
69 }
70 };
71 #endif /* CONFIG_MTD_PARTITIONS */
72
73 static struct flash_platform_data dir825b1_flash_data = {
74 #ifdef CONFIG_MTD_PARTITIONS
75 .parts = dir825b1_partitions,
76 .nr_parts = ARRAY_SIZE(dir825b1_partitions),
77 #endif
78 };
79
80 static struct gpio_led dir825b1_leds_gpio[] __initdata = {
81 {
82 .name = "dir825b1:blue:usb",
83 .gpio = DIR825B1_GPIO_LED_BLUE_USB,
84 .active_low = 1,
85 }, {
86 .name = "dir825b1:orange:power",
87 .gpio = DIR825B1_GPIO_LED_ORANGE_POWER,
88 .active_low = 1,
89 }, {
90 .name = "dir825b1:blue:power",
91 .gpio = DIR825B1_GPIO_LED_BLUE_POWER,
92 .active_low = 1,
93 }, {
94 .name = "dir825b1:blue:powersave",
95 .gpio = DIR825B1_GPIO_LED_BLUE_POWERSAVE,
96 .active_low = 1,
97 }, {
98 .name = "dir825b1:orange:planet",
99 .gpio = DIR825B1_GPIO_LED_ORANGE_PLANET,
100 .active_low = 1,
101 }, {
102 .name = "dir825b1:blue:planet",
103 .gpio = DIR825B1_GPIO_LED_BLUE_PLANET,
104 .active_low = 1,
105 }
106 };
107
108 static struct gpio_button dir825b1_gpio_buttons[] __initdata = {
109 {
110 .desc = "reset",
111 .type = EV_KEY,
112 .code = BTN_0,
113 .threshold = 5,
114 .gpio = DIR825B1_GPIO_BTN_RESET,
115 .active_low = 1,
116 } , {
117 .desc = "powersave",
118 .type = EV_KEY,
119 .code = BTN_1,
120 .threshold = 5,
121 .gpio = DIR825B1_GPIO_BTN_POWERSAVE,
122 .active_low = 1,
123 }
124 };
125
126 static struct rtl8366_smi_platform_data dir825b1_rtl8366_smi_data = {
127 .gpio_sda = DIR825B1_GPIO_RTL8366_SDA,
128 .gpio_sck = DIR825B1_GPIO_RTL8366_SCK,
129 };
130
131 static struct platform_device dir825b1_rtl8366_smi_device = {
132 .name = "rtl8366-smi",
133 .id = -1,
134 .dev = {
135 .platform_data = &dir825b1_rtl8366_smi_data,
136 }
137 };
138
139 static void __init dir825b1_setup(void)
140 {
141 u8 mac[6], i;
142
143 memcpy(mac, (u8*)KSEG1ADDR(DIR825B1_MAC_LOCATION_1), 6);
144 for(i = 5; i >= 3; i--)
145 if(++mac[i] != 0x00) break;
146
147 ar71xx_set_mac_base(mac);
148
149 ar71xx_add_device_mdio(0x0);
150
151 ar71xx_eth0_data.mii_bus_dev = &dir825b1_rtl8366_smi_device.dev;
152 ar71xx_eth0_data.phy_if_mode = PHY_INTERFACE_MODE_RGMII;
153 ar71xx_eth0_data.speed = SPEED_1000;
154 ar71xx_eth0_data.duplex = DUPLEX_FULL;
155 ar71xx_eth0_pll_data.pll_1000 = 0x11110000;
156
157 ar71xx_eth1_data.mii_bus_dev = &dir825b1_rtl8366_smi_device.dev;
158 ar71xx_eth1_data.phy_if_mode = PHY_INTERFACE_MODE_RGMII;
159 ar71xx_eth1_data.phy_mask = 0x10;
160 ar71xx_eth1_pll_data.pll_1000 = 0x11110000;
161
162 ar71xx_add_device_eth(0);
163 ar71xx_add_device_eth(1);
164
165 ar71xx_add_device_m25p80(&dir825b1_flash_data);
166
167 ar71xx_add_device_leds_gpio(-1, ARRAY_SIZE(dir825b1_leds_gpio),
168 dir825b1_leds_gpio);
169
170 ar71xx_add_device_gpio_buttons(-1, DIR825B1_BUTTONS_POLL_INTERVAL,
171 ARRAY_SIZE(dir825b1_gpio_buttons),
172 dir825b1_gpio_buttons);
173
174 ar71xx_add_device_usb();
175
176 platform_device_register(&dir825b1_rtl8366_smi_device);
177
178 ap94_pci_init((u8 *) KSEG1ADDR(DIR825B1_CAL_LOCATION_0),
179 (u8 *) KSEG1ADDR(DIR825B1_MAC_LOCATION_0),
180 (u8 *) KSEG1ADDR(DIR825B1_CAL_LOCATION_1),
181 (u8 *) KSEG1ADDR(DIR825B1_MAC_LOCATION_1));
182 }
183
184 MIPS_MACHINE(AR71XX_MACH_DIR_825_B1, "D-Link DIR-825 rev. B1", dir825b1_setup);