0ec313dd05276767b312174413282aabac2a82cc
[openwrt/svn-archive/archive.git] / target / linux / ar71xx / files / arch / mips / ar71xx / mach-rb4xx.c
1 /*
2 * MikroTik RouterBOARD 4xx series support
3 *
4 * Copyright (C) 2008-2010 Gabor Juhos <juhosg@openwrt.org>
5 * Copyright (C) 2008 Imre Kaloz <kaloz@openwrt.org>
6 *
7 * This program is free software; you can redistribute it and/or modify it
8 * under the terms of the GNU General Public License version 2 as published
9 * by the Free Software Foundation.
10 */
11
12 #include <linux/platform_device.h>
13 #include <linux/irq.h>
14 #include <linux/mmc/host.h>
15 #include <linux/spi/spi.h>
16 #include <linux/spi/flash.h>
17 #include <linux/spi/mmc_spi.h>
18 #include <linux/mtd/mtd.h>
19 #include <linux/mtd/partitions.h>
20
21 #include <asm/mach-ar71xx/ar71xx.h>
22 #include <asm/mach-ar71xx/pci.h>
23 #include <asm/mach-ar71xx/rb4xx_cpld.h>
24
25 #include "machtype.h"
26 #include "devices.h"
27 #include "dev-gpio-buttons.h"
28 #include "dev-leds-gpio.h"
29 #include "dev-usb.h"
30
31 #define RB4XX_GPIO_USER_LED 4
32 #define RB4XX_GPIO_RESET_SWITCH 7
33
34 #define RB4XX_GPIO_CPLD_BASE 32
35 #define RB4XX_GPIO_CPLD_LED1 (RB4XX_GPIO_CPLD_BASE + CPLD_GPIO_nLED1)
36 #define RB4XX_GPIO_CPLD_LED2 (RB4XX_GPIO_CPLD_BASE + CPLD_GPIO_nLED2)
37 #define RB4XX_GPIO_CPLD_LED3 (RB4XX_GPIO_CPLD_BASE + CPLD_GPIO_nLED3)
38 #define RB4XX_GPIO_CPLD_LED4 (RB4XX_GPIO_CPLD_BASE + CPLD_GPIO_nLED4)
39 #define RB4XX_GPIO_CPLD_LED5 (RB4XX_GPIO_CPLD_BASE + CPLD_GPIO_nLED5)
40
41 #define RB4XX_BUTTONS_POLL_INTERVAL 20
42
43 static struct gpio_led rb4xx_leds_gpio[] __initdata = {
44 {
45 .name = "rb4xx:yellow:user",
46 .gpio = RB4XX_GPIO_USER_LED,
47 .active_low = 0,
48 }, {
49 .name = "rb4xx:green:led1",
50 .gpio = RB4XX_GPIO_CPLD_LED1,
51 .active_low = 1,
52 }, {
53 .name = "rb4xx:green:led2",
54 .gpio = RB4XX_GPIO_CPLD_LED2,
55 .active_low = 1,
56 }, {
57 .name = "rb4xx:green:led3",
58 .gpio = RB4XX_GPIO_CPLD_LED3,
59 .active_low = 1,
60 }, {
61 .name = "rb4xx:green:led4",
62 .gpio = RB4XX_GPIO_CPLD_LED4,
63 .active_low = 1,
64 }, {
65 .name = "rb4xx:green:led5",
66 .gpio = RB4XX_GPIO_CPLD_LED5,
67 .active_low = 0,
68 },
69 };
70
71 static struct gpio_button rb4xx_gpio_buttons[] __initdata = {
72 {
73 .desc = "reset_switch",
74 .type = EV_KEY,
75 .code = KEY_RESTART,
76 .threshold = 3,
77 .gpio = RB4XX_GPIO_RESET_SWITCH,
78 .active_low = 1,
79 }
80 };
81
82 static struct platform_device rb4xx_nand_device = {
83 .name = "rb4xx-nand",
84 .id = -1,
85 };
86
87 static struct ar71xx_pci_irq rb4xx_pci_irqs[] __initdata = {
88 {
89 .slot = 0,
90 .pin = 1,
91 .irq = AR71XX_PCI_IRQ_DEV2,
92 }, {
93 .slot = 1,
94 .pin = 1,
95 .irq = AR71XX_PCI_IRQ_DEV0,
96 }, {
97 .slot = 1,
98 .pin = 2,
99 .irq = AR71XX_PCI_IRQ_DEV1,
100 }, {
101 .slot = 2,
102 .pin = 1,
103 .irq = AR71XX_PCI_IRQ_DEV1,
104 }, {
105 .slot = 3,
106 .pin = 1,
107 .irq = AR71XX_PCI_IRQ_DEV2,
108 }
109 };
110
111 #ifdef CONFIG_MTD_PARTITIONS
112 static struct mtd_partition rb4xx_partitions[] = {
113 {
114 .name = "routerboot",
115 .offset = 0,
116 .size = 0x0b000,
117 .mask_flags = MTD_WRITEABLE,
118 }, {
119 .name = "hard_config",
120 .offset = 0x0b000,
121 .size = 0x01000,
122 .mask_flags = MTD_WRITEABLE,
123 }, {
124 .name = "bios",
125 .offset = 0x0d000,
126 .size = 0x02000,
127 .mask_flags = MTD_WRITEABLE,
128 }, {
129 .name = "soft_config",
130 .offset = 0x0f000,
131 .size = 0x01000,
132 }
133 };
134 #define rb4xx_num_partitions ARRAY_SIZE(rb4xx_partitions)
135 #else /* CONFIG_MTD_PARTITIONS */
136 #define rb4xx_partitions NULL
137 #define rb4xx_num_partitions 0
138 #endif /* CONFIG_MTD_PARTITIONS */
139
140 static struct flash_platform_data rb4xx_flash_data = {
141 .type = "pm25lv512",
142 .parts = rb4xx_partitions,
143 .nr_parts = rb4xx_num_partitions,
144 };
145
146 static struct rb4xx_cpld_platform_data rb4xx_cpld_data = {
147 .gpio_base = RB4XX_GPIO_CPLD_BASE,
148 };
149
150 static struct mmc_spi_platform_data rb4xx_mmc_data = {
151 .ocr_mask = MMC_VDD_32_33 | MMC_VDD_33_34,
152 };
153
154 static struct spi_board_info rb4xx_spi_info[] = {
155 {
156 .bus_num = 0,
157 .chip_select = 0,
158 .max_speed_hz = 25000000,
159 .modalias = "m25p80",
160 .platform_data = &rb4xx_flash_data,
161 }, {
162 .bus_num = 0,
163 .chip_select = 1,
164 .max_speed_hz = 25000000,
165 .modalias = "spi-rb4xx-cpld",
166 .platform_data = &rb4xx_cpld_data,
167 }
168 };
169
170 static struct spi_board_info rb4xx_microsd_info[] = {
171 {
172 .bus_num = 0,
173 .chip_select = 2,
174 .max_speed_hz = 25000000,
175 .modalias = "mmc_spi",
176 .platform_data = &rb4xx_mmc_data,
177 }
178 };
179
180
181 static struct resource rb4xx_spi_resources[] = {
182 {
183 .start = AR71XX_SPI_BASE,
184 .end = AR71XX_SPI_BASE + AR71XX_SPI_SIZE - 1,
185 .flags = IORESOURCE_MEM,
186 },
187 };
188
189 static struct platform_device rb4xx_spi_device = {
190 .name = "rb4xx-spi",
191 .id = -1,
192 .resource = rb4xx_spi_resources,
193 .num_resources = ARRAY_SIZE(rb4xx_spi_resources),
194 };
195
196 static void __init rb4xx_generic_setup(void)
197 {
198 ar71xx_gpio_function_enable(AR71XX_GPIO_FUNC_SPI_CS1_EN |
199 AR71XX_GPIO_FUNC_SPI_CS2_EN);
200
201 ar71xx_add_device_leds_gpio(-1, ARRAY_SIZE(rb4xx_leds_gpio),
202 rb4xx_leds_gpio);
203
204 ar71xx_add_device_gpio_buttons(-1, RB4XX_BUTTONS_POLL_INTERVAL,
205 ARRAY_SIZE(rb4xx_gpio_buttons),
206 rb4xx_gpio_buttons);
207
208 spi_register_board_info(rb4xx_spi_info, ARRAY_SIZE(rb4xx_spi_info));
209 platform_device_register(&rb4xx_spi_device);
210 platform_device_register(&rb4xx_nand_device);
211 }
212
213 static void __init rb411_setup(void)
214 {
215 rb4xx_generic_setup();
216 spi_register_board_info(rb4xx_microsd_info,
217 ARRAY_SIZE(rb4xx_microsd_info));
218
219 ar71xx_add_device_mdio(0xfffffffc);
220
221 ar71xx_init_mac(ar71xx_eth0_data.mac_addr, ar71xx_mac_base, 0);
222 ar71xx_eth0_data.phy_if_mode = PHY_INTERFACE_MODE_MII;
223 ar71xx_eth0_data.phy_mask = 0x00000003;
224
225 ar71xx_add_device_eth(0);
226
227 ar71xx_pci_init(ARRAY_SIZE(rb4xx_pci_irqs), rb4xx_pci_irqs);
228 }
229
230 MIPS_MACHINE(AR71XX_MACH_RB_411, "411", "MikroTik RouterBOARD 411/A/AH",
231 rb411_setup);
232
233 static void __init rb411u_setup(void)
234 {
235 rb411_setup();
236 ar71xx_add_device_usb();
237 }
238
239 MIPS_MACHINE(AR71XX_MACH_RB_411U, "411U", "MikroTik RouterBOARD 411U",
240 rb411u_setup);
241
242 #define RB433_LAN_PHYMASK BIT(0)
243 #define RB433_WAN_PHYMASK BIT(4)
244 #define RB433_MDIO_PHYMASK (RB433_LAN_PHYMASK | RB433_WAN_PHYMASK)
245
246 static void __init rb433_setup(void)
247 {
248 rb4xx_generic_setup();
249 spi_register_board_info(rb4xx_microsd_info,
250 ARRAY_SIZE(rb4xx_microsd_info));
251
252 ar71xx_add_device_mdio(~RB433_MDIO_PHYMASK);
253
254 ar71xx_init_mac(ar71xx_eth0_data.mac_addr, ar71xx_mac_base, 1);
255 ar71xx_eth0_data.phy_if_mode = PHY_INTERFACE_MODE_MII;
256 ar71xx_eth0_data.phy_mask = RB433_LAN_PHYMASK;
257
258 ar71xx_init_mac(ar71xx_eth1_data.mac_addr, ar71xx_mac_base, 0);
259 ar71xx_eth1_data.phy_if_mode = PHY_INTERFACE_MODE_RMII;
260 ar71xx_eth1_data.phy_mask = RB433_WAN_PHYMASK;
261
262 ar71xx_add_device_eth(1);
263 ar71xx_add_device_eth(0);
264
265 ar71xx_pci_init(ARRAY_SIZE(rb4xx_pci_irqs), rb4xx_pci_irqs);
266 }
267
268 MIPS_MACHINE(AR71XX_MACH_RB_433, "433", "MikroTik RouterBOARD 433/AH",
269 rb433_setup);
270
271 static void __init rb433u_setup(void)
272 {
273 rb433_setup();
274 ar71xx_add_device_usb();
275 }
276
277 MIPS_MACHINE(AR71XX_MACH_RB_433U, "433U", "MikroTik RouterBOARD 433UAH",
278 rb433u_setup);
279
280 #define RB450_LAN_PHYMASK BIT(0)
281 #define RB450_WAN_PHYMASK BIT(4)
282 #define RB450_MDIO_PHYMASK (RB450_LAN_PHYMASK | RB450_WAN_PHYMASK)
283
284 static void __init rb450_generic_setup(int gige)
285 {
286 rb4xx_generic_setup();
287 ar71xx_add_device_mdio(~RB450_MDIO_PHYMASK);
288
289 ar71xx_init_mac(ar71xx_eth0_data.mac_addr, ar71xx_mac_base, 1);
290 ar71xx_eth0_data.phy_if_mode = (gige) ? PHY_INTERFACE_MODE_RGMII : PHY_INTERFACE_MODE_MII;
291 ar71xx_eth0_data.phy_mask = RB450_LAN_PHYMASK;
292
293 ar71xx_init_mac(ar71xx_eth1_data.mac_addr, ar71xx_mac_base, 0);
294 ar71xx_eth1_data.phy_if_mode = (gige) ? PHY_INTERFACE_MODE_RGMII : PHY_INTERFACE_MODE_RMII;
295 ar71xx_eth1_data.phy_mask = RB450_WAN_PHYMASK;
296
297 ar71xx_add_device_eth(1);
298 ar71xx_add_device_eth(0);
299 }
300
301 static void __init rb450_setup(void)
302 {
303 rb450_generic_setup(0);
304 }
305
306 MIPS_MACHINE(AR71XX_MACH_RB_450, "450", "MikroTik RouterBOARD 450",
307 rb450_setup);
308
309 static void __init rb450g_setup(void)
310 {
311 rb450_generic_setup(1);
312 spi_register_board_info(rb4xx_microsd_info,
313 ARRAY_SIZE(rb4xx_microsd_info));
314 }
315
316 MIPS_MACHINE(AR71XX_MACH_RB_450G, "450G", "MikroTik RouterBOARD 450G",
317 rb450g_setup);
318
319 static void __init rb493_setup(void)
320 {
321 rb4xx_generic_setup();
322
323 ar71xx_add_device_mdio(0x3fffff00);
324
325 ar71xx_init_mac(ar71xx_eth0_data.mac_addr, ar71xx_mac_base, 0);
326 ar71xx_eth0_data.phy_if_mode = PHY_INTERFACE_MODE_MII;
327 ar71xx_eth0_data.speed = SPEED_100;
328 ar71xx_eth0_data.duplex = DUPLEX_FULL;
329
330 ar71xx_init_mac(ar71xx_eth1_data.mac_addr, ar71xx_mac_base, 1);
331 ar71xx_eth1_data.phy_if_mode = PHY_INTERFACE_MODE_RMII;
332 ar71xx_eth1_data.phy_mask = 0x00000001;
333
334 ar71xx_add_device_eth(0);
335 ar71xx_add_device_eth(1);
336
337 ar71xx_pci_init(ARRAY_SIZE(rb4xx_pci_irqs), rb4xx_pci_irqs);
338 }
339
340 MIPS_MACHINE(AR71XX_MACH_RB_493, "493", "MikroTik RouterBOARD 493/AH",
341 rb493_setup);