5c8791be283f80bdd3420fc287521bb56362345e
[openwrt/svn-archive/archive.git] / target / linux / ar71xx / files / arch / mips / ar71xx / platform.c
1 /*
2 * Atheros AR71xx SoC platform devices
3 *
4 * Copyright (C) 2008 Gabor Juhos <juhosg@openwrt.org>
5 * Copyright (C) 2008 Imre Kaloz <kaloz@openwrt.org>
6 *
7 * Parts of this file are based on Atheros' 2.6.15 BSP
8 *
9 * This program is free software; you can redistribute it and/or modify it
10 * under the terms of the GNU General Public License version 2 as published
11 * by the Free Software Foundation.
12 */
13
14 #include <linux/kernel.h>
15 #include <linux/init.h>
16 #include <linux/delay.h>
17 #include <linux/dma-mapping.h>
18 #include <linux/platform_device.h>
19 #include <linux/serial_8250.h>
20
21 #include <asm/mips_machine.h>
22 #include <asm/mach-ar71xx/ar71xx.h>
23 #include <asm/mach-ar71xx/platform.h>
24
25 static u8 ar71xx_mac_base[ETH_ALEN] __initdata;
26
27 /*
28 * OHCI (USB full speed host controller)
29 */
30 static struct resource ar71xx_ohci_resources[] = {
31 [0] = {
32 .start = AR71XX_OHCI_BASE,
33 .end = AR71XX_OHCI_BASE + AR71XX_OHCI_SIZE - 1,
34 .flags = IORESOURCE_MEM,
35 },
36 [1] = {
37 .start = AR71XX_MISC_IRQ_OHCI,
38 .end = AR71XX_MISC_IRQ_OHCI,
39 .flags = IORESOURCE_IRQ,
40 },
41 };
42
43 static u64 ar71xx_ohci_dmamask = DMA_BIT_MASK(32);
44 static struct platform_device ar71xx_ohci_device = {
45 .name = "ar71xx-ohci",
46 .id = -1,
47 .resource = ar71xx_ohci_resources,
48 .num_resources = ARRAY_SIZE(ar71xx_ohci_resources),
49 .dev = {
50 .dma_mask = &ar71xx_ohci_dmamask,
51 .coherent_dma_mask = DMA_BIT_MASK(32),
52 },
53 };
54
55 /*
56 * EHCI (USB full speed host controller)
57 */
58 static struct resource ar71xx_ehci_resources[] = {
59 [0] = {
60 .start = AR71XX_EHCI_BASE,
61 .end = AR71XX_EHCI_BASE + AR71XX_EHCI_SIZE - 1,
62 .flags = IORESOURCE_MEM,
63 },
64 [1] = {
65 .start = AR71XX_CPU_IRQ_USB,
66 .end = AR71XX_CPU_IRQ_USB,
67 .flags = IORESOURCE_IRQ,
68 },
69 };
70
71
72 static u64 ar71xx_ehci_dmamask = DMA_BIT_MASK(32);
73 static struct ar71xx_ehci_platform_data ar71xx_ehci_data;
74
75 static struct platform_device ar71xx_ehci_device = {
76 .name = "ar71xx-ehci",
77 .id = -1,
78 .resource = ar71xx_ehci_resources,
79 .num_resources = ARRAY_SIZE(ar71xx_ehci_resources),
80 .dev = {
81 .dma_mask = &ar71xx_ehci_dmamask,
82 .coherent_dma_mask = DMA_BIT_MASK(32),
83 .platform_data = &ar71xx_ehci_data,
84 },
85 };
86
87 #define AR71XX_USB_RESET_MASK \
88 (RESET_MODULE_USB_HOST | RESET_MODULE_USB_PHY \
89 | RESET_MODULE_USB_OHCI_DLL)
90
91 static void ar71xx_usb_setup(void)
92 {
93 ar71xx_device_stop(AR71XX_USB_RESET_MASK);
94 mdelay(1000);
95 ar71xx_device_start(AR71XX_USB_RESET_MASK);
96
97 /* Turning on the Buff and Desc swap bits */
98 ar71xx_usb_ctrl_wr(USB_CTRL_REG_CONFIG, 0xf0000);
99
100 /* WAR for HW bug. Here it adjusts the duration between two SOFS */
101 ar71xx_usb_ctrl_wr(USB_CTRL_REG_FLADJ, 0x20c00);
102
103 mdelay(900);
104 }
105
106 static void ar91xx_usb_setup(void)
107 {
108 ar71xx_device_stop(RESET_MODULE_USBSUS_OVERRIDE);
109 mdelay(10);
110
111 ar71xx_device_start(RESET_MODULE_USB_HOST);
112 mdelay(10);
113
114 ar71xx_device_start(RESET_MODULE_USB_PHY);
115 mdelay(10);
116 }
117
118 void __init ar71xx_add_device_usb(void)
119 {
120 switch (ar71xx_soc) {
121 case AR71XX_SOC_AR7130:
122 case AR71XX_SOC_AR7141:
123 case AR71XX_SOC_AR7161:
124 ar71xx_usb_setup();
125 platform_device_register(&ar71xx_ohci_device);
126 platform_device_register(&ar71xx_ehci_device);
127 break;
128
129 case AR71XX_SOC_AR9130:
130 case AR71XX_SOC_AR9132:
131 ar91xx_usb_setup();
132 ar71xx_ehci_data.is_ar91xx = 1;
133 platform_device_register(&ar71xx_ehci_device);
134 break;
135
136 default:
137 BUG();
138 }
139 }
140
141 #ifdef CONFIG_AR71XX_EARLY_SERIAL
142 static void __init ar71xx_add_device_uart(void) {};
143 #else
144 static struct resource ar71xx_uart_resources[] = {
145 {
146 .start = AR71XX_UART_BASE,
147 .end = AR71XX_UART_BASE + AR71XX_UART_SIZE - 1,
148 .flags = IORESOURCE_MEM,
149 },
150 };
151
152 #define AR71XX_UART_FLAGS (UPF_BOOT_AUTOCONF | UPF_SKIP_TEST | UPF_IOREMAP)
153 static struct plat_serial8250_port ar71xx_uart_data[] = {
154 {
155 .mapbase = AR71XX_UART_BASE,
156 .irq = AR71XX_MISC_IRQ_UART,
157 .flags = AR71XX_UART_FLAGS,
158 .iotype = UPIO_MEM32,
159 .regshift = 2,
160 }, {
161 /* terminating entry */
162 }
163 };
164
165 static struct platform_device ar71xx_uart_device = {
166 .name = "serial8250",
167 .id = PLAT8250_DEV_PLATFORM,
168 .resource = ar71xx_uart_resources,
169 .num_resources = ARRAY_SIZE(ar71xx_uart_resources),
170 .dev = {
171 .platform_data = ar71xx_uart_data
172 },
173 };
174
175 static void __init ar71xx_add_device_uart(void)
176 {
177 ar71xx_uart_data[0].uartclk = ar71xx_ahb_freq;
178 platform_device_register(&ar71xx_uart_device);
179 }
180 #endif /* CONFIG_AR71XX_EARLY_SERIAL */
181
182 static struct resource ar71xx_mdio_resources[] = {
183 {
184 .name = "mdio_base",
185 .flags = IORESOURCE_MEM,
186 .start = AR71XX_GE0_BASE + 0x20,
187 .end = AR71XX_GE0_BASE + 0x38 - 1,
188 }
189 };
190
191 static struct ag71xx_mdio_platform_data ar71xx_mdio_data = {
192 .phy_mask = 0xffffffff,
193 };
194
195 static struct platform_device ar71xx_mdio_device = {
196 .name = "ag71xx-mdio",
197 .id = -1,
198 .resource = ar71xx_mdio_resources,
199 .num_resources = ARRAY_SIZE(ar71xx_mdio_resources),
200 .dev = {
201 .platform_data = &ar71xx_mdio_data,
202 },
203 };
204
205 void __init ar71xx_add_device_mdio(u32 phy_mask)
206 {
207 ar71xx_mdio_data.phy_mask = phy_mask;
208 platform_device_register(&ar71xx_mdio_device);
209 }
210
211 static void ar71xx_set_pll(u32 cfg_reg, u32 pll_reg, u32 pll_val, u32 shift)
212 {
213 void __iomem *base;
214 u32 t;
215
216 base = ioremap_nocache(AR71XX_PLL_BASE, AR71XX_PLL_SIZE);
217
218 t = __raw_readl(base + cfg_reg);
219 t &= ~(3 << shift);
220 t |= (2 << shift);
221 __raw_writel(t, base + cfg_reg);
222 udelay(100);
223
224 __raw_writel(pll_val, base + pll_reg);
225
226 t |= (3 << shift);
227 __raw_writel(t, base + cfg_reg);
228 udelay(100);
229
230 t &= ~(3 << shift);
231 __raw_writel(t, base + cfg_reg);
232 udelay(100);
233
234 printk(KERN_DEBUG "ar71xx: pll_reg %#x: %#x\n",
235 (unsigned int)(base + pll_reg), __raw_readl(base + pll_reg));
236
237 iounmap(base);
238 }
239
240 static void ar71xx_set_pll_ge0(u32 val)
241 {
242 ar71xx_set_pll(AR71XX_PLL_REG_SEC_CONFIG, AR71XX_PLL_REG_ETH0_INT_CLOCK,
243 val, AR71XX_ETH0_PLL_SHIFT);
244 }
245
246 static void ar71xx_set_pll_ge1(u32 val)
247 {
248 ar71xx_set_pll(AR71XX_PLL_REG_SEC_CONFIG, AR71XX_PLL_REG_ETH1_INT_CLOCK,
249 val, AR71XX_ETH1_PLL_SHIFT);
250 }
251
252 static void ar91xx_set_pll_ge0(u32 val)
253 {
254 ar71xx_set_pll(AR91XX_PLL_REG_ETH_CONFIG, AR91XX_PLL_REG_ETH0_INT_CLOCK,
255 val, AR91XX_ETH0_PLL_SHIFT);
256 }
257
258 static void ar91xx_set_pll_ge1(u32 val)
259 {
260 ar71xx_set_pll(AR91XX_PLL_REG_ETH_CONFIG, AR91XX_PLL_REG_ETH1_INT_CLOCK,
261 val, AR91XX_ETH1_PLL_SHIFT);
262 }
263
264 static void ar71xx_ddr_flush_ge0(void)
265 {
266 ar71xx_ddr_flush(AR71XX_DDR_REG_FLUSH_GE0);
267 }
268
269 static void ar71xx_ddr_flush_ge1(void)
270 {
271 ar71xx_ddr_flush(AR71XX_DDR_REG_FLUSH_GE1);
272 }
273
274 static void ar91xx_ddr_flush_ge0(void)
275 {
276 ar71xx_ddr_flush(AR91XX_DDR_REG_FLUSH_GE0);
277 }
278
279 static void ar91xx_ddr_flush_ge1(void)
280 {
281 ar71xx_ddr_flush(AR91XX_DDR_REG_FLUSH_GE1);
282 }
283
284 static struct resource ar71xx_eth0_resources[] = {
285 {
286 .name = "mac_base",
287 .flags = IORESOURCE_MEM,
288 .start = AR71XX_GE0_BASE,
289 .end = AR71XX_GE0_BASE + 0x20 - 1,
290 }, {
291 .name = "mac_base2",
292 .flags = IORESOURCE_MEM,
293 .start = AR71XX_GE0_BASE + 0x38,
294 .end = AR71XX_GE0_BASE + 0x200 - 1,
295 }, {
296 .name = "mii_ctrl",
297 .flags = IORESOURCE_MEM,
298 .start = AR71XX_MII_BASE + MII_REG_MII0_CTRL,
299 .end = AR71XX_MII_BASE + MII_REG_MII0_CTRL + 3,
300 }, {
301 .name = "mac_irq",
302 .flags = IORESOURCE_IRQ,
303 .start = AR71XX_CPU_IRQ_GE0,
304 .end = AR71XX_CPU_IRQ_GE0,
305 },
306 };
307
308 struct ag71xx_platform_data ar71xx_eth0_data = {
309 .reset_bit = RESET_MODULE_GE0_MAC,
310 };
311
312 static struct platform_device ar71xx_eth0_device = {
313 .name = "ag71xx",
314 .id = 0,
315 .resource = ar71xx_eth0_resources,
316 .num_resources = ARRAY_SIZE(ar71xx_eth0_resources),
317 .dev = {
318 .platform_data = &ar71xx_eth0_data,
319 },
320 };
321
322 static struct resource ar71xx_eth1_resources[] = {
323 {
324 .name = "mac_base",
325 .flags = IORESOURCE_MEM,
326 .start = AR71XX_GE1_BASE,
327 .end = AR71XX_GE1_BASE + 0x20 - 1,
328 }, {
329 .name = "mac_base2",
330 .flags = IORESOURCE_MEM,
331 .start = AR71XX_GE1_BASE + 0x38,
332 .end = AR71XX_GE1_BASE + 0x200 - 1,
333 }, {
334 .name = "mii_ctrl",
335 .flags = IORESOURCE_MEM,
336 .start = AR71XX_MII_BASE + MII_REG_MII1_CTRL,
337 .end = AR71XX_MII_BASE + MII_REG_MII1_CTRL + 3,
338 }, {
339 .name = "mac_irq",
340 .flags = IORESOURCE_IRQ,
341 .start = AR71XX_CPU_IRQ_GE1,
342 .end = AR71XX_CPU_IRQ_GE1,
343 },
344 };
345
346 struct ag71xx_platform_data ar71xx_eth1_data = {
347 .reset_bit = RESET_MODULE_GE1_MAC,
348 };
349
350 static struct platform_device ar71xx_eth1_device = {
351 .name = "ag71xx",
352 .id = 1,
353 .resource = ar71xx_eth1_resources,
354 .num_resources = ARRAY_SIZE(ar71xx_eth1_resources),
355 .dev = {
356 .platform_data = &ar71xx_eth1_data,
357 },
358 };
359
360 static int ar71xx_eth_instance __initdata;
361 void __init ar71xx_add_device_eth(unsigned int id)
362 {
363 struct platform_device *pdev;
364 struct ag71xx_platform_data *pdata;
365
366 switch (id) {
367 case 0:
368 switch (ar71xx_eth0_data.phy_if_mode) {
369 case PHY_INTERFACE_MODE_MII:
370 ar71xx_eth0_data.mii_if = MII0_CTRL_IF_MII;
371 break;
372 case PHY_INTERFACE_MODE_GMII:
373 ar71xx_eth0_data.mii_if = MII0_CTRL_IF_GMII;
374 break;
375 case PHY_INTERFACE_MODE_RGMII:
376 ar71xx_eth0_data.mii_if = MII0_CTRL_IF_RGMII;
377 break;
378 case PHY_INTERFACE_MODE_RMII:
379 ar71xx_eth0_data.mii_if = MII0_CTRL_IF_RMII;
380 break;
381 default:
382 printk(KERN_ERR "ar71xx: invalid PHY interface mode "
383 "for eth0\n");
384 return;
385 }
386 pdev = &ar71xx_eth0_device;
387 break;
388 case 1:
389 switch (ar71xx_eth1_data.phy_if_mode) {
390 case PHY_INTERFACE_MODE_RMII:
391 ar71xx_eth1_data.mii_if = MII1_CTRL_IF_RMII;
392 break;
393 case PHY_INTERFACE_MODE_RGMII:
394 ar71xx_eth1_data.mii_if = MII1_CTRL_IF_RGMII;
395 break;
396 default:
397 printk(KERN_ERR "ar71xx: invalid PHY interface mode "
398 "for eth1\n");
399 return;
400 }
401 pdev = &ar71xx_eth1_device;
402 break;
403 default:
404 printk(KERN_ERR "ar71xx: invalid ethernet id %d\n", id);
405 return;
406 }
407
408 pdata = pdev->dev.platform_data;
409
410 switch (ar71xx_soc) {
411 case AR71XX_SOC_AR7130:
412 pdata->ddr_flush = id ? ar71xx_ddr_flush_ge1
413 : ar71xx_ddr_flush_ge0;
414 pdata->set_pll = id ? ar71xx_set_pll_ge1
415 : ar71xx_set_pll_ge0;
416 break;
417
418 case AR71XX_SOC_AR7141:
419 case AR71XX_SOC_AR7161:
420 pdata->ddr_flush = id ? ar71xx_ddr_flush_ge1
421 : ar71xx_ddr_flush_ge0;
422 pdata->set_pll = id ? ar71xx_set_pll_ge1
423 : ar71xx_set_pll_ge0;
424 pdata->has_gbit = 1;
425 break;
426
427 case AR71XX_SOC_AR9130:
428 pdata->ddr_flush = id ? ar91xx_ddr_flush_ge1
429 : ar91xx_ddr_flush_ge0;
430 pdata->set_pll = id ? ar91xx_set_pll_ge1
431 : ar91xx_set_pll_ge0;
432 pdata->is_ar91xx = 1;
433 break;
434
435 case AR71XX_SOC_AR9132:
436 pdata->ddr_flush = id ? ar91xx_ddr_flush_ge1
437 : ar91xx_ddr_flush_ge0;
438 pdata->set_pll = id ? ar91xx_set_pll_ge1
439 : ar91xx_set_pll_ge0;
440 pdata->is_ar91xx = 1;
441 pdata->has_gbit = 1;
442 break;
443
444 default:
445 BUG();
446 }
447
448 switch (pdata->phy_if_mode) {
449 case PHY_INTERFACE_MODE_GMII:
450 case PHY_INTERFACE_MODE_RGMII:
451 if (!pdata->has_gbit) {
452 printk(KERN_ERR "ar71xx: no gbit available on eth%d\n",
453 id);
454 return;
455 }
456 /* fallthrough */
457 default:
458 break;
459 }
460
461 memcpy(pdata->mac_addr, ar71xx_mac_base, ETH_ALEN);
462 pdata->mac_addr[5] += ar71xx_eth_instance;
463
464 platform_device_register(pdev);
465 ar71xx_eth_instance++;
466 }
467
468 static struct resource ar71xx_spi_resources[] = {
469 [0] = {
470 .start = AR71XX_SPI_BASE,
471 .end = AR71XX_SPI_BASE + AR71XX_SPI_SIZE - 1,
472 .flags = IORESOURCE_MEM,
473 },
474 };
475
476 static struct platform_device ar71xx_spi_device = {
477 .name = "ar71xx-spi",
478 .id = -1,
479 .resource = ar71xx_spi_resources,
480 .num_resources = ARRAY_SIZE(ar71xx_spi_resources),
481 };
482
483 void __init ar71xx_add_device_spi(struct ar71xx_spi_platform_data *pdata,
484 struct spi_board_info const *info,
485 unsigned n)
486 {
487 ar71xx_gpio_function_enable(GPIO_FUNC_SPI_EN);
488
489 spi_register_board_info(info, n);
490 ar71xx_spi_device.dev.platform_data = pdata;
491 platform_device_register(&ar71xx_spi_device);
492 }
493
494 void __init ar71xx_add_device_leds_gpio(int id, unsigned num_leds,
495 struct gpio_led *leds)
496 {
497 struct platform_device *pdev;
498 struct gpio_led_platform_data pdata;
499 struct gpio_led *p;
500 int err;
501
502 p = kmalloc(num_leds * sizeof(*p), GFP_KERNEL);
503 if (!p)
504 return;
505
506 memcpy(p, leds, num_leds * sizeof(*p));
507
508 pdev = platform_device_alloc("leds-gpio", id);
509 if (!pdev)
510 goto err_free_leds;
511
512 memset(&pdata, 0, sizeof(pdata));
513 pdata.num_leds = num_leds;
514 pdata.leds = leds;
515
516 err = platform_device_add_data(pdev, &pdata, sizeof(pdata));
517 if (err)
518 goto err_put_pdev;
519
520 err = platform_device_add(pdev);
521 if (err)
522 goto err_put_pdev;
523
524 return;
525
526 err_put_pdev:
527 platform_device_put(pdev);
528
529 err_free_leds:
530 kfree(p);
531 }
532
533 void __init ar71xx_add_device_gpio_buttons(int id,
534 unsigned poll_interval,
535 unsigned nbuttons,
536 struct gpio_button *buttons)
537 {
538 struct platform_device *pdev;
539 struct gpio_buttons_platform_data pdata;
540 struct gpio_button *p;
541 int err;
542
543 p = kmalloc(nbuttons * sizeof(*p), GFP_KERNEL);
544 if (!p)
545 return;
546
547 memcpy(p, buttons, nbuttons * sizeof(*p));
548
549 pdev = platform_device_alloc("gpio-buttons", id);
550 if (!pdev)
551 goto err_free_buttons;
552
553 memset(&pdata, 0, sizeof(pdata));
554 pdata.poll_interval = poll_interval;
555 pdata.nbuttons = nbuttons;
556 pdata.buttons = p;
557
558 err = platform_device_add_data(pdev, &pdata, sizeof(pdata));
559 if (err)
560 goto err_put_pdev;
561
562
563 err = platform_device_add(pdev);
564 if (err)
565 goto err_put_pdev;
566
567 return;
568
569 err_put_pdev:
570 platform_device_put(pdev);
571
572 err_free_buttons:
573 kfree(p);
574 }
575
576 void __init ar71xx_add_device_wdt(void)
577 {
578 platform_device_register_simple("ar71xx-wdt", -1, NULL, 0);
579 }
580
581 void __init ar71xx_set_mac_base(unsigned char *mac)
582 {
583 memcpy(ar71xx_mac_base, mac, ETH_ALEN);
584 }
585
586 void __init ar71xx_parse_mac_addr(char *mac_str)
587 {
588 u8 tmp[ETH_ALEN];
589 int t;
590
591 t = sscanf(mac_str, "%02hhx:%02hhx:%02hhx:%02hhx:%02hhx:%02hhx",
592 &tmp[0], &tmp[1], &tmp[2], &tmp[3], &tmp[4], &tmp[5]);
593
594 if (t == ETH_ALEN)
595 ar71xx_set_mac_base(tmp);
596 else
597 printk(KERN_DEBUG "ar71xx: failed to parse mac address "
598 "\"%s\"\n", mac_str);
599 }
600
601 static int __init ar71xx_machine_setup(void)
602 {
603 ar71xx_gpio_init();
604
605 ar71xx_add_device_uart();
606 ar71xx_add_device_wdt();
607
608 mips_machine_setup(ar71xx_mach_type);
609 return 0;
610 }
611
612 arch_initcall(ar71xx_machine_setup);