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[ar71xx] enable gigabit feature if the SoC supports it
[openwrt/svn-archive/archive.git] / target / linux / ar71xx / files / arch / mips / ar71xx / platform.c
1 /*
2 * Atheros AR71xx SoC platform devices
3 *
4 * Copyright (C) 2008 Gabor Juhos <juhosg@openwrt.org>
5 * Copyright (C) 2008 Imre Kaloz <kaloz@openwrt.org>
6 *
7 * Parts of this file are based on Atheros' 2.6.15 BSP
8 *
9 * This program is free software; you can redistribute it and/or modify it
10 * under the terms of the GNU General Public License version 2 as published
11 * by the Free Software Foundation.
12 */
13
14 #include <linux/kernel.h>
15 #include <linux/init.h>
16 #include <linux/delay.h>
17 #include <linux/dma-mapping.h>
18 #include <linux/platform_device.h>
19 #include <linux/serial_8250.h>
20
21 #include <asm/mips_machine.h>
22 #include <asm/mach-ar71xx/ar71xx.h>
23 #include <asm/mach-ar71xx/platform.h>
24
25 static u8 ar71xx_mac_base[ETH_ALEN] __initdata;
26
27 /*
28 * OHCI (USB full speed host controller)
29 */
30 static struct resource ar71xx_usb_ohci_resources[] = {
31 [0] = {
32 .start = AR71XX_OHCI_BASE,
33 .end = AR71XX_OHCI_BASE + AR71XX_OHCI_SIZE - 1,
34 .flags = IORESOURCE_MEM,
35 },
36 [1] = {
37 .start = AR71XX_MISC_IRQ_OHCI,
38 .end = AR71XX_MISC_IRQ_OHCI,
39 .flags = IORESOURCE_IRQ,
40 },
41 };
42
43 static u64 ar71xx_ohci_dmamask = DMA_BIT_MASK(32);
44 static struct platform_device ar71xx_usb_ohci_device = {
45 .name = "ar71xx-ohci",
46 .id = -1,
47 .resource = ar71xx_usb_ohci_resources,
48 .num_resources = ARRAY_SIZE(ar71xx_usb_ohci_resources),
49 .dev = {
50 .dma_mask = &ar71xx_ohci_dmamask,
51 .coherent_dma_mask = DMA_BIT_MASK(32),
52 },
53 };
54
55 /*
56 * EHCI (USB full speed host controller)
57 */
58 static struct resource ar71xx_usb_ehci_resources[] = {
59 [0] = {
60 .start = AR71XX_EHCI_BASE,
61 .end = AR71XX_EHCI_BASE + AR71XX_EHCI_SIZE - 1,
62 .flags = IORESOURCE_MEM,
63 },
64 [1] = {
65 .start = AR71XX_CPU_IRQ_USB,
66 .end = AR71XX_CPU_IRQ_USB,
67 .flags = IORESOURCE_IRQ,
68 },
69 };
70
71 static u64 ar71xx_ehci_dmamask = DMA_BIT_MASK(32);
72 static struct platform_device ar71xx_usb_ehci_device = {
73 .name = "ar71xx-ehci",
74 .id = -1,
75 .resource = ar71xx_usb_ehci_resources,
76 .num_resources = ARRAY_SIZE(ar71xx_usb_ehci_resources),
77 .dev = {
78 .dma_mask = &ar71xx_ehci_dmamask,
79 .coherent_dma_mask = DMA_BIT_MASK(32),
80 },
81 };
82
83 #define AR71XX_USB_RESET_MASK \
84 (RESET_MODULE_USB_HOST | RESET_MODULE_USB_PHY \
85 | RESET_MODULE_USB_OHCI_DLL)
86
87 void __init ar71xx_add_device_usb(void)
88 {
89 ar71xx_device_stop(AR71XX_USB_RESET_MASK);
90 mdelay(1000);
91 ar71xx_device_start(AR71XX_USB_RESET_MASK);
92
93 /* Turning on the Buff and Desc swap bits */
94 ar71xx_usb_ctrl_wr(USB_CTRL_REG_CONFIG, 0xf0000);
95
96 /* WAR for HW bug. Here it adjusts the duration between two SOFS */
97 ar71xx_usb_ctrl_wr(USB_CTRL_REG_FLADJ, 0x20c00);
98
99 mdelay(900);
100
101 platform_device_register(&ar71xx_usb_ohci_device);
102 platform_device_register(&ar71xx_usb_ehci_device);
103 }
104
105 #ifdef CONFIG_AR71XX_EARLY_SERIAL
106 static void __init ar71xx_add_device_uart(void) {};
107 #else
108 static struct resource ar71xx_uart_resources[] = {
109 {
110 .start = AR71XX_UART_BASE,
111 .end = AR71XX_UART_BASE + AR71XX_UART_SIZE - 1,
112 .flags = IORESOURCE_MEM,
113 },
114 };
115
116 #define AR71XX_UART_FLAGS (UPF_BOOT_AUTOCONF | UPF_SKIP_TEST | UPF_IOREMAP)
117 static struct plat_serial8250_port ar71xx_uart_data[] = {
118 {
119 .mapbase = AR71XX_UART_BASE,
120 .irq = AR71XX_MISC_IRQ_UART,
121 .flags = AR71XX_UART_FLAGS,
122 .iotype = UPIO_MEM32,
123 .regshift = 2,
124 }, {
125 /* terminating entry */
126 }
127 };
128
129 static struct platform_device ar71xx_uart_device = {
130 .name = "serial8250",
131 .id = PLAT8250_DEV_PLATFORM,
132 .resource = ar71xx_uart_resources,
133 .num_resources = ARRAY_SIZE(ar71xx_uart_resources),
134 .dev = {
135 .platform_data = ar71xx_uart_data
136 },
137 };
138
139 static void __init ar71xx_add_device_uart(void)
140 {
141 ar71xx_uart_data[0].uartclk = ar71xx_ahb_freq;
142 platform_device_register(&ar71xx_uart_device);
143 }
144 #endif /* CONFIG_AR71XX_EARLY_SERIAL */
145
146 static struct resource ar71xx_mdio_resources[] = {
147 {
148 .name = "mdio_base",
149 .flags = IORESOURCE_MEM,
150 .start = AR71XX_GE0_BASE + 0x20,
151 .end = AR71XX_GE0_BASE + 0x38 - 1,
152 }
153 };
154
155 static struct ag71xx_mdio_platform_data ar71xx_mdio_data = {
156 .phy_mask = 0xffffffff,
157 };
158
159 static struct platform_device ar71xx_mdio_device = {
160 .name = "ag71xx-mdio",
161 .id = -1,
162 .resource = ar71xx_mdio_resources,
163 .num_resources = ARRAY_SIZE(ar71xx_mdio_resources),
164 .dev = {
165 .platform_data = &ar71xx_mdio_data,
166 },
167 };
168
169 void __init ar71xx_add_device_mdio(u32 phy_mask)
170 {
171 ar71xx_mdio_data.phy_mask = phy_mask;
172 platform_device_register(&ar71xx_mdio_device);
173 }
174
175 static struct resource ar71xx_eth0_resources[] = {
176 {
177 .name = "mac_base",
178 .flags = IORESOURCE_MEM,
179 .start = AR71XX_GE0_BASE,
180 .end = AR71XX_GE0_BASE + 0x20 - 1,
181 }, {
182 .name = "mac_base2",
183 .flags = IORESOURCE_MEM,
184 .start = AR71XX_GE0_BASE + 0x38,
185 .end = AR71XX_GE0_BASE + 0x200 - 1,
186 }, {
187 .name = "mii_ctrl",
188 .flags = IORESOURCE_MEM,
189 .start = AR71XX_MII_BASE + MII_REG_MII0_CTRL,
190 .end = AR71XX_MII_BASE + MII_REG_MII0_CTRL + 3,
191 }, {
192 .name = "mac_irq",
193 .flags = IORESOURCE_IRQ,
194 .start = AR71XX_CPU_IRQ_GE0,
195 .end = AR71XX_CPU_IRQ_GE0,
196 },
197 };
198
199 struct ag71xx_platform_data ar71xx_eth0_data = {
200 .reset_bit = RESET_MODULE_GE0_MAC,
201 .flush_reg = DDR_REG_FLUSH_GE0,
202 };
203
204 static struct platform_device ar71xx_eth0_device = {
205 .name = "ag71xx",
206 .id = 0,
207 .resource = ar71xx_eth0_resources,
208 .num_resources = ARRAY_SIZE(ar71xx_eth0_resources),
209 .dev = {
210 .platform_data = &ar71xx_eth0_data,
211 },
212 };
213
214 static struct resource ar71xx_eth1_resources[] = {
215 {
216 .name = "mac_base",
217 .flags = IORESOURCE_MEM,
218 .start = AR71XX_GE1_BASE,
219 .end = AR71XX_GE1_BASE + 0x20 - 1,
220 }, {
221 .name = "mac_base2",
222 .flags = IORESOURCE_MEM,
223 .start = AR71XX_GE1_BASE + 0x38,
224 .end = AR71XX_GE1_BASE + 0x200 - 1,
225 }, {
226 .name = "mii_ctrl",
227 .flags = IORESOURCE_MEM,
228 .start = AR71XX_MII_BASE + MII_REG_MII1_CTRL,
229 .end = AR71XX_MII_BASE + MII_REG_MII1_CTRL + 3,
230 }, {
231 .name = "mac_irq",
232 .flags = IORESOURCE_IRQ,
233 .start = AR71XX_CPU_IRQ_GE1,
234 .end = AR71XX_CPU_IRQ_GE1,
235 },
236 };
237
238 struct ag71xx_platform_data ar71xx_eth1_data = {
239 .reset_bit = RESET_MODULE_GE1_MAC,
240 .flush_reg = DDR_REG_FLUSH_GE1,
241 };
242
243 static struct platform_device ar71xx_eth1_device = {
244 .name = "ag71xx",
245 .id = 1,
246 .resource = ar71xx_eth1_resources,
247 .num_resources = ARRAY_SIZE(ar71xx_eth1_resources),
248 .dev = {
249 .platform_data = &ar71xx_eth1_data,
250 },
251 };
252
253 static int ar71xx_eth_instance __initdata;
254 void __init ar71xx_add_device_eth(unsigned int id)
255 {
256 struct platform_device *pdev;
257 struct ag71xx_platform_data *pdata;
258
259 switch (id) {
260 case 0:
261 switch (ar71xx_eth0_data.phy_if_mode) {
262 case PHY_INTERFACE_MODE_MII:
263 ar71xx_eth0_data.mii_if = MII0_CTRL_IF_MII;
264 break;
265 case PHY_INTERFACE_MODE_GMII:
266 ar71xx_eth0_data.mii_if = MII0_CTRL_IF_GMII;
267 break;
268 case PHY_INTERFACE_MODE_RGMII:
269 ar71xx_eth0_data.mii_if = MII0_CTRL_IF_RGMII;
270 break;
271 case PHY_INTERFACE_MODE_RMII:
272 ar71xx_eth0_data.mii_if = MII0_CTRL_IF_RMII;
273 break;
274 default:
275 printk(KERN_ERR "ar71xx: invalid PHY interface mode "
276 "for eth0\n");
277 return;
278 }
279 pdev = &ar71xx_eth0_device;
280 break;
281 case 1:
282 switch (ar71xx_eth1_data.phy_if_mode) {
283 case PHY_INTERFACE_MODE_RMII:
284 ar71xx_eth1_data.mii_if = MII1_CTRL_IF_RMII;
285 break;
286 case PHY_INTERFACE_MODE_RGMII:
287 ar71xx_eth1_data.mii_if = MII1_CTRL_IF_RGMII;
288 break;
289 default:
290 printk(KERN_ERR "ar71xx: invalid PHY interface mode "
291 "for eth1\n");
292 return;
293 }
294 pdev = &ar71xx_eth1_device;
295 break;
296 default:
297 printk(KERN_ERR "ar71xx: invalid ethernet id %d\n", id);
298 return;
299 }
300
301 pdata = pdev->dev.platform_data;
302
303 switch (ar71xx_soc) {
304 case AR71XX_SOC_AR7141:
305 case AR71XX_SOC_AR7161:
306 case AR71XX_SOC_AR9132:
307 pdata->has_gbit = 1;
308 break;
309
310 case AR71XX_SOC_AR7130:
311 case AR71XX_SOC_AR9130:
312 break;
313
314 default:
315 BUG();
316 }
317
318 switch (pdata->phy_if_mode) {
319 case PHY_INTERFACE_MODE_GMII:
320 case PHY_INTERFACE_MODE_RGMII:
321 if (!pdata->has_gbit) {
322 printk(KERN_ERR "ar71xx: no gigabit available on eth%d\n",
323 id);
324 return;
325 }
326 /* fallthrough */
327 default:
328 break;
329 }
330
331 memcpy(pdata->mac_addr, ar71xx_mac_base, ETH_ALEN);
332 pdata->mac_addr[5] += ar71xx_eth_instance;
333
334 platform_device_register(pdev);
335 ar71xx_eth_instance++;
336 }
337
338 static struct resource ar71xx_spi_resources[] = {
339 [0] = {
340 .start = AR71XX_SPI_BASE,
341 .end = AR71XX_SPI_BASE + AR71XX_SPI_SIZE - 1,
342 .flags = IORESOURCE_MEM,
343 },
344 };
345
346 static struct platform_device ar71xx_spi_device = {
347 .name = "ar71xx-spi",
348 .id = -1,
349 .resource = ar71xx_spi_resources,
350 .num_resources = ARRAY_SIZE(ar71xx_spi_resources),
351 };
352
353 void __init ar71xx_add_device_spi(struct ar71xx_spi_platform_data *pdata,
354 struct spi_board_info const *info,
355 unsigned n)
356 {
357 ar71xx_gpio_function_enable(GPIO_FUNC_SPI_EN);
358
359 spi_register_board_info(info, n);
360 ar71xx_spi_device.dev.platform_data = pdata;
361 platform_device_register(&ar71xx_spi_device);
362 }
363
364 void __init ar71xx_add_device_leds_gpio(int id, unsigned num_leds,
365 struct gpio_led *leds)
366 {
367 struct platform_device *pdev;
368 struct gpio_led_platform_data pdata;
369 struct gpio_led *p;
370 int err;
371
372 p = kmalloc(num_leds * sizeof(*p), GFP_KERNEL);
373 if (!p)
374 return;
375
376 memcpy(p, leds, num_leds * sizeof(*p));
377
378 pdev = platform_device_alloc("leds-gpio", id);
379 if (!pdev)
380 goto err_free_leds;
381
382 memset(&pdata, 0, sizeof(pdata));
383 pdata.num_leds = num_leds;
384 pdata.leds = leds;
385
386 err = platform_device_add_data(pdev, &pdata, sizeof(pdata));
387 if (err)
388 goto err_put_pdev;
389
390 err = platform_device_add(pdev);
391 if (err)
392 goto err_put_pdev;
393
394 return;
395
396 err_put_pdev:
397 platform_device_put(pdev);
398
399 err_free_leds:
400 kfree(p);
401 }
402
403 void __init ar71xx_add_device_gpio_buttons(int id,
404 unsigned poll_interval,
405 unsigned nbuttons,
406 struct gpio_button *buttons)
407 {
408 struct platform_device *pdev;
409 struct gpio_buttons_platform_data pdata;
410 struct gpio_button *p;
411 int err;
412
413 p = kmalloc(nbuttons * sizeof(*p), GFP_KERNEL);
414 if (!p)
415 return;
416
417 memcpy(p, buttons, nbuttons * sizeof(*p));
418
419 pdev = platform_device_alloc("gpio-buttons", id);
420 if (!pdev)
421 goto err_free_buttons;
422
423 memset(&pdata, 0, sizeof(pdata));
424 pdata.poll_interval = poll_interval;
425 pdata.nbuttons = nbuttons;
426 pdata.buttons = p;
427
428 err = platform_device_add_data(pdev, &pdata, sizeof(pdata));
429 if (err)
430 goto err_put_pdev;
431
432
433 err = platform_device_add(pdev);
434 if (err)
435 goto err_put_pdev;
436
437 return;
438
439 err_put_pdev:
440 platform_device_put(pdev);
441
442 err_free_buttons:
443 kfree(p);
444 }
445
446 void __init ar71xx_add_device_wdt(void)
447 {
448 platform_device_register_simple("ar71xx-wdt", -1, NULL, 0);
449 }
450
451 void __init ar71xx_set_mac_base(unsigned char *mac)
452 {
453 memcpy(ar71xx_mac_base, mac, ETH_ALEN);
454 }
455
456 void __init ar71xx_parse_mac_addr(char *mac_str)
457 {
458 u8 tmp[ETH_ALEN];
459 int t;
460
461 t = sscanf(mac_str, "%02hhx:%02hhx:%02hhx:%02hhx:%02hhx:%02hhx",
462 &tmp[0], &tmp[1], &tmp[2], &tmp[3], &tmp[4], &tmp[5]);
463
464 if (t == ETH_ALEN)
465 ar71xx_set_mac_base(tmp);
466 else
467 printk(KERN_DEBUG "ar71xx: failed to parse mac address "
468 "\"%s\"\n", mac_str);
469 }
470
471 static int __init ar71xx_machine_setup(void)
472 {
473 ar71xx_gpio_init();
474
475 ar71xx_add_device_uart();
476 ar71xx_add_device_wdt();
477
478 mips_machine_setup();
479 return 0;
480 }
481
482 arch_initcall(ar71xx_machine_setup);
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