target/linux/ar71xx/files/arch/mips/ath79/mach-archer-c7.c

   1 /*
   2  * TP-LINK Archer C7 board support
   3  *
   4  * Copyright (c) 2013 Gabor Juhos <juhosg@openwrt.org>
   5  *
   6  * Based on the Qualcomm Atheros AP135/AP136 reference board support code
   7  *   Copyright (c) 2012 Qualcomm Atheros
   8  *
   9  * Permission to use, copy, modify, and/or distribute this software for any
  10  * purpose with or without fee is hereby granted, provided that the above
  11  * copyright notice and this permission notice appear in all copies.
  12  *
  13  * THE SOFTWARE IS PROVIDED "AS IS" AND THE AUTHOR DISCLAIMS ALL WARRANTIES
  14  * WITH REGARD TO THIS SOFTWARE INCLUDING ALL IMPLIED WARRANTIES OF
  15  * MERCHANTABILITY AND FITNESS. IN NO EVENT SHALL THE AUTHOR BE LIABLE FOR
  16  * ANY SPECIAL, DIRECT, INDIRECT, OR CONSEQUENTIAL DAMAGES OR ANY DAMAGES
  17  * WHATSOEVER RESULTING FROM LOSS OF USE, DATA OR PROFITS, WHETHER IN AN
  18  * ACTION OF CONTRACT, NEGLIGENCE OR OTHER TORTIOUS ACTION, ARISING OUT OF
  19  * OR IN CONNECTION WITH THE USE OR PERFORMANCE OF THIS SOFTWARE.
  20  *
  21  */
  22
  23 #include <linux/pci.h>
  24 #include <linux/phy.h>
  25 #include <linux/gpio.h>
  26 #include <linux/platform_device.h>
  27 //#include <linux/ath9k_platform.h>
  28 #include <linux/ar8216_platform.h>
  29
  30 #include <asm/mach-ath79/ar71xx_regs.h>
  31
  32 #include "common.h"
  33 #include "dev-eth.h"
  34 #include "dev-gpio-buttons.h"
  35 #include "dev-leds-gpio.h"
  36 #include "dev-m25p80.h"
  37 #include "dev-spi.h"
  38 #include "dev-usb.h"
  39 #include "dev-wmac.h"
  40 #include "machtypes.h"
  41 #include "pci.h"
  42
  43 #define ARCHER_C7_GPIO_LED_WLAN2G       12
  44 #define ARCHER_C7_GPIO_LED_SYSTEM       14
  45 #define ARCHER_C7_GPIO_LED_QSS          15
  46 #define ARCHER_C7_GPIO_LED_WLAN5G       17
  47 #define ARCHER_C7_GPIO_LED_USB1         18
  48 #define ARCHER_C7_GPIO_LED_USB2         19
  49
  50 #define ARCHER_C7_GPIO_BTN_RFKILL       13
  51 #define ARCHER_C7_GPIO_BTN_RESET        16
  52
  53 #define ARCHER_C7_GPIO_USB1_POWER       22
  54 #define ARCHER_C7_GPIO_USB2_POWER       21
  55
  56 #define ARCHER_C7_KEYS_POLL_INTERVAL    20      /* msecs */
  57 #define ARCHER_C7_KEYS_DEBOUNCE_INTERVAL (3 * ARCHER_C7_KEYS_POLL_INTERVAL)
  58
  59 #define ARCHER_C7_WMAC_CALDATA_OFFSET   0x1000
  60
  61 static const char *archer_c7_part_probes[] = {
  62         "tp-link",
  63         NULL,
  64 };
  65
  66 static struct flash_platform_data archer_c7_flash_data = {
  67         .part_probes    = archer_c7_part_probes,
  68 };
  69
  70 static struct gpio_led archer_c7_leds_gpio[] __initdata = {
  71         {
  72                 .name           = "tp-link:blue:qss",
  73                 .gpio           = ARCHER_C7_GPIO_LED_QSS,
  74                 .active_low     = 1,
  75         },
  76         {
  77                 .name           = "tp-link:blue:system",
  78                 .gpio           = ARCHER_C7_GPIO_LED_SYSTEM,
  79                 .active_low     = 1,
  80         },
  81         {
  82                 .name           = "tp-link:blue:wlan2g",
  83                 .gpio           = ARCHER_C7_GPIO_LED_WLAN2G,
  84                 .active_low     = 1,
  85         },
  86         {
  87                 .name           = "tp-link:blue:wlan5g",
  88                 .gpio           = ARCHER_C7_GPIO_LED_WLAN5G,
  89                 .active_low     = 1,
  90         },
  91         {
  92                 .name           = "tp-link:green:usb1",
  93                 .gpio           = ARCHER_C7_GPIO_LED_USB1,
  94                 .active_low     = 1,
  95         },
  96         {
  97                 .name           = "tp-link:green:usb2",
  98                 .gpio           = ARCHER_C7_GPIO_LED_USB2,
  99                 .active_low     = 1,
 100         },
 101 };
 102
 103 static struct gpio_keys_button archer_c7_gpio_keys[] __initdata = {
 104         {
 105                 .desc           = "Reset button",
 106                 .type           = EV_KEY,
 107                 .code           = KEY_WPS_BUTTON,
 108                 .debounce_interval = ARCHER_C7_KEYS_DEBOUNCE_INTERVAL,
 109                 .gpio           = ARCHER_C7_GPIO_BTN_RESET,
 110                 .active_low     = 1,
 111         },
 112         {
 113                 .desc           = "RFKILL switch",
 114                 .type           = EV_SW,
 115                 .code           = KEY_RFKILL,
 116                 .debounce_interval = ARCHER_C7_KEYS_DEBOUNCE_INTERVAL,
 117                 .gpio           = ARCHER_C7_GPIO_BTN_RFKILL,
 118         },
 119 };
 120
 121 static const struct ar8327_led_info archer_c7_leds_ar8327[] __initconst = {
 122         AR8327_LED_INFO(PHY0_0, HW, "tp-link:blue:wan"),
 123         AR8327_LED_INFO(PHY1_0, HW, "tp-link:blue:lan1"),
 124         AR8327_LED_INFO(PHY2_0, HW, "tp-link:blue:lan2"),
 125         AR8327_LED_INFO(PHY3_0, HW, "tp-link:blue:lan3"),
 126         AR8327_LED_INFO(PHY4_0, HW, "tp-link:blue:lan4"),
 127 };
 128
 129 /* GMAC0 of the AR8327 switch is connected to the QCA9558 SoC via SGMII */
 130 static struct ar8327_pad_cfg archer_c7_ar8327_pad0_cfg = {
 131         .mode = AR8327_PAD_MAC_SGMII,
 132         .sgmii_delay_en = true,
 133 };
 134
 135 /* GMAC6 of the AR8327 switch is connected to the QCA9558 SoC via RGMII */
 136 static struct ar8327_pad_cfg archer_c7_ar8327_pad6_cfg = {
 137         .mode = AR8327_PAD_MAC_RGMII,
 138         .txclk_delay_en = true,
 139         .rxclk_delay_en = true,
 140         .txclk_delay_sel = AR8327_CLK_DELAY_SEL1,
 141         .rxclk_delay_sel = AR8327_CLK_DELAY_SEL2,
 142 };
 143
 144 static struct ar8327_led_cfg archer_c7_ar8327_led_cfg = {
 145         .led_ctrl0 = 0xc737c737,
 146         .led_ctrl1 = 0x00000000,
 147         .led_ctrl2 = 0x00000000,
 148         .led_ctrl3 = 0x0030c300,
 149         .open_drain = false,
 150 };
 151
 152 static struct ar8327_platform_data archer_c7_ar8327_data = {
 153         .pad0_cfg = &archer_c7_ar8327_pad0_cfg,
 154         .pad6_cfg = &archer_c7_ar8327_pad6_cfg,
 155         .port0_cfg = {
 156                 .force_link = 1,
 157                 .speed = AR8327_PORT_SPEED_1000,
 158                 .duplex = 1,
 159                 .txpause = 1,
 160                 .rxpause = 1,
 161         },
 162         .port6_cfg = {
 163                 .force_link = 1,
 164                 .speed = AR8327_PORT_SPEED_1000,
 165                 .duplex = 1,
 166                 .txpause = 1,
 167                 .rxpause = 1,
 168         },
 169         .led_cfg = &archer_c7_ar8327_led_cfg,
 170         .num_leds = ARRAY_SIZE(archer_c7_leds_ar8327),
 171         .leds = archer_c7_leds_ar8327,
 172 };
 173
 174 static struct mdio_board_info archer_c7_mdio0_info[] = {
 175         {
 176                 .bus_id = "ag71xx-mdio.0",
 177                 .phy_addr = 0,
 178                 .platform_data = &archer_c7_ar8327_data,
 179         },
 180 };
 181
 182 static void __init archer_c7_gmac_setup(void)
 183 {
 184         void __iomem *base;
 185         u32 t;
 186
 187         base = ioremap(QCA955X_GMAC_BASE, QCA955X_GMAC_SIZE);
 188
 189         t = __raw_readl(base + QCA955X_GMAC_REG_ETH_CFG);
 190
 191         t &= ~(QCA955X_ETH_CFG_RGMII_EN | QCA955X_ETH_CFG_GE0_SGMII);
 192         t |= QCA955X_ETH_CFG_RGMII_EN;
 193
 194         __raw_writel(t, base + QCA955X_GMAC_REG_ETH_CFG);
 195
 196         iounmap(base);
 197 }
 198
 199 static void __init archer_c7_setup(void)
 200 {
 201         u8 *mac = (u8 *) KSEG1ADDR(0x1f01fc00);
 202         u8 *art = (u8 *) KSEG1ADDR(0x1fff0000);
 203         u8 tmpmac[ETH_ALEN];
 204
 205         ath79_register_m25p80(&archer_c7_flash_data);
 206         ath79_register_leds_gpio(-1, ARRAY_SIZE(archer_c7_leds_gpio),
 207                                  archer_c7_leds_gpio);
 208         ath79_register_gpio_keys_polled(-1, ARCHER_C7_KEYS_POLL_INTERVAL,
 209                                         ARRAY_SIZE(archer_c7_gpio_keys),
 210                                         archer_c7_gpio_keys);
 211
 212         ath79_init_mac(tmpmac, mac, -1);
 213         ath79_register_wmac(art + ARCHER_C7_WMAC_CALDATA_OFFSET, tmpmac);
 214
 215         ath79_register_pci();
 216
 217         mdiobus_register_board_info(archer_c7_mdio0_info,
 218                                     ARRAY_SIZE(archer_c7_mdio0_info));
 219         ath79_register_mdio(0, 0x0);
 220
 221         archer_c7_gmac_setup();
 222
 223         /* GMAC0 is connected to the RMGII interface */
 224         ath79_eth0_data.phy_if_mode = PHY_INTERFACE_MODE_RGMII;
 225         ath79_eth0_data.phy_mask = BIT(0);
 226         ath79_eth0_data.mii_bus_dev = &ath79_mdio0_device.dev;
 227         ath79_eth0_pll_data.pll_1000 = 0x56000000;
 228
 229         ath79_init_mac(ath79_eth0_data.mac_addr, mac, 1);
 230         ath79_register_eth(0);
 231
 232         /* GMAC1 is connected to the SGMII interface */
 233         ath79_eth1_data.phy_if_mode = PHY_INTERFACE_MODE_SGMII;
 234         ath79_eth1_data.speed = SPEED_1000;
 235         ath79_eth1_data.duplex = DUPLEX_FULL;
 236         ath79_eth1_pll_data.pll_1000 = 0x03000101;
 237
 238         ath79_init_mac(ath79_eth1_data.mac_addr, mac, 0);
 239         ath79_register_eth(1);
 240
 241         gpio_request_one(ARCHER_C7_GPIO_USB1_POWER,
 242                          GPIOF_OUT_INIT_HIGH | GPIOF_EXPORT_DIR_FIXED,
 243                          "USB1 power");
 244         gpio_request_one(ARCHER_C7_GPIO_USB2_POWER,
 245                          GPIOF_OUT_INIT_HIGH | GPIOF_EXPORT_DIR_FIXED,
 246                          "USB2 power");
 247         ath79_register_usb();
 248 }
 249
 250 MIPS_MACHINE(ATH79_MACH_ARCHER_C7, "ARCHER-C7", "TP-LINK Archer C7",
 251              archer_c7_setup);