ar71xx: Ext LNA patch for TUBE2H and HORNET-UB targets
[openwrt/svn-archive/archive.git] / target / linux / ar71xx / files / arch / mips / ath79 / mach-dhp-1565-a1.c
1 /*
2 * D-Link DHP-1565 rev. A1 board support
3 *
4 * Copyright (C) 2014 Jacek Kikiewicz
5 *
6 * This program is free software; you can redistribute it and/or modify it
7 * under the terms of the GNU General Public License version 2 as published
8 * by the Free Software Foundation.
9 */
10
11 #include <linux/pci.h>
12 #include <linux/phy.h>
13 #include <linux/gpio.h>
14 #include <linux/platform_device.h>
15 #include <linux/ath9k_platform.h>
16 #include <linux/ar8216_platform.h>
17
18 #include <asm/mach-ath79/ar71xx_regs.h>
19
20 #include "common.h"
21 #include "dev-ap9x-pci.h"
22 #include "dev-eth.h"
23 #include "dev-gpio-buttons.h"
24 #include "dev-leds-gpio.h"
25 #include "dev-m25p80.h"
26 #include "dev-spi.h"
27 #include "dev-usb.h"
28 #include "dev-wmac.h"
29 #include "machtypes.h"
30
31 #define DHP1565A1_GPIO_LED_BLUE_USB 11
32 #define DHP1565A1_GPIO_LED_AMBER_POWER 14
33 #define DHP1565A1_GPIO_LED_BLUE_POWER 22
34 #define DHP1565A1_GPIO_LED_BLUE_WPS 15
35 #define DHP1565A1_GPIO_LED_AMBER_PLANET 19
36 #define DHP1565A1_GPIO_LED_BLUE_PLANET 18
37 #define DHP1565A1_GPIO_LED_WLAN_2G 13
38
39 #define DHP1565A1_GPIO_WAN_LED_ENABLE 20
40
41 #define DHP1565A1_GPIO_BTN_RESET 17
42 #define DHP1565A1_GPIO_BTN_WPS 16
43
44 #define DHP1565A1_KEYS_POLL_INTERVAL 20 /* msecs */
45 #define DHP1565A1_KEYS_DEBOUNCE_INTERVAL (3 * DHP1565A1_KEYS_POLL_INTERVAL)
46
47 #define DHP1565A1_MAC0_OFFSET 0xFFA0
48 #define DHP1565A1_MAC1_OFFSET 0xFFB4
49 #define DHP1565A1_WMAC0_OFFSET 0x5
50 #define DHP1565A1_WMAC_CALDATA_OFFSET 0x1000
51 #define DHP1565A1_PCIE_CALDATA_OFFSET 0x5000
52
53 static struct gpio_led dhp1565a1_leds_gpio[] __initdata = {
54 {
55 .name = "d-link:amber:power",
56 .gpio = DHP1565A1_GPIO_LED_AMBER_POWER,
57 .active_low = 1,
58 },
59 {
60 .name = "d-link:green:power",
61 .gpio = DHP1565A1_GPIO_LED_BLUE_POWER,
62 .active_low = 1,
63 },
64 {
65 .name = "d-link:amber:planet",
66 .gpio = DHP1565A1_GPIO_LED_AMBER_PLANET,
67 .active_low = 1,
68 },
69 {
70 .name = "d-link:green:planet",
71 .gpio = DHP1565A1_GPIO_LED_BLUE_PLANET,
72 .active_low = 1,
73 },
74 };
75
76 static struct gpio_keys_button dhp1565a1_gpio_keys[] __initdata = {
77 {
78 .desc = "Soft reset",
79 .type = EV_KEY,
80 .code = KEY_RESTART,
81 .debounce_interval = DHP1565A1_KEYS_DEBOUNCE_INTERVAL,
82 .gpio = DHP1565A1_GPIO_BTN_RESET,
83 .active_low = 1,
84 },
85 {
86 .desc = "WPS button",
87 .type = EV_KEY,
88 .code = KEY_WPS_BUTTON,
89 .debounce_interval = DHP1565A1_KEYS_DEBOUNCE_INTERVAL,
90 .gpio = DHP1565A1_GPIO_BTN_WPS,
91 .active_low = 1,
92 },
93 };
94
95 static struct ar8327_pad_cfg dhp1565a1_ar8327_pad0_cfg = {
96 .mode = AR8327_PAD_MAC_RGMII,
97 .txclk_delay_en = true,
98 .rxclk_delay_en = true,
99 .txclk_delay_sel = AR8327_CLK_DELAY_SEL1,
100 .rxclk_delay_sel = AR8327_CLK_DELAY_SEL2,
101 };
102
103 static struct ar8327_platform_data dhp1565a1_ar8327_data = {
104 .pad0_cfg = &dhp1565a1_ar8327_pad0_cfg,
105 .port0_cfg = {
106 .force_link = 1,
107 .speed = AR8327_PORT_SPEED_1000,
108 .duplex = 1,
109 .txpause = 1,
110 .rxpause = 1,
111 },
112 };
113
114 static struct mdio_board_info dhp1565a1_mdio0_info[] = {
115 {
116 .bus_id = "ag71xx-mdio.0",
117 .phy_addr = 0,
118 .platform_data = &dhp1565a1_ar8327_data,
119 },
120 };
121
122 static void __init dhp1565a1_generic_setup(void)
123 {
124 u8 *mac = (u8 *) KSEG1ADDR(0x1ffe0000);
125 u8 *art = (u8 *) KSEG1ADDR(0x1fff0000);
126 u8 mac0[ETH_ALEN], mac1[ETH_ALEN];
127 u8 wmac0[ETH_ALEN];
128
129 ath79_parse_ascii_mac(mac + DHP1565A1_MAC0_OFFSET, mac0);
130 ath79_parse_ascii_mac(mac + DHP1565A1_MAC1_OFFSET, mac1);
131
132 ath79_register_m25p80(NULL);
133
134 ath79_register_gpio_keys_polled(-1, DHP1565A1_KEYS_POLL_INTERVAL,
135 ARRAY_SIZE(dhp1565a1_gpio_keys),
136 dhp1565a1_gpio_keys);
137
138 ath79_init_mac(wmac0, mac0, 0);
139 ath79_register_wmac(art + DHP1565A1_WMAC_CALDATA_OFFSET, wmac0);
140
141 ath79_setup_ar934x_eth_cfg(AR934X_ETH_CFG_RGMII_GMAC0);
142
143 mdiobus_register_board_info(dhp1565a1_mdio0_info,
144 ARRAY_SIZE(dhp1565a1_mdio0_info));
145
146 ath79_register_mdio(0, 0x0);
147
148 ath79_init_mac(ath79_eth0_data.mac_addr, mac0, 1);
149
150 /* GMAC0 is connected to an AR8327N switch */
151 ath79_eth0_data.phy_if_mode = PHY_INTERFACE_MODE_RGMII;
152 ath79_eth0_data.phy_mask = BIT(0);
153 ath79_eth0_data.mii_bus_dev = &ath79_mdio0_device.dev;
154 ath79_eth0_pll_data.pll_1000 = 0x06000000;
155 ath79_register_eth(0);
156
157 ath79_register_usb();
158 }
159
160 static void __init dhp1565a1_setup(void)
161 {
162 ath79_register_leds_gpio(-1, ARRAY_SIZE(dhp1565a1_leds_gpio),
163 dhp1565a1_leds_gpio);
164
165 dhp1565a1_generic_setup();
166 }
167
168 MIPS_MACHINE(ATH79_MACH_DHP_1565_A1, "DHP-1565-A1",
169 "D-Link DHP-1565 rev. A1",
170 dhp1565a1_setup);