target/linux/ar71xx/files/arch/mips/ath79/mach-rb91x.c

   1 /*
   2  *  MikroTik RouterBOARD 91X support
   3  *
   4  *  Copyright (C) 2013 Gabor Juhos <juhosg@openwrt.org>
   5  *
   6  *  This program is free software; you can redistribute it and/or modify it
   7  *  under the terms of the GNU General Public License version 2 as published
   8  *  by the Free Software Foundation.
   9  */
  10
  11 #define pr_fmt(fmt) "rb91x: " fmt
  12
  13 #include <linux/phy.h>
  14 #include <linux/delay.h>
  15 #include <linux/platform_device.h>
  16 #include <linux/ath9k_platform.h>
  17 #include <linux/mtd/mtd.h>
  18 #include <linux/mtd/nand.h>
  19 #include <linux/mtd/partitions.h>
  20 #include <linux/spi/spi.h>
  21 #include <linux/spi/74x164.h>
  22 #include <linux/spi/flash.h>
  23 #include <linux/routerboot.h>
  24 #include <linux/gpio.h>
  25 #include <linux/platform_data/gpio-latch.h>
  26 #include <linux/platform_data/rb91x_nand.h>
  27 #include <linux/platform_data/phy-at803x.h>
  28
  29 #include <asm/prom.h>
  30 #include <asm/mach-ath79/ath79.h>
  31 #include <asm/mach-ath79/ath79_spi_platform.h>
  32 #include <asm/mach-ath79/ar71xx_regs.h>
  33
  34 #include "common.h"
  35 #include "dev-eth.h"
  36 #include "dev-leds-gpio.h"
  37 #include "dev-nfc.h"
  38 #include "dev-usb.h"
  39 #include "dev-spi.h"
  40 #include "dev-wmac.h"
  41 #include "machtypes.h"
  42 #include "pci.h"
  43 #include "routerboot.h"
  44
  45 #define RB_ROUTERBOOT_OFFSET    0x0000
  46 #define RB_ROUTERBOOT_MIN_SIZE  0xb000
  47 #define RB_HARD_CFG_SIZE        0x1000
  48 #define RB_BIOS_OFFSET          0xd000
  49 #define RB_BIOS_SIZE            0x1000
  50 #define RB_SOFT_CFG_OFFSET      0xf000
  51 #define RB_SOFT_CFG_SIZE        0x1000
  52
  53 #define RB91X_FLAG_USB          BIT(0)
  54 #define RB91X_FLAG_PCIE         BIT(1)
  55
  56 #define RB91X_LATCH_GPIO_BASE   AR934X_GPIO_COUNT
  57 #define RB91X_LATCH_GPIO(_x)    (RB91X_LATCH_GPIO_BASE + (_x))
  58
  59 #define RB91X_SSR_GPIO_BASE     (RB91X_LATCH_GPIO_BASE + AR934X_GPIO_COUNT)
  60 #define RB91X_SSR_GPIO(_x)      (RB91X_SSR_GPIO_BASE + (_x))
  61
  62 #define RB91X_SSR_BIT_LED1              0
  63 #define RB91X_SSR_BIT_LED2              1
  64 #define RB91X_SSR_BIT_LED3              2
  65 #define RB91X_SSR_BIT_LED4              3
  66 #define RB91X_SSR_BIT_LED5              4
  67 #define RB91X_SSR_BIT_5                 5
  68 #define RB91X_SSR_BIT_USB_POWER         6
  69 #define RB91X_SSR_BIT_PCIE_POWER        7
  70
  71 #define RB91X_GPIO_SSR_STROBE   RB91X_LATCH_GPIO(0)
  72 #define RB91X_GPIO_LED_POWER    RB91X_LATCH_GPIO(1)
  73 #define RB91X_GPIO_LED_USER     RB91X_LATCH_GPIO(2)
  74 #define RB91X_GPIO_NAND_READ    RB91X_LATCH_GPIO(3)
  75 #define RB91X_GPIO_NAND_RDY     RB91X_LATCH_GPIO(4)
  76 #define RB91X_GPIO_NLE          RB91X_LATCH_GPIO(11)
  77 #define RB91X_GPIO_NAND_NRW     RB91X_LATCH_GPIO(12)
  78 #define RB91X_GPIO_NAND_NCE     RB91X_LATCH_GPIO(13)
  79 #define RB91X_GPIO_NAND_CLE     RB91X_LATCH_GPIO(14)
  80 #define RB91X_GPIO_NAND_ALE     RB91X_LATCH_GPIO(15)
  81
  82 #define RB91X_GPIO_LED_1        RB91X_SSR_GPIO(RB91X_SSR_BIT_LED1)
  83 #define RB91X_GPIO_LED_2        RB91X_SSR_GPIO(RB91X_SSR_BIT_LED2)
  84 #define RB91X_GPIO_LED_3        RB91X_SSR_GPIO(RB91X_SSR_BIT_LED3)
  85 #define RB91X_GPIO_LED_4        RB91X_SSR_GPIO(RB91X_SSR_BIT_LED4)
  86 #define RB91X_GPIO_LED_5        RB91X_SSR_GPIO(RB91X_SSR_BIT_LED5)
  87 #define RB91X_GPIO_USB_POWER    RB91X_SSR_GPIO(RB91X_SSR_BIT_USB_POWER)
  88 #define RB91X_GPIO_PCIE_POWER   RB91X_SSR_GPIO(RB91X_SSR_BIT_PCIE_POWER)
  89
  90 struct rb_board_info {
  91         const char *name;
  92         u32 flags;
  93 };
  94
  95 static struct mtd_partition rb711gr100_spi_partitions[] = {
  96         {
  97                 .name           = "routerboot",
  98                 .offset         = RB_ROUTERBOOT_OFFSET,
  99                 .mask_flags     = MTD_WRITEABLE,
 100         }, {
 101                 .name           = "hard_config",
 102                 .size           = RB_HARD_CFG_SIZE,
 103                 .mask_flags     = MTD_WRITEABLE,
 104         }, {
 105                 .name           = "bios",
 106                 .offset         = RB_BIOS_OFFSET,
 107                 .size           = RB_BIOS_SIZE,
 108                 .mask_flags     = MTD_WRITEABLE,
 109         }, {
 110                 .name           = "soft_config",
 111                 .size           = RB_SOFT_CFG_SIZE,
 112         }
 113 };
 114
 115 static struct flash_platform_data rb711gr100_spi_flash_data = {
 116         .parts          = rb711gr100_spi_partitions,
 117         .nr_parts       = ARRAY_SIZE(rb711gr100_spi_partitions),
 118 };
 119
 120 static int rb711gr100_gpio_latch_gpios[AR934X_GPIO_COUNT] __initdata = {
 121         0, 1, 2, 3, 4, 5, 6, 7, 8, 9, 10, 11,
 122         12, 13, 14, 15, 16, 17, 18, 19, 20, 21, 22
 123 };
 124
 125 static struct gpio_latch_platform_data rb711gr100_gpio_latch_data __initdata = {
 126         .base = RB91X_LATCH_GPIO_BASE,
 127         .num_gpios = ARRAY_SIZE(rb711gr100_gpio_latch_gpios),
 128         .gpios = rb711gr100_gpio_latch_gpios,
 129         .le_gpio_index = 11,
 130         .le_active_low = true,
 131 };
 132
 133 static struct rb91x_nand_platform_data rb711gr100_nand_data __initdata = {
 134         .gpio_nce = RB91X_GPIO_NAND_NCE,
 135         .gpio_ale = RB91X_GPIO_NAND_ALE,
 136         .gpio_cle = RB91X_GPIO_NAND_CLE,
 137         .gpio_rdy = RB91X_GPIO_NAND_RDY,
 138         .gpio_read = RB91X_GPIO_NAND_READ,
 139         .gpio_nrw = RB91X_GPIO_NAND_NRW,
 140         .gpio_nle = RB91X_GPIO_NLE,
 141 };
 142
 143 static u8 rb711gr100_ssr_initdata[] __initdata = {
 144         BIT(RB91X_SSR_BIT_PCIE_POWER) |
 145         BIT(RB91X_SSR_BIT_USB_POWER) |
 146         BIT(RB91X_SSR_BIT_5)
 147 };
 148
 149 static struct gen_74x164_chip_platform_data rb711gr100_ssr_data = {
 150         .base = RB91X_SSR_GPIO_BASE,
 151         .num_registers = ARRAY_SIZE(rb711gr100_ssr_initdata),
 152         .init_data = rb711gr100_ssr_initdata,
 153 };
 154
 155 static struct ath79_spi_controller_data rb711gr100_spi0_cdata = {
 156         .cs_type = ATH79_SPI_CS_TYPE_INTERNAL,
 157         .cs_line = 0,
 158         .is_flash = true,
 159 };
 160
 161 static struct ath79_spi_controller_data rb711gr100_spi1_cdata = {
 162         .cs_type = ATH79_SPI_CS_TYPE_GPIO,
 163         .cs_line = RB91X_GPIO_SSR_STROBE,
 164 };
 165
 166 static struct spi_board_info rb711gr100_spi_info[] = {
 167         {
 168                 .bus_num        = 0,
 169                 .chip_select    = 0,
 170                 .max_speed_hz   = 25000000,
 171                 .modalias       = "m25p80",
 172                 .platform_data  = &rb711gr100_spi_flash_data,
 173                 .controller_data = &rb711gr100_spi0_cdata
 174         }, {
 175                 .bus_num        = 0,
 176                 .chip_select    = 1,
 177                 .max_speed_hz   = 10000000,
 178                 .modalias       = "74x164",
 179                 .platform_data  = &rb711gr100_ssr_data,
 180                 .controller_data = &rb711gr100_spi1_cdata
 181         }
 182 };
 183
 184 static struct ath79_spi_platform_data rb711gr100_spi_data __initdata = {
 185         .bus_num = 0,
 186         .num_chipselect = 2,
 187 };
 188
 189 static struct gpio_led rb711gr100_leds[] __initdata = {
 190         {
 191                 .name           = "rb:green:led1",
 192                 .gpio           = RB91X_GPIO_LED_1,
 193                 .active_low     = 0,
 194         },
 195         {
 196                 .name           = "rb:green:led2",
 197                 .gpio           = RB91X_GPIO_LED_2,
 198                 .active_low     = 0,
 199         },
 200         {
 201                 .name           = "rb:green:led3",
 202                 .gpio           = RB91X_GPIO_LED_3,
 203                 .active_low     = 0,
 204         },
 205         {
 206                 .name           = "rb:green:led4",
 207                 .gpio           = RB91X_GPIO_LED_4,
 208                 .active_low     = 0,
 209         },
 210         {
 211                 .name           = "rb:green:led5",
 212                 .gpio           = RB91X_GPIO_LED_5,
 213                 .active_low     = 0,
 214         },
 215         {
 216                 .name           = "rb:green:user",
 217                 .gpio           = RB91X_GPIO_LED_USER,
 218                 .active_low     = 0,
 219         },
 220         {
 221                 .name           = "rb:green:power",
 222                 .gpio           = RB91X_GPIO_LED_POWER,
 223                 .active_low     = 0,
 224         },
 225 };
 226
 227 static struct at803x_platform_data rb91x_at803x_data = {
 228         .disable_smarteee = 1,
 229         .enable_rgmii_rx_delay = 1,
 230         .enable_rgmii_tx_delay = 1,
 231 };
 232
 233 static struct mdio_board_info rb91x_mdio0_info[] = {
 234         {
 235                 .bus_id = "ag71xx-mdio.0",
 236                 .phy_addr = 0,
 237                 .platform_data = &rb91x_at803x_data,
 238         },
 239 };
 240
 241 static void __init rb711gr100_init_partitions(const struct rb_info *info)
 242 {
 243         rb711gr100_spi_partitions[0].size = info->hard_cfg_offs;
 244         rb711gr100_spi_partitions[1].offset = info->hard_cfg_offs;
 245
 246         rb711gr100_spi_partitions[3].offset = info->soft_cfg_offs;
 247 }
 248
 249 void __init rb711gr100_wlan_init(void)
 250 {
 251         char *caldata;
 252         u8 wlan_mac[ETH_ALEN];
 253
 254         caldata = rb_get_wlan_data();
 255         if (caldata == NULL)
 256                 return;
 257
 258         ath79_init_mac(wlan_mac, ath79_mac_base, 1);
 259         ath79_register_wmac(caldata + 0x1000, wlan_mac);
 260
 261         kfree(caldata);
 262 }
 263
 264 #define RB_BOARD_INFO(_name, _flags)    \
 265         {                               \
 266                 .name = (_name),        \
 267                 .flags = (_flags),      \
 268         }
 269
 270 static const struct rb_board_info rb711gr100_boards[] __initconst = {
 271         RB_BOARD_INFO("911G-2HPnD", 0),
 272         RB_BOARD_INFO("911G-5HPnD", 0),
 273         RB_BOARD_INFO("912UAG-2HPnD", RB91X_FLAG_USB | RB91X_FLAG_PCIE),
 274         RB_BOARD_INFO("912UAG-5HPnD", RB91X_FLAG_USB | RB91X_FLAG_PCIE),
 275 };
 276
 277 static u32 rb711gr100_get_flags(const struct rb_info *info)
 278 {
 279         int i;
 280
 281         for (i = 0; i < ARRAY_SIZE(rb711gr100_boards); i++) {
 282                 const struct rb_board_info *bi;
 283
 284                 bi = &rb711gr100_boards[i];
 285                 if (strcmp(info->board_name, bi->name) == 0)
 286                         return bi->flags;
 287         }
 288
 289         return 0;
 290 }
 291
 292 static void __init rb711gr100_setup(void)
 293 {
 294         const struct rb_info *info;
 295         char buf[64];
 296         u32 flags;
 297
 298         info = rb_init_info((void *) KSEG1ADDR(0x1f000000), 0x10000);
 299         if (!info)
 300                 return;
 301
 302         scnprintf(buf, sizeof(buf), "Mikrotik RouterBOARD %s",
 303                   (info->board_name) ? info->board_name : "");
 304         mips_set_machine_name(buf);
 305
 306         rb711gr100_init_partitions(info);
 307         ath79_register_spi(&rb711gr100_spi_data, rb711gr100_spi_info,
 308                            ARRAY_SIZE(rb711gr100_spi_info));
 309
 310         ath79_setup_ar934x_eth_cfg(AR934X_ETH_CFG_RGMII_GMAC0 |
 311                                    AR934X_ETH_CFG_RXD_DELAY |
 312                                    AR934X_ETH_CFG_SW_ONLY_MODE);
 313
 314         ath79_register_mdio(0, 0x0);
 315
 316         mdiobus_register_board_info(rb91x_mdio0_info,
 317                                     ARRAY_SIZE(rb91x_mdio0_info));
 318
 319         ath79_init_mac(ath79_eth0_data.mac_addr, ath79_mac_base, 0);
 320         ath79_eth0_data.phy_if_mode = PHY_INTERFACE_MODE_RGMII;
 321         ath79_eth0_data.phy_mask = BIT(0);
 322         ath79_eth0_pll_data.pll_1000 = 0x02000000;
 323
 324         ath79_register_eth(0);
 325
 326         rb711gr100_wlan_init();
 327
 328         platform_device_register_data(NULL, "rb91x-nand", -1,
 329                                       &rb711gr100_nand_data,
 330                                       sizeof(rb711gr100_nand_data));
 331
 332         platform_device_register_data(NULL, "gpio-latch", -1,
 333                                       &rb711gr100_gpio_latch_data,
 334                                       sizeof(rb711gr100_gpio_latch_data));
 335
 336         ath79_register_leds_gpio(-1, ARRAY_SIZE(rb711gr100_leds),
 337                                  rb711gr100_leds);
 338
 339         flags = rb711gr100_get_flags(info);
 340
 341         if (flags & RB91X_FLAG_USB)
 342                 ath79_register_usb();
 343
 344         if (flags & RB91X_FLAG_PCIE)
 345                 ath79_register_pci();
 346
 347 }
 348
 349 MIPS_MACHINE_NONAME(ATH79_MACH_RB_711GR100, "711Gr100", rb711gr100_setup);