ar71xx: rename ath79_parse_mac_addr to ath79_parse_ascii_mac
[openwrt/svn-archive/archive.git] / target / linux / ar71xx / files / arch / mips / ath79 / mach-rb95x.c
1 /*
2 * MikroTik RouterBOARD 95X support
3 *
4 * Copyright (C) 2012 Stijn Tintel <stijn@linux-ipv6.be>
5 * Copyright (C) 2012 Gabor Juhos <juhosg@openwrt.org>
6 * Copyright (C) 2013 Kamil Trzcinski <ayufan@ayufan.eu>
7 *
8 * This program is free software; you can redistribute it and/or modify it
9 * under the terms of the GNU General Public License version 2 as published
10 * by the Free Software Foundation.
11 */
12
13 #define pr_fmt(fmt) "rb95x: " fmt
14
15 #include <linux/phy.h>
16 #include <linux/delay.h>
17 #include <linux/platform_device.h>
18 #include <linux/ath9k_platform.h>
19 #include <linux/ar8216_platform.h>
20 #include <linux/mtd/mtd.h>
21 #include <linux/mtd/nand.h>
22 #include <linux/mtd/partitions.h>
23 #include <linux/spi/spi.h>
24 #include <linux/spi/flash.h>
25 #include <linux/rle.h>
26 #include <linux/routerboot.h>
27 #include <linux/gpio.h>
28
29 #include <asm/mach-ath79/ath79.h>
30 #include <asm/mach-ath79/ar71xx_regs.h>
31
32 #include "common.h"
33 #include "dev-eth.h"
34 #include "dev-m25p80.h"
35 #include "dev-nfc.h"
36 #include "dev-usb.h"
37 #include "dev-wmac.h"
38 #include "machtypes.h"
39 #include "routerboot.h"
40
41 #define RB95X_GPIO_NAND_NCE 14
42
43 #define RB_ROUTERBOOT_OFFSET 0x0000
44 #define RB_ROUTERBOOT_SIZE 0xb000
45 #define RB_HARD_CFG_OFFSET 0xc000
46 #define RB_HARD_CFG_SIZE 0x1000
47 #define RB_BIOS_OFFSET 0xd000
48 #define RB_BIOS_SIZE 0x2000
49 #define RB_SOFT_CFG_OFFSET 0xe000
50 #define RB_SOFT_CFG_SIZE 0x1000
51
52 #define RB_ART_SIZE 0x10000
53
54 static struct mtd_partition rb95x_nand_partitions[] = {
55 {
56 .name = "booter",
57 .offset = 0,
58 .size = (256 * 1024),
59 .mask_flags = MTD_WRITEABLE,
60 },
61 {
62 .name = "kernel",
63 .offset = (256 * 1024),
64 .size = (4 * 1024 * 1024) - (256 * 1024),
65 },
66 {
67 .name = "rootfs",
68 .offset = MTDPART_OFS_NXTBLK,
69 .size = MTDPART_SIZ_FULL,
70 },
71 };
72
73 static struct ar8327_pad_cfg rb95x_ar8327_pad0_cfg = {
74 .mode = AR8327_PAD_MAC_RGMII,
75 .txclk_delay_en = true,
76 .rxclk_delay_en = true,
77 .txclk_delay_sel = AR8327_CLK_DELAY_SEL1,
78 .rxclk_delay_sel = AR8327_CLK_DELAY_SEL2,
79 };
80
81 static struct ar8327_platform_data rb95x_ar8327_data = {
82 .pad0_cfg = &rb95x_ar8327_pad0_cfg,
83 .port0_cfg = {
84 .force_link = 1,
85 .speed = AR8327_PORT_SPEED_1000,
86 .duplex = 1,
87 .txpause = 1,
88 .rxpause = 1,
89 }
90 };
91
92 static struct mdio_board_info rb95x_mdio0_info[] = {
93 {
94 .bus_id = "ag71xx-mdio.0",
95 .phy_addr = 0,
96 .platform_data = &rb95x_ar8327_data,
97 },
98 };
99
100 void __init rb95x_wlan_init(void)
101 {
102 u8 *hard_cfg = (u8 *) KSEG1ADDR(0x1f000000 + RB_HARD_CFG_OFFSET);
103 u16 tag_len;
104 u8 *tag;
105 char *art_buf;
106 u8 wlan_mac[ETH_ALEN];
107 int err;
108
109 err = routerboot_find_tag(hard_cfg, RB_HARD_CFG_SIZE, RB_ID_WLAN_DATA,
110 &tag, &tag_len);
111 if (err) {
112 pr_err("no calibration data found\n");
113 return;
114 }
115
116 art_buf = kmalloc(RB_ART_SIZE, GFP_KERNEL);
117 if (art_buf == NULL) {
118 pr_err("no memory for calibration data\n");
119 return;
120 }
121
122 err = rle_decode((char *) tag, tag_len, art_buf, RB_ART_SIZE,
123 NULL, NULL);
124 if (err) {
125 pr_err("unable to decode calibration data\n");
126 goto free;
127 }
128
129 ath79_init_mac(wlan_mac, ath79_mac_base, 11);
130 ath79_register_wmac(art_buf + 0x1000, wlan_mac);
131
132 free:
133 kfree(art_buf);
134 }
135
136 static void rb95x_nand_select_chip(int chip_no)
137 {
138 switch (chip_no) {
139 case 0:
140 gpio_set_value(RB95X_GPIO_NAND_NCE, 0);
141 break;
142 default:
143 gpio_set_value(RB95X_GPIO_NAND_NCE, 1);
144 break;
145 }
146 ndelay(500);
147 }
148
149 static struct nand_ecclayout rb95x_nand_ecclayout = {
150 .eccbytes = 6,
151 .eccpos = { 8, 9, 10, 13, 14, 15 },
152 .oobavail = 9,
153 .oobfree = { { 0, 4 }, { 6, 2 }, { 11, 2 }, { 4, 1 } }
154 };
155
156 static int rb95x_nand_scan_fixup(struct mtd_info *mtd)
157 {
158 struct nand_chip *chip = mtd->priv;
159
160 if (mtd->writesize == 512) {
161 /*
162 * Use the OLD Yaffs-1 OOB layout, otherwise RouterBoot
163 * will not be able to find the kernel that we load.
164 */
165 chip->ecc.layout = &rb95x_nand_ecclayout;
166 }
167
168 return 0;
169 }
170
171 void __init rb95x_nand_init(void)
172 {
173 ath79_nfc_set_scan_fixup(rb95x_nand_scan_fixup);
174 ath79_nfc_set_parts(rb95x_nand_partitions,
175 ARRAY_SIZE(rb95x_nand_partitions));
176 ath79_nfc_set_select_chip(rb95x_nand_select_chip);
177 ath79_nfc_set_swap_dma(true);
178 ath79_register_nfc();
179 }
180
181 void __init rb95x_gpio_init(void)
182 {
183 gpio_request_one(RB95X_GPIO_NAND_NCE, GPIOF_OUT_INIT_HIGH, "NAND nCE");
184 }
185
186 static void __init rb95x_setup(void)
187 {
188 rb95x_gpio_init();
189 rb95x_nand_init();
190
191 ath79_setup_ar934x_eth_cfg(AR934X_ETH_CFG_RGMII_GMAC0 |
192 AR934X_ETH_CFG_SW_ONLY_MODE);
193
194 ath79_register_mdio(0, 0x0);
195
196 mdiobus_register_board_info(rb95x_mdio0_info,
197 ARRAY_SIZE(rb95x_mdio0_info));
198
199 ath79_init_mac(ath79_eth0_data.mac_addr, ath79_mac_base, 0);
200 ath79_eth0_data.phy_if_mode = PHY_INTERFACE_MODE_RGMII;
201 ath79_eth0_data.phy_mask = BIT(0);
202
203 ath79_register_eth(0);
204 }
205
206 static void __init rb951g_setup(void)
207 {
208 rb95x_setup();
209 rb95x_wlan_init();
210 ath79_register_usb();
211 }
212
213 MIPS_MACHINE(ATH79_MACH_RB_951G, "951G", "MikroTik RouterBOARD 951G-2HnD",
214 rb951g_setup);