target/linux/ar71xx/files/arch/mips/ath79/mach-tl-wdr4300.c

   1 /*
   2  *  TP-LINK TL-WDR4300 board support
   3  *
   4  *  Copyright (C) 2012 Gabor Juhos <juhosg@openwrt.org>
   5  *
   6  *  This program is free software; you can redistribute it and/or modify it
   7  *  under the terms of the GNU General Public License version 2 as published
   8  *  by the Free Software Foundation.
   9  */
  10
  11 #include <linux/pci.h>
  12 #include <linux/phy.h>
  13 #include <linux/gpio.h>
  14 #include <linux/platform_device.h>
  15 #include <linux/ath9k_platform.h>
  16 #include <linux/ar8216_platform.h>
  17
  18 #include <asm/mach-ath79/ar71xx_regs.h>
  19
  20 #include "common.h"
  21 #include "dev-ap9x-pci.h"
  22 #include "dev-eth.h"
  23 #include "dev-gpio-buttons.h"
  24 #include "dev-leds-gpio.h"
  25 #include "dev-m25p80.h"
  26 #include "dev-spi.h"
  27 #include "dev-usb.h"
  28 #include "dev-wmac.h"
  29 #include "machtypes.h"
  30
  31 #define WDR4300_GPIO_LED_USB1           11
  32 #define WDR4300_GPIO_LED_USB2           12
  33 #define WDR4300_GPIO_LED_WLAN2G         13
  34 #define WDR4300_GPIO_LED_SYSTEM         14
  35 #define WDR4300_GPIO_LED_QSS            15
  36
  37 #define WDR4300_GPIO_BTN_WPS            16
  38 #define WDR4300_GPIO_BTN_RFKILL         17
  39
  40 #define WDR4300_GPIO_USB1_POWER         22
  41 #define WDR4300_GPIO_USB2_POWER         21
  42
  43 #define WDR4300_KEYS_POLL_INTERVAL      20      /* msecs */
  44 #define WDR4300_KEYS_DEBOUNCE_INTERVAL  (3 * WDR4300_KEYS_POLL_INTERVAL)
  45
  46 #define WDR4300_MAC0_OFFSET             0
  47 #define WDR4300_MAC1_OFFSET             6
  48 #define WDR4300_WMAC_CALDATA_OFFSET     0x1000
  49 #define WDR4300_PCIE_CALDATA_OFFSET     0x5000
  50
  51 static const char *wdr4300_part_probes[] = {
  52         "tp-link",
  53         NULL,
  54 };
  55
  56 static struct flash_platform_data wdr4300_flash_data = {
  57         .part_probes    = wdr4300_part_probes,
  58 };
  59
  60 static struct gpio_led wdr4300_leds_gpio[] __initdata = {
  61         {
  62                 .name           = "tp-link:blue:qss",
  63                 .gpio           = WDR4300_GPIO_LED_QSS,
  64                 .active_low     = 1,
  65         },
  66         {
  67                 .name           = "tp-link:blue:system",
  68                 .gpio           = WDR4300_GPIO_LED_SYSTEM,
  69                 .active_low     = 1,
  70         },
  71         {
  72                 .name           = "tp-link:green:usb1",
  73                 .gpio           = WDR4300_GPIO_LED_USB1,
  74                 .active_low     = 1,
  75         },
  76         {
  77                 .name           = "tp-link:green:usb2",
  78                 .gpio           = WDR4300_GPIO_LED_USB2,
  79                 .active_low     = 1,
  80         },
  81         {
  82                 .name           = "tp-link:blue:wlan2g",
  83                 .gpio           = WDR4300_GPIO_LED_WLAN2G,
  84                 .active_low     = 1,
  85         },
  86 };
  87
  88 static struct gpio_keys_button wdr4300_gpio_keys[] __initdata = {
  89         {
  90                 .desc           = "QSS button",
  91                 .type           = EV_KEY,
  92                 .code           = KEY_WPS_BUTTON,
  93                 .debounce_interval = WDR4300_KEYS_DEBOUNCE_INTERVAL,
  94                 .gpio           = WDR4300_GPIO_BTN_WPS,
  95                 .active_low     = 1,
  96         },
  97         {
  98                 .desc           = "RFKILL switch",
  99                 .type           = EV_SW,
 100                 .code           = KEY_RFKILL,
 101                 .debounce_interval = WDR4300_KEYS_DEBOUNCE_INTERVAL,
 102                 .gpio           = WDR4300_GPIO_BTN_RFKILL,
 103         },
 104 };
 105
 106 static struct ar8327_pad_cfg wdr4300_ar8327_pad0_cfg = {
 107         .mode = AR8327_PAD_MAC_RGMII,
 108         .txclk_delay_en = true,
 109         .rxclk_delay_en = true,
 110         .txclk_delay_sel = AR8327_CLK_DELAY_SEL1,
 111         .rxclk_delay_sel = AR8327_CLK_DELAY_SEL2,
 112 };
 113
 114 static struct ar8327_led_cfg wdr4300_ar8327_led_cfg = {
 115         .led_ctrl0 = 0xc737c737,
 116         .led_ctrl1 = 0x00000000,
 117         .led_ctrl2 = 0x00000000,
 118         .led_ctrl3 = 0x0030c300,
 119         .open_drain = false,
 120 };
 121
 122 static struct ar8327_platform_data wdr4300_ar8327_data = {
 123         .pad0_cfg = &wdr4300_ar8327_pad0_cfg,
 124         .cpuport_cfg = {
 125                 .force_link = 1,
 126                 .speed = AR8327_PORT_SPEED_1000,
 127                 .duplex = 1,
 128                 .txpause = 1,
 129                 .rxpause = 1,
 130         },
 131         .led_cfg = &wdr4300_ar8327_led_cfg,
 132 };
 133
 134 static struct mdio_board_info wdr4300_mdio0_info[] = {
 135         {
 136                 .bus_id = "ag71xx-mdio.0",
 137                 .phy_addr = 0,
 138                 .platform_data = &wdr4300_ar8327_data,
 139         },
 140 };
 141
 142 static void __init wdr4300_gmac_setup(void)
 143 {
 144         void __iomem *base;
 145         u32 t;
 146
 147         base = ioremap(AR934X_GMAC_BASE, AR934X_GMAC_SIZE);
 148
 149         t = __raw_readl(base + AR934X_GMAC_REG_ETH_CFG);
 150         t &= ~(AR934X_ETH_CFG_RGMII_GMAC0 | AR934X_ETH_CFG_MII_GMAC0 |
 151                AR934X_ETH_CFG_GMII_GMAC0 | AR934X_ETH_CFG_SW_ONLY_MODE);
 152         t |= AR934X_ETH_CFG_RGMII_GMAC0;
 153
 154         __raw_writel(t, base + AR934X_GMAC_REG_ETH_CFG);
 155
 156         iounmap(base);
 157 }
 158
 159 static void __init wdr4300_setup(void)
 160 {
 161         u8 *mac = (u8 *) KSEG1ADDR(0x1f01fc00);
 162         u8 *art = (u8 *) KSEG1ADDR(0x1fff0000);
 163         u8 tmpmac[ETH_ALEN];
 164
 165         ath79_register_m25p80(&wdr4300_flash_data);
 166         ath79_register_leds_gpio(-1, ARRAY_SIZE(wdr4300_leds_gpio),
 167                                  wdr4300_leds_gpio);
 168         ath79_register_gpio_keys_polled(-1, WDR4300_KEYS_POLL_INTERVAL,
 169                                         ARRAY_SIZE(wdr4300_gpio_keys),
 170                                         wdr4300_gpio_keys);
 171
 172         ath79_init_mac(tmpmac, mac, -1);
 173         ath79_register_wmac(art + WDR4300_WMAC_CALDATA_OFFSET, tmpmac);
 174
 175         ath79_init_mac(tmpmac, mac, 0);
 176         ap9x_pci_setup_wmac_led_pin(0, 0);
 177         ap91_pci_init(art + WDR4300_PCIE_CALDATA_OFFSET, tmpmac);
 178
 179         wdr4300_gmac_setup();
 180
 181         mdiobus_register_board_info(wdr4300_mdio0_info,
 182                                     ARRAY_SIZE(wdr4300_mdio0_info));
 183
 184         ath79_register_mdio(0, 0x0);
 185
 186         ath79_init_mac(ath79_eth0_data.mac_addr, mac, -2);
 187
 188         /* GMAC0 is connected to an AR8327N switch */
 189         ath79_eth0_data.phy_if_mode = PHY_INTERFACE_MODE_RGMII;
 190         ath79_eth0_data.phy_mask = BIT(0);
 191         ath79_eth0_data.mii_bus_dev = &ath79_mdio0_device.dev;
 192         ath79_eth0_pll_data.pll_1000 = 0x06000000;
 193         ath79_register_eth(0);
 194
 195         ath79_set_usb_power_gpio(WDR4300_GPIO_USB1_POWER, GPIOF_OUT_INIT_HIGH,
 196                                 "USB1 power");
 197         ath79_set_usb_power_gpio(WDR4300_GPIO_USB2_POWER, GPIOF_OUT_INIT_HIGH,
 198                                 "USB2 power");
 199         ath79_register_usb();
 200 }
 201
 202 MIPS_MACHINE(ATH79_MACH_TL_WDR4300, "TL-WDR4300", "TP-LINK TL-WDR4300",
 203              wdr4300_setup);