[ar71xx] update flash locking code
[openwrt/svn-archive/archive.git] / target / linux / ar71xx / files / arch / mips / include / asm / mach-ar71xx / platform.h
1 /*
2 * Atheros AR71xx SoC specific platform data definitions
3 *
4 * Copyright (C) 2008-2009 Gabor Juhos <juhosg@openwrt.org>
5 * Copyright (C) 2008 Imre Kaloz <kaloz@openwrt.org>
6 *
7 * This program is free software; you can redistribute it and/or modify it
8 * under the terms of the GNU General Public License version 2 as published
9 * by the Free Software Foundation.
10 */
11
12 #ifndef __ASM_MACH_AR71XX_PLATFORM_H
13 #define __ASM_MACH_AR71XX_PLATFORM_H
14
15 #include <linux/if_ether.h>
16 #include <linux/skbuff.h>
17 #include <linux/phy.h>
18 #include <linux/spi/spi.h>
19 #include <linux/mtd/mtd.h>
20 #include <linux/mtd/partitions.h>
21
22 struct ag71xx_platform_data {
23 phy_interface_t phy_if_mode;
24 u32 phy_mask;
25 int speed;
26 int duplex;
27 u32 reset_bit;
28 u32 mii_if;
29 u8 mac_addr[ETH_ALEN];
30
31 u8 has_gbit:1;
32 u8 is_ar91xx:1;
33 u8 has_ar8216:1;
34
35 void (* ddr_flush)(void);
36 void (* set_pll)(int speed);
37 };
38
39 struct ag71xx_mdio_platform_data {
40 u32 phy_mask;
41 };
42
43 struct ar71xx_ehci_platform_data {
44 u8 is_ar91xx;
45 };
46
47 struct ar71xx_spi_platform_data {
48 unsigned bus_num;
49 unsigned num_chipselect;
50 u32 (*get_ioc_base)(u8 chip_select, int cs_high, int is_on);
51 };
52
53 #define AR71XX_SPI_CS_INACTIVE 0
54 #define AR71XX_SPI_CS_ACTIVE 1
55
56 struct ar91xx_flash_platform_data {
57 unsigned int width;
58 u8 is_shared:1;
59 #ifdef CONFIG_MTD_PARTITIONS
60 unsigned int nr_parts;
61 struct mtd_partition *parts;
62 #endif
63 };
64
65 #endif /* __ASM_MACH_AR71XX_PLATFORM_H */