[ar71xx] add support for board specific PLL settings
[openwrt/svn-archive/archive.git] / target / linux / ar71xx / files / drivers / net / ag71xx / ag71xx_phy.c
1 /*
2 * Atheros AR71xx built-in ethernet mac driver
3 *
4 * Copyright (C) 2008-2009 Gabor Juhos <juhosg@openwrt.org>
5 * Copyright (C) 2008 Imre Kaloz <kaloz@openwrt.org>
6 *
7 * Based on Atheros' AG7100 driver
8 *
9 * This program is free software; you can redistribute it and/or modify it
10 * under the terms of the GNU General Public License version 2 as published
11 * by the Free Software Foundation.
12 */
13
14 #include "ag71xx.h"
15
16 static unsigned char *ag71xx_speed_str(struct ag71xx *ag)
17 {
18 switch (ag->speed) {
19 case SPEED_1000:
20 return "1000";
21 case SPEED_100:
22 return "100";
23 case SPEED_10:
24 return "10";
25 }
26
27 return "?";
28 }
29
30 static void ag71xx_phy_link_update(struct ag71xx *ag)
31 {
32 struct ag71xx_platform_data *pdata = ag71xx_get_pdata(ag);
33 u32 cfg2;
34 u32 ifctl;
35 u32 fifo5;
36 u32 mii_speed;
37
38 if (!ag->link) {
39 netif_carrier_off(ag->dev);
40 if (netif_msg_link(ag))
41 printk(KERN_INFO "%s: link down\n", ag->dev->name);
42 return;
43 }
44
45 cfg2 = ag71xx_rr(ag, AG71XX_REG_MAC_CFG2);
46 cfg2 &= ~(MAC_CFG2_IF_1000 | MAC_CFG2_IF_10_100 | MAC_CFG2_FDX);
47 cfg2 |= (ag->duplex) ? MAC_CFG2_FDX : 0;
48
49 ifctl = ag71xx_rr(ag, AG71XX_REG_MAC_IFCTL);
50 ifctl &= ~(MAC_IFCTL_SPEED);
51
52 fifo5 = ag71xx_rr(ag, AG71XX_REG_FIFO_CFG5);
53 fifo5 &= ~FIFO_CFG5_BM;
54
55 switch (ag->speed) {
56 case SPEED_1000:
57 mii_speed = MII_CTRL_SPEED_1000;
58 cfg2 |= MAC_CFG2_IF_1000;
59 fifo5 |= FIFO_CFG5_BM;
60 break;
61 case SPEED_100:
62 mii_speed = MII_CTRL_SPEED_100;
63 cfg2 |= MAC_CFG2_IF_10_100;
64 ifctl |= MAC_IFCTL_SPEED;
65 break;
66 case SPEED_10:
67 mii_speed = MII_CTRL_SPEED_10;
68 cfg2 |= MAC_CFG2_IF_10_100;
69 break;
70 default:
71 BUG();
72 return;
73 }
74
75 ag71xx_wr(ag, AG71XX_REG_FIFO_CFG3,
76 pdata->is_ar91xx ? 0x780fff : 0x008001ff);
77 pdata->set_pll(ag->speed);
78 ag71xx_mii_ctrl_set_speed(ag, mii_speed);
79
80 ag71xx_wr(ag, AG71XX_REG_MAC_CFG2, cfg2);
81 ag71xx_wr(ag, AG71XX_REG_FIFO_CFG5, fifo5);
82 ag71xx_wr(ag, AG71XX_REG_MAC_IFCTL, ifctl);
83
84 netif_carrier_on(ag->dev);
85 if (netif_msg_link(ag))
86 printk(KERN_INFO "%s: link up (%sMbps/%s duplex)\n",
87 ag->dev->name,
88 ag71xx_speed_str(ag),
89 (DUPLEX_FULL == ag->duplex) ? "Full" : "Half");
90
91 DBG("%s: fifo_cfg0=%#x, fifo_cfg1=%#x, fifo_cfg2=%#x\n",
92 ag->dev->name,
93 ag71xx_rr(ag, AG71XX_REG_FIFO_CFG0),
94 ag71xx_rr(ag, AG71XX_REG_FIFO_CFG1),
95 ag71xx_rr(ag, AG71XX_REG_FIFO_CFG2));
96
97 DBG("%s: fifo_cfg3=%#x, fifo_cfg4=%#x, fifo_cfg5=%#x\n",
98 ag->dev->name,
99 ag71xx_rr(ag, AG71XX_REG_FIFO_CFG3),
100 ag71xx_rr(ag, AG71XX_REG_FIFO_CFG4),
101 ag71xx_rr(ag, AG71XX_REG_FIFO_CFG5));
102
103 DBG("%s: mac_cfg2=%#x, mac_ifctl=%#x, mii_ctrl=%#x\n",
104 ag->dev->name,
105 ag71xx_rr(ag, AG71XX_REG_MAC_CFG2),
106 ag71xx_rr(ag, AG71XX_REG_MAC_IFCTL),
107 ag71xx_mii_ctrl_rr(ag));
108 }
109
110 static void ag71xx_phy_link_adjust(struct net_device *dev)
111 {
112 struct ag71xx *ag = netdev_priv(dev);
113 struct phy_device *phydev = ag->phy_dev;
114 unsigned long flags;
115 int status_change = 0;
116
117 spin_lock_irqsave(&ag->lock, flags);
118
119 if (phydev->link) {
120 if (ag->duplex != phydev->duplex
121 || ag->speed != phydev->speed) {
122 status_change = 1;
123 }
124 }
125
126 if (phydev->link != ag->link)
127 status_change = 1;
128
129 ag->link = phydev->link;
130 ag->duplex = phydev->duplex;
131 ag->speed = phydev->speed;
132
133 if (status_change)
134 ag71xx_phy_link_update(ag);
135
136 spin_unlock_irqrestore(&ag->lock, flags);
137 }
138
139 void ag71xx_phy_start(struct ag71xx *ag)
140 {
141 if (ag->phy_dev) {
142 phy_start(ag->phy_dev);
143 } else {
144 struct ag71xx_platform_data *pdata = ag71xx_get_pdata(ag);
145
146 ag->duplex = pdata->duplex;
147 ag->speed = pdata->speed;
148 ag->link = 1;
149 ag71xx_phy_link_update(ag);
150 }
151 }
152
153 void ag71xx_phy_stop(struct ag71xx *ag)
154 {
155 if (ag->phy_dev) {
156 phy_stop(ag->phy_dev);
157 } else {
158 ag->duplex = -1;
159 ag->link = 0;
160 ag->speed = 0;
161 ag71xx_phy_link_update(ag);
162 }
163 }
164
165 static int ag71xx_phy_connect_fixed(struct ag71xx *ag)
166 {
167 struct net_device *dev = ag->dev;
168 struct ag71xx_platform_data *pdata = ag71xx_get_pdata(ag);
169 int ret = 0;
170
171 /* use fixed settings */
172 switch (pdata->speed) {
173 case SPEED_10:
174 case SPEED_100:
175 case SPEED_1000:
176 break;
177 default:
178 printk(KERN_ERR "%s: invalid speed specified\n",
179 dev->name);
180 ret = -EINVAL;
181 break;
182 }
183
184 return ret;
185 }
186
187 static int ag71xx_phy_connect_multi(struct ag71xx *ag)
188 {
189 struct net_device *dev = ag->dev;
190 struct ag71xx_platform_data *pdata = ag71xx_get_pdata(ag);
191 struct phy_device *phydev = NULL;
192 int phy_count = 0;
193 int phy_addr;
194 int ret = 0;
195
196 for (phy_addr = 0; phy_addr < PHY_MAX_ADDR; phy_addr++) {
197 if (!(pdata->phy_mask & (1 << phy_addr)))
198 continue;
199
200 if (ag->mii_bus->phy_map[phy_addr] == NULL)
201 continue;
202
203 DBG("%s: PHY found at %s, uid=%08x\n",
204 dev->name,
205 dev_name(&ag->mii_bus->phy_map[phy_addr]->dev),
206 ag->mii_bus->phy_map[phy_addr]->phy_id);
207
208 if (phydev == NULL)
209 phydev = ag->mii_bus->phy_map[phy_addr];
210
211 phy_count++;
212 }
213
214 switch (phy_count) {
215 case 0:
216 printk(KERN_ERR "%s: no PHY found with phy_mask=%08x\n",
217 dev->name, pdata->phy_mask);
218 ret = -ENODEV;
219 break;
220 case 1:
221 ag->phy_dev = phy_connect(dev, dev_name(&phydev->dev),
222 &ag71xx_phy_link_adjust, 0, pdata->phy_if_mode);
223
224 if (IS_ERR(ag->phy_dev)) {
225 printk(KERN_ERR "%s: could not connect to PHY at %s\n",
226 dev->name, dev_name(&phydev->dev));
227 return PTR_ERR(ag->phy_dev);
228 }
229
230 /* mask with MAC supported features */
231 if (pdata->has_gbit)
232 phydev->supported &= PHY_GBIT_FEATURES;
233 else
234 phydev->supported &= PHY_BASIC_FEATURES;
235
236 phydev->advertising = phydev->supported;
237
238 printk(KERN_DEBUG "%s: connected to PHY at %s "
239 "[uid=%08x, driver=%s]\n",
240 dev->name, dev_name(&phydev->dev),
241 phydev->phy_id, phydev->drv->name);
242
243 ag->link = 0;
244 ag->speed = 0;
245 ag->duplex = -1;
246 break;
247
248 default:
249 printk(KERN_DEBUG "%s: connected to %d PHYs\n",
250 dev->name, phy_count);
251 ret = ag71xx_phy_connect_fixed(ag);
252 break;
253 }
254
255 return ret;
256 }
257
258 int ag71xx_phy_connect(struct ag71xx *ag)
259 {
260 struct ag71xx_platform_data *pdata = ag71xx_get_pdata(ag);
261
262 if (pdata->phy_mask)
263 return ag71xx_phy_connect_multi(ag);
264
265 return ag71xx_phy_connect_fixed(ag);
266 }
267
268 void ag71xx_phy_disconnect(struct ag71xx *ag)
269 {
270 if (ag->phy_dev)
271 phy_disconnect(ag->phy_dev);
272 }