ar71xx: pb44_spi: introduce pb44_spi_{en,dis}able helpers
[openwrt/svn-archive/archive.git] / target / linux / ar71xx / files / drivers / spi / pb44_spi.c
1 /*
2 * Atheros PB44 board SPI controller driver
3 *
4 * Copyright (C) 2009 Gabor Juhos <juhosg@openwrt.org>
5 *
6 * This program is free software; you can redistribute it and/or modify
7 * it under the terms of the GNU General Public License version 2 as
8 * published by the Free Software Foundation.
9 *
10 */
11
12 #include <linux/kernel.h>
13 #include <linux/init.h>
14 #include <linux/delay.h>
15 #include <linux/spinlock.h>
16 #include <linux/workqueue.h>
17 #include <linux/platform_device.h>
18 #include <linux/io.h>
19 #include <linux/spi/spi.h>
20 #include <linux/spi/spi_bitbang.h>
21 #include <linux/bitops.h>
22 #include <linux/gpio.h>
23
24 #include <asm/mach-ar71xx/ar71xx.h>
25 #include <asm/mach-ar71xx/platform.h>
26
27 #define DRV_DESC "Atheros PB44 SPI Controller driver"
28 #define DRV_VERSION "0.1.0"
29 #define DRV_NAME "pb44-spi"
30
31 #undef PER_BIT_READ
32
33 struct ar71xx_spi {
34 struct spi_bitbang bitbang;
35 u32 ioc_base;
36 u32 reg_ctrl;
37
38 void __iomem *base;
39
40 struct platform_device *pdev;
41 };
42
43 static inline u32 pb44_spi_rr(struct ar71xx_spi *sp, unsigned reg)
44 {
45 return __raw_readl(sp->base + reg);
46 }
47
48 static inline void pb44_spi_wr(struct ar71xx_spi *sp, unsigned reg, u32 val)
49 {
50 __raw_writel(val, sp->base + reg);
51 }
52
53 static inline struct ar71xx_spi *spidev_to_sp(struct spi_device *spi)
54 {
55 return spi_master_get_devdata(spi->master);
56 }
57
58 static void pb44_spi_chipselect(struct spi_device *spi, int is_active)
59 {
60 struct ar71xx_spi *sp = spidev_to_sp(spi);
61 int cs_high = (spi->mode & SPI_CS_HIGH) ? is_active : !is_active;
62
63 if (is_active) {
64 /* set initial clock polarity */
65 if (spi->mode & SPI_CPOL)
66 sp->ioc_base |= SPI_IOC_CLK;
67 else
68 sp->ioc_base &= ~SPI_IOC_CLK;
69
70 pb44_spi_wr(sp, SPI_REG_IOC, sp->ioc_base);
71 }
72
73 if (spi->chip_select) {
74 unsigned long gpio = (unsigned long) spi->controller_data;
75
76 /* SPI is normally active-low */
77 gpio_set_value(gpio, cs_high);
78 } else {
79 if (cs_high)
80 sp->ioc_base |= SPI_IOC_CS0;
81 else
82 sp->ioc_base &= ~SPI_IOC_CS0;
83
84 pb44_spi_wr(sp, SPI_REG_IOC, sp->ioc_base);
85 }
86
87 }
88
89 static void pb44_spi_enable(struct ar71xx_spi *sp)
90 {
91 /* enable GPIO mode */
92 pb44_spi_wr(sp, SPI_REG_FS, SPI_FS_GPIO);
93
94 /* save CTRL register */
95 sp->reg_ctrl = pb44_spi_rr(sp, SPI_REG_CTRL);
96 sp->ioc_base = pb44_spi_rr(sp, SPI_REG_IOC);
97
98 pb44_spi_wr(sp, SPI_REG_CTRL, 0x43);
99 }
100
101 static void pb44_spi_disable(struct ar71xx_spi *sp)
102 {
103 /* restore CTRL register */
104 pb44_spi_wr(sp, SPI_REG_CTRL, sp->reg_ctrl);
105 /* disable GPIO mode */
106 pb44_spi_wr(sp, SPI_REG_FS, 0);
107 }
108
109 static int pb44_spi_setup_cs(struct spi_device *spi)
110 {
111 struct ar71xx_spi *sp = spidev_to_sp(spi);
112
113 pb44_spi_enable(sp);
114
115 if (spi->chip_select) {
116 unsigned long gpio = (unsigned long) spi->controller_data;
117 int status = 0;
118
119 status = gpio_request(gpio, dev_name(&spi->dev));
120 if (status)
121 return status;
122
123 status = gpio_direction_output(gpio, spi->mode & SPI_CS_HIGH);
124 if (status) {
125 gpio_free(gpio);
126 return status;
127 }
128 } else {
129 if (spi->mode & SPI_CS_HIGH)
130 sp->ioc_base |= SPI_IOC_CS0;
131 else
132 sp->ioc_base &= ~SPI_IOC_CS0;
133 pb44_spi_wr(sp, SPI_REG_IOC, sp->ioc_base);
134 }
135
136 return 0;
137 }
138
139 static void pb44_spi_cleanup_cs(struct spi_device *spi)
140 {
141 struct ar71xx_spi *sp = spidev_to_sp(spi);
142
143 if (spi->chip_select) {
144 unsigned long gpio = (unsigned long) spi->controller_data;
145 gpio_free(gpio);
146 }
147
148 pb44_spi_disable(sp);
149 }
150
151 static int pb44_spi_setup(struct spi_device *spi)
152 {
153 int status = 0;
154
155 if (spi->bits_per_word > 32)
156 return -EINVAL;
157
158 if (!spi->controller_state) {
159 status = pb44_spi_setup_cs(spi);
160 if (status)
161 return status;
162 }
163
164 status = spi_bitbang_setup(spi);
165 if (status && !spi->controller_state)
166 pb44_spi_cleanup_cs(spi);
167
168 return status;
169 }
170
171 static void pb44_spi_cleanup(struct spi_device *spi)
172 {
173 pb44_spi_cleanup_cs(spi);
174 spi_bitbang_cleanup(spi);
175 }
176
177 static u32 pb44_spi_txrx_mode0(struct spi_device *spi, unsigned nsecs,
178 u32 word, u8 bits)
179 {
180 struct ar71xx_spi *sp = spidev_to_sp(spi);
181 u32 ioc = sp->ioc_base;
182 u32 ret;
183
184 /* clock starts at inactive polarity */
185 for (word <<= (32 - bits); likely(bits); bits--) {
186 u32 out;
187
188 if (word & (1 << 31))
189 out = ioc | SPI_IOC_DO;
190 else
191 out = ioc & ~SPI_IOC_DO;
192
193 /* setup MSB (to slave) on trailing edge */
194 pb44_spi_wr(sp, SPI_REG_IOC, out);
195 pb44_spi_wr(sp, SPI_REG_IOC, out | SPI_IOC_CLK);
196
197 word <<= 1;
198
199 #ifdef PER_BIT_READ
200 /* sample MSB (from slave) on leading edge */
201 ret = pb44_spi_rr(sp, SPI_REG_RDS);
202 pb44_spi_wr(sp, SPI_REG_IOC, out);
203 #endif
204 }
205
206 #ifndef PER_BIT_READ
207 ret = pb44_spi_rr(sp, SPI_REG_RDS);
208 #endif
209 return ret;
210 }
211
212 static int pb44_spi_probe(struct platform_device *pdev)
213 {
214 struct spi_master *master;
215 struct ar71xx_spi *sp;
216 struct ar71xx_spi_platform_data *pdata;
217 struct resource *r;
218 int ret;
219
220 master = spi_alloc_master(&pdev->dev, sizeof(*sp));
221 if (master == NULL) {
222 dev_err(&pdev->dev, "failed to allocate spi master\n");
223 return -ENOMEM;
224 }
225
226 sp = spi_master_get_devdata(master);
227 platform_set_drvdata(pdev, sp);
228
229 pdata = pdev->dev.platform_data;
230
231 master->setup = pb44_spi_setup;
232 master->cleanup = pb44_spi_cleanup;
233 if (pdata) {
234 master->bus_num = pdata->bus_num;
235 master->num_chipselect = pdata->num_chipselect;
236 } else {
237 master->bus_num = 0;
238 master->num_chipselect = 1;
239 }
240
241 sp->bitbang.master = spi_master_get(master);
242 sp->bitbang.chipselect = pb44_spi_chipselect;
243 sp->bitbang.txrx_word[SPI_MODE_0] = pb44_spi_txrx_mode0;
244 sp->bitbang.setup_transfer = spi_bitbang_setup_transfer;
245 sp->bitbang.flags = SPI_CS_HIGH;
246
247 r = platform_get_resource(pdev, IORESOURCE_MEM, 0);
248 if (r == NULL) {
249 ret = -ENOENT;
250 goto err1;
251 }
252
253 sp->base = ioremap_nocache(r->start, r->end - r->start + 1);
254 if (!sp->base) {
255 ret = -ENXIO;
256 goto err1;
257 }
258
259 ret = spi_bitbang_start(&sp->bitbang);
260 if (!ret)
261 return 0;
262
263 iounmap(sp->base);
264 err1:
265 platform_set_drvdata(pdev, NULL);
266 spi_master_put(sp->bitbang.master);
267
268 return ret;
269 }
270
271 static int pb44_spi_remove(struct platform_device *pdev)
272 {
273 struct ar71xx_spi *sp = platform_get_drvdata(pdev);
274
275 spi_bitbang_stop(&sp->bitbang);
276 iounmap(sp->base);
277 platform_set_drvdata(pdev, NULL);
278 spi_master_put(sp->bitbang.master);
279
280 return 0;
281 }
282
283 static struct platform_driver pb44_spi_drv = {
284 .probe = pb44_spi_probe,
285 .remove = pb44_spi_remove,
286 .driver = {
287 .name = DRV_NAME,
288 .owner = THIS_MODULE,
289 },
290 };
291
292 static int __init pb44_spi_init(void)
293 {
294 return platform_driver_register(&pb44_spi_drv);
295 }
296 module_init(pb44_spi_init);
297
298 static void __exit pb44_spi_exit(void)
299 {
300 platform_driver_unregister(&pb44_spi_drv);
301 }
302 module_exit(pb44_spi_exit);
303
304 MODULE_ALIAS("platform:" DRV_NAME);
305 MODULE_DESCRIPTION(DRV_DESC);
306 MODULE_VERSION(DRV_VERSION);
307 MODULE_AUTHOR("Gabor Juhos <juhosg@openwrt.org>");
308 MODULE_LICENSE("GPL v2");