ar71xx: add preliminary support for Mikrotik RB2011L
[openwrt/svn-archive/archive.git] / target / linux / ar71xx / patches-3.3 / 105-MIPS-ath79-replace-ath724x-to-ar724x.patch
1 From 9f0c37b1d071355d4c027958f370823c8f891480 Mon Sep 17 00:00:00 2001
2 From: Gabor Juhos <juhosg@openwrt.org>
3 Date: Wed, 14 Mar 2012 10:29:26 +0100
4 Subject: [PATCH 10/47] MIPS: ath79: replace ath724x to ar724x
5 MIME-Version: 1.0
6 Content-Type: text/plain; charset=UTF-8
7 Content-Transfer-Encoding: 8bit
8
9 Replace the 'ath724x' to 'ar724x' in function, variable and
10 structure names to reflect the name of the real SoC.
11
12 Signed-off-by: Gabor Juhos <juhosg@openwrt.org>
13 Acked-by: René Bolldorf <xsecute@googlemail.com>
14 Cc: linux-mips@linux-mips.org
15 Patchwork: https://patchwork.linux-mips.org/patch/3490/
16 Signed-off-by: Ralf Baechle <ralf@linux-mips.org>
17 ---
18 arch/mips/ath79/mach-ubnt-xm.c | 4 +-
19 arch/mips/ath79/pci.c | 6 ++--
20 arch/mips/ath79/pci.h | 10 +++---
21 arch/mips/include/asm/mach-ath79/pci.h | 4 +-
22 arch/mips/pci/pci-ar724x.c | 62 ++++++++++++++++----------------
23 5 files changed, 43 insertions(+), 43 deletions(-)
24
25 --- a/arch/mips/ath79/mach-ubnt-xm.c
26 +++ b/arch/mips/ath79/mach-ubnt-xm.c
27 @@ -84,7 +84,7 @@ static struct ath79_spi_platform_data ub
28 #ifdef CONFIG_PCI
29 static struct ath9k_platform_data ubnt_xm_eeprom_data;
30
31 -static struct ath724x_pci_data ubnt_xm_pci_data[] = {
32 +static struct ar724x_pci_data ubnt_xm_pci_data[] = {
33 {
34 .irq = UBNT_XM_PCI_IRQ,
35 .pdata = &ubnt_xm_eeprom_data,
36 @@ -108,7 +108,7 @@ static void __init ubnt_xm_init(void)
37 memcpy(ubnt_xm_eeprom_data.eeprom_data, UBNT_XM_EEPROM_ADDR,
38 sizeof(ubnt_xm_eeprom_data.eeprom_data));
39
40 - ath724x_pci_add_data(ubnt_xm_pci_data, ARRAY_SIZE(ubnt_xm_pci_data));
41 + ar724x_pci_add_data(ubnt_xm_pci_data, ARRAY_SIZE(ubnt_xm_pci_data));
42 #endif /* CONFIG_PCI */
43
44 ath79_register_pci();
45 --- a/arch/mips/ath79/pci.c
46 +++ b/arch/mips/ath79/pci.c
47 @@ -13,10 +13,10 @@
48 #include <asm/mach-ath79/pci.h>
49 #include "pci.h"
50
51 -static struct ath724x_pci_data *pci_data;
52 +static struct ar724x_pci_data *pci_data;
53 static int pci_data_size;
54
55 -void ath724x_pci_add_data(struct ath724x_pci_data *data, int size)
56 +void ar724x_pci_add_data(struct ar724x_pci_data *data, int size)
57 {
58 pci_data = data;
59 pci_data_size = size;
60 @@ -50,7 +50,7 @@ int pcibios_plat_dev_init(struct pci_dev
61 int __init ath79_register_pci(void)
62 {
63 if (soc_is_ar724x())
64 - return ath724x_pcibios_init();
65 + return ar724x_pcibios_init();
66
67 return -ENODEV;
68 }
69 --- a/arch/mips/ath79/pci.h
70 +++ b/arch/mips/ath79/pci.h
71 @@ -8,15 +8,15 @@
72 * by the Free Software Foundation.
73 */
74
75 -#ifndef __ASM_MACH_ATH79_PCI_ATH724X_H
76 -#define __ASM_MACH_ATH79_PCI_ATH724X_H
77 +#ifndef _ATH79_PCI_H
78 +#define _ATH79_PCI_H
79
80 -struct ath724x_pci_data {
81 +struct ar724x_pci_data {
82 int irq;
83 void *pdata;
84 };
85
86 -void ath724x_pci_add_data(struct ath724x_pci_data *data, int size);
87 +void ar724x_pci_add_data(struct ar724x_pci_data *data, int size);
88
89 #ifdef CONFIG_PCI
90 int ath79_register_pci(void);
91 @@ -24,4 +24,4 @@ int ath79_register_pci(void);
92 static inline int ath79_register_pci(void) { return 0; }
93 #endif
94
95 -#endif /* __ASM_MACH_ATH79_PCI_ATH724X_H */
96 +#endif /* _ATH79_PCI_H */
97 --- a/arch/mips/include/asm/mach-ath79/pci.h
98 +++ b/arch/mips/include/asm/mach-ath79/pci.h
99 @@ -12,9 +12,9 @@
100 #define __ASM_MACH_ATH79_PCI_H
101
102 #if defined(CONFIG_PCI) && defined(CONFIG_SOC_AR724X)
103 -int ath724x_pcibios_init(void);
104 +int ar724x_pcibios_init(void);
105 #else
106 -static inline int ath724x_pcibios_init(void) { return 0; }
107 +static inline int ar724x_pcibios_init(void) { return 0; }
108 #endif
109
110 #endif /* __ASM_MACH_ATH79_PCI_H */
111 --- a/arch/mips/pci/pci-ar724x.c
112 +++ b/arch/mips/pci/pci-ar724x.c
113 @@ -14,13 +14,13 @@
114 #define reg_read(_phys) (*(unsigned int *) KSEG1ADDR(_phys))
115 #define reg_write(_phys, _val) ((*(unsigned int *) KSEG1ADDR(_phys)) = (_val))
116
117 -#define ATH724X_PCI_DEV_BASE 0x14000000
118 -#define ATH724X_PCI_MEM_BASE 0x10000000
119 -#define ATH724X_PCI_MEM_SIZE 0x08000000
120 +#define AR724X_PCI_DEV_BASE 0x14000000
121 +#define AR724X_PCI_MEM_BASE 0x10000000
122 +#define AR724X_PCI_MEM_SIZE 0x08000000
123
124 -static DEFINE_SPINLOCK(ath724x_pci_lock);
125 +static DEFINE_SPINLOCK(ar724x_pci_lock);
126
127 -static int ath724x_pci_read(struct pci_bus *bus, unsigned int devfn, int where,
128 +static int ar724x_pci_read(struct pci_bus *bus, unsigned int devfn, int where,
129 int size, uint32_t *value)
130 {
131 unsigned long flags, addr, tval, mask;
132 @@ -31,38 +31,38 @@ static int ath724x_pci_read(struct pci_b
133 if (where & (size - 1))
134 return PCIBIOS_BAD_REGISTER_NUMBER;
135
136 - spin_lock_irqsave(&ath724x_pci_lock, flags);
137 + spin_lock_irqsave(&ar724x_pci_lock, flags);
138
139 switch (size) {
140 case 1:
141 addr = where & ~3;
142 mask = 0xff000000 >> ((where % 4) * 8);
143 - tval = reg_read(ATH724X_PCI_DEV_BASE + addr);
144 + tval = reg_read(AR724X_PCI_DEV_BASE + addr);
145 tval = tval & ~mask;
146 *value = (tval >> ((4 - (where % 4))*8));
147 break;
148 case 2:
149 addr = where & ~3;
150 mask = 0xffff0000 >> ((where % 4)*8);
151 - tval = reg_read(ATH724X_PCI_DEV_BASE + addr);
152 + tval = reg_read(AR724X_PCI_DEV_BASE + addr);
153 tval = tval & ~mask;
154 *value = (tval >> ((4 - (where % 4))*8));
155 break;
156 case 4:
157 - *value = reg_read(ATH724X_PCI_DEV_BASE + where);
158 + *value = reg_read(AR724X_PCI_DEV_BASE + where);
159 break;
160 default:
161 - spin_unlock_irqrestore(&ath724x_pci_lock, flags);
162 + spin_unlock_irqrestore(&ar724x_pci_lock, flags);
163
164 return PCIBIOS_BAD_REGISTER_NUMBER;
165 }
166
167 - spin_unlock_irqrestore(&ath724x_pci_lock, flags);
168 + spin_unlock_irqrestore(&ar724x_pci_lock, flags);
169
170 return PCIBIOS_SUCCESSFUL;
171 }
172
173 -static int ath724x_pci_write(struct pci_bus *bus, unsigned int devfn, int where,
174 +static int ar724x_pci_write(struct pci_bus *bus, unsigned int devfn, int where,
175 int size, uint32_t value)
176 {
177 unsigned long flags, tval, addr, mask;
178 @@ -73,11 +73,11 @@ static int ath724x_pci_write(struct pci_
179 if (where & (size - 1))
180 return PCIBIOS_BAD_REGISTER_NUMBER;
181
182 - spin_lock_irqsave(&ath724x_pci_lock, flags);
183 + spin_lock_irqsave(&ar724x_pci_lock, flags);
184
185 switch (size) {
186 case 1:
187 - addr = (ATH724X_PCI_DEV_BASE + where) & ~3;
188 + addr = (AR724X_PCI_DEV_BASE + where) & ~3;
189 mask = 0xff000000 >> ((where % 4)*8);
190 tval = reg_read(addr);
191 tval = tval & ~mask;
192 @@ -85,7 +85,7 @@ static int ath724x_pci_write(struct pci_
193 reg_write(addr, tval);
194 break;
195 case 2:
196 - addr = (ATH724X_PCI_DEV_BASE + where) & ~3;
197 + addr = (AR724X_PCI_DEV_BASE + where) & ~3;
198 mask = 0xffff0000 >> ((where % 4)*8);
199 tval = reg_read(addr);
200 tval = tval & ~mask;
201 @@ -93,47 +93,47 @@ static int ath724x_pci_write(struct pci_
202 reg_write(addr, tval);
203 break;
204 case 4:
205 - reg_write((ATH724X_PCI_DEV_BASE + where), value);
206 + reg_write((AR724X_PCI_DEV_BASE + where), value);
207 break;
208 default:
209 - spin_unlock_irqrestore(&ath724x_pci_lock, flags);
210 + spin_unlock_irqrestore(&ar724x_pci_lock, flags);
211
212 return PCIBIOS_BAD_REGISTER_NUMBER;
213 }
214
215 - spin_unlock_irqrestore(&ath724x_pci_lock, flags);
216 + spin_unlock_irqrestore(&ar724x_pci_lock, flags);
217
218 return PCIBIOS_SUCCESSFUL;
219 }
220
221 -static struct pci_ops ath724x_pci_ops = {
222 - .read = ath724x_pci_read,
223 - .write = ath724x_pci_write,
224 +static struct pci_ops ar724x_pci_ops = {
225 + .read = ar724x_pci_read,
226 + .write = ar724x_pci_write,
227 };
228
229 -static struct resource ath724x_io_resource = {
230 +static struct resource ar724x_io_resource = {
231 .name = "PCI IO space",
232 .start = 0,
233 .end = 0,
234 .flags = IORESOURCE_IO,
235 };
236
237 -static struct resource ath724x_mem_resource = {
238 +static struct resource ar724x_mem_resource = {
239 .name = "PCI memory space",
240 - .start = ATH724X_PCI_MEM_BASE,
241 - .end = ATH724X_PCI_MEM_BASE + ATH724X_PCI_MEM_SIZE - 1,
242 + .start = AR724X_PCI_MEM_BASE,
243 + .end = AR724X_PCI_MEM_BASE + AR724X_PCI_MEM_SIZE - 1,
244 .flags = IORESOURCE_MEM,
245 };
246
247 -static struct pci_controller ath724x_pci_controller = {
248 - .pci_ops = &ath724x_pci_ops,
249 - .io_resource = &ath724x_io_resource,
250 - .mem_resource = &ath724x_mem_resource,
251 +static struct pci_controller ar724x_pci_controller = {
252 + .pci_ops = &ar724x_pci_ops,
253 + .io_resource = &ar724x_io_resource,
254 + .mem_resource = &ar724x_mem_resource,
255 };
256
257 -int __init ath724x_pcibios_init(void)
258 +int __init ar724x_pcibios_init(void)
259 {
260 - register_pci_controller(&ath724x_pci_controller);
261 + register_pci_controller(&ar724x_pci_controller);
262
263 return PCIBIOS_SUCCESSFUL;
264 }