target/linux/ar71xx/patches-3.3/106-MIPS-ath79-use-io-accessor-macros-in-pci-ar724x.c.patch

   1 From 0f5728e7e6fa7f0969ec79bd623261d3d830e5e7 Mon Sep 17 00:00:00 2001
   2 From: Gabor Juhos <juhosg@openwrt.org>
   3 Date: Wed, 14 Mar 2012 10:29:27 +0100
   4 Subject: [PATCH 11/47] MIPS: ath79: use io-accessor macros in pci-ar724x.c
   5 MIME-Version: 1.0
   6 Content-Type: text/plain; charset=UTF-8
   7 Content-Transfer-Encoding: 8bit
   8
   9 Signed-off-by: Gabor Juhos <juhosg@openwrt.org>
  10 Acked-by: René Bolldorf <xsecute@googlemail.com>
  11 Cc: linux-mips@linux-mips.org
  12 Patchwork: https://patchwork.linux-mips.org/patch/3491/
  13 Signed-off-by: Ralf Baechle <ralf@linux-mips.org>
  14 ---
  15  arch/mips/pci/pci-ar724x.c |   38 ++++++++++++++++++++++++--------------
  16  1 files changed, 24 insertions(+), 14 deletions(-)
  17
  18 --- a/arch/mips/pci/pci-ar724x.c
  19 +++ b/arch/mips/pci/pci-ar724x.c
  20 @@ -11,19 +11,19 @@
  21  #include <linux/pci.h>
  22  #include <asm/mach-ath79/pci.h>
  23
  24 -#define reg_read(_phys)                (*(unsigned int *) KSEG1ADDR(_phys))
  25 -#define reg_write(_phys, _val) ((*(unsigned int *) KSEG1ADDR(_phys)) = (_val))
  26 -
  27 -#define AR724X_PCI_DEV_BASE    0x14000000
  28 +#define AR724X_PCI_CFG_BASE    0x14000000
  29 +#define AR724X_PCI_CFG_SIZE    0x1000
  30  #define AR724X_PCI_MEM_BASE    0x10000000
  31  #define AR724X_PCI_MEM_SIZE    0x08000000
  32
  33  static DEFINE_SPINLOCK(ar724x_pci_lock);
  34 +static void __iomem *ar724x_pci_devcfg_base;
  35
  36  static int ar724x_pci_read(struct pci_bus *bus, unsigned int devfn, int where,
  37                             int size, uint32_t *value)
  38  {
  39         unsigned long flags, addr, tval, mask;
  40 +       void __iomem *base;
  41
  42         if (devfn)
  43                 return PCIBIOS_DEVICE_NOT_FOUND;
  44 @@ -31,25 +31,27 @@ static int ar724x_pci_read(struct pci_bu
  45         if (where & (size - 1))
  46                 return PCIBIOS_BAD_REGISTER_NUMBER;
  47
  48 +       base = ar724x_pci_devcfg_base;
  49 +
  50         spin_lock_irqsave(&ar724x_pci_lock, flags);
  51
  52         switch (size) {
  53         case 1:
  54                 addr = where & ~3;
  55                 mask = 0xff000000 >> ((where % 4) * 8);
  56 -               tval = reg_read(AR724X_PCI_DEV_BASE + addr);
  57 +               tval = __raw_readl(base + addr);
  58                 tval = tval & ~mask;
  59                 *value = (tval >> ((4 - (where % 4))*8));
  60                 break;
  61         case 2:
  62                 addr = where & ~3;
  63                 mask = 0xffff0000 >> ((where % 4)*8);
  64 -               tval = reg_read(AR724X_PCI_DEV_BASE + addr);
  65 +               tval = __raw_readl(base + addr);
  66                 tval = tval & ~mask;
  67                 *value = (tval >> ((4 - (where % 4))*8));
  68                 break;
  69         case 4:
  70 -               *value = reg_read(AR724X_PCI_DEV_BASE + where);
  71 +               *value = __raw_readl(base + where);
  72                 break;
  73         default:
  74                 spin_unlock_irqrestore(&ar724x_pci_lock, flags);
  75 @@ -66,6 +68,7 @@ static int ar724x_pci_write(struct pci_b
  76                              int size, uint32_t value)
  77  {
  78         unsigned long flags, tval, addr, mask;
  79 +       void __iomem *base;
  80
  81         if (devfn)
  82                 return PCIBIOS_DEVICE_NOT_FOUND;
  83 @@ -73,27 +76,29 @@ static int ar724x_pci_write(struct pci_b
  84         if (where & (size - 1))
  85                 return PCIBIOS_BAD_REGISTER_NUMBER;
  86
  87 +       base = ar724x_pci_devcfg_base;
  88 +
  89         spin_lock_irqsave(&ar724x_pci_lock, flags);
  90
  91         switch (size) {
  92         case 1:
  93 -               addr = (AR724X_PCI_DEV_BASE + where) & ~3;
  94 +               addr = where & ~3;
  95                 mask = 0xff000000 >> ((where % 4)*8);
  96 -               tval = reg_read(addr);
  97 +               tval = __raw_readl(base + addr);
  98                 tval = tval & ~mask;
  99                 tval |= (value << ((4 - (where % 4))*8)) & mask;
 100 -               reg_write(addr, tval);
 101 +               __raw_writel(tval, base + addr);
 102                 break;
 103         case 2:
 104 -               addr = (AR724X_PCI_DEV_BASE + where) & ~3;
 105 +               addr = where & ~3;
 106                 mask = 0xffff0000 >> ((where % 4)*8);
 107 -               tval = reg_read(addr);
 108 +               tval = __raw_readl(base + addr);
 109                 tval = tval & ~mask;
 110                 tval |= (value << ((4 - (where % 4))*8)) & mask;
 111 -               reg_write(addr, tval);
 112 +               __raw_writel(tval, base + addr);
 113                 break;
 114         case 4:
 115 -               reg_write((AR724X_PCI_DEV_BASE + where), value);
 116 +               __raw_writel(value, (base + where));
 117                 break;
 118         default:
 119                 spin_unlock_irqrestore(&ar724x_pci_lock, flags);
 120 @@ -133,6 +138,11 @@ static struct pci_controller ar724x_pci_
 121
 122  int __init ar724x_pcibios_init(void)
 123  {
 124 +       ar724x_pci_devcfg_base = ioremap(AR724X_PCI_CFG_BASE,
 125 +                                        AR724X_PCI_CFG_SIZE);
 126 +       if (ar724x_pci_devcfg_base == NULL)
 127 +               return -ENOMEM;
 128 +
 129         register_pci_controller(&ar724x_pci_controller);
 130
 131         return PCIBIOS_SUCCESSFUL;