ar71xx: add initial support for the QCA955X SoCs
[openwrt/svn-archive/archive.git] / target / linux / ar71xx / patches-3.3 / 168-MIPS-ath79-add-WMAC-registration-code-for-the-QCA955.patch
1 From 0568e7f92ecf2bfd2af0a5c59b1249fef002c89f Mon Sep 17 00:00:00 2001
2 From: Gabor Juhos <juhosg@openwrt.org>
3 Date: Tue, 3 Jul 2012 10:24:43 +0200
4 Subject: [PATCH 24/34] MIPS: ath79: add WMAC registration code for the QCA955X SoCs
5
6 Signed-off-by: Gabor Juhos <juhosg@openwrt.org>
7 ---
8 arch/mips/ath79/Kconfig | 2 +-
9 arch/mips/ath79/dev-wmac.c | 20 ++++++++++++++++++++
10 arch/mips/include/asm/mach-ath79/ar71xx_regs.h | 2 ++
11 3 files changed, 23 insertions(+), 1 deletions(-)
12
13 --- a/arch/mips/ath79/Kconfig
14 +++ b/arch/mips/ath79/Kconfig
15 @@ -108,7 +108,7 @@ config ATH79_DEV_USB
16 def_bool n
17
18 config ATH79_DEV_WMAC
19 - depends on (SOC_AR913X || SOC_AR933X || SOC_AR934X)
20 + depends on (SOC_AR913X || SOC_AR933X || SOC_AR934X || SOC_QCA955X)
21 def_bool n
22
23 endif
24 --- a/arch/mips/ath79/dev-wmac.c
25 +++ b/arch/mips/ath79/dev-wmac.c
26 @@ -116,6 +116,24 @@ static void ar934x_wmac_setup(void)
27 ath79_wmac_data.is_clk_25mhz = true;
28 }
29
30 +static void qca955x_wmac_setup(void)
31 +{
32 + u32 t;
33 +
34 + ath79_wmac_device.name = "qca955x_wmac";
35 +
36 + ath79_wmac_resources[0].start = QCA955X_WMAC_BASE;
37 + ath79_wmac_resources[0].end = QCA955X_WMAC_BASE + QCA955X_WMAC_SIZE - 1;
38 + ath79_wmac_resources[1].start = ATH79_IP2_IRQ(1);
39 + ath79_wmac_resources[1].start = ATH79_IP2_IRQ(1);
40 +
41 + t = ath79_reset_rr(QCA955X_RESET_REG_BOOTSTRAP);
42 + if (t & QCA955X_BOOTSTRAP_REF_CLK_40)
43 + ath79_wmac_data.is_clk_25mhz = false;
44 + else
45 + ath79_wmac_data.is_clk_25mhz = true;
46 +}
47 +
48 void __init ath79_register_wmac(u8 *cal_data)
49 {
50 if (soc_is_ar913x())
51 @@ -124,6 +142,8 @@ void __init ath79_register_wmac(u8 *cal_
52 ar933x_wmac_setup();
53 else if (soc_is_ar934x())
54 ar934x_wmac_setup();
55 + else if (soc_is_qca955x())
56 + qca955x_wmac_setup();
57 else
58 BUG();
59
60 --- a/arch/mips/include/asm/mach-ath79/ar71xx_regs.h
61 +++ b/arch/mips/include/asm/mach-ath79/ar71xx_regs.h
62 @@ -92,6 +92,8 @@
63 #define AR934X_EHCI_BASE 0x1b000000
64 #define AR934X_EHCI_SIZE 0x1000
65
66 +#define QCA955X_WMAC_BASE (AR71XX_APB_BASE + 0x00100000)
67 +#define QCA955X_WMAC_SIZE 0x20000
68 #define QCA955X_EHCI0_BASE 0x1b000000
69 #define QCA955X_EHCI1_BASE 0x1b400000
70 #define QCA955X_EHCI_SIZE 0x1000