ar71xx: add initial support for the Qualcomm Atheros AP136 board
[openwrt/svn-archive/archive.git] / target / linux / ar71xx / patches-3.3 / 206-spi-ath79-make-chipselect-logic-more-flexible.patch
1 From 7008284716403237f6bc7d7590b3ed073555bd56 Mon Sep 17 00:00:00 2001
2 From: Gabor Juhos <juhosg@openwrt.org>
3 Date: Wed, 11 Jan 2012 22:25:11 +0100
4 Subject: [PATCH 34/34] spi/ath79: make chipselect logic more flexible
5
6 Signed-off-by: Gabor Juhos <juhosg@openwrt.org>
7 ---
8 arch/mips/ath79/mach-ap121.c | 6 ++
9 arch/mips/ath79/mach-ap136.c | 6 ++
10 arch/mips/ath79/mach-ap81.c | 6 ++
11 arch/mips/ath79/mach-db120.c | 6 ++
12 arch/mips/ath79/mach-pb44.c | 6 ++
13 arch/mips/ath79/mach-ubnt-xm.c | 6 ++
14 .../include/asm/mach-ath79/ath79_spi_platform.h | 8 ++-
15 drivers/spi/spi-ath79.c | 67 +++++++++++++-------
16 8 files changed, 88 insertions(+), 23 deletions(-)
17
18 --- a/arch/mips/ath79/mach-ap121.c
19 +++ b/arch/mips/ath79/mach-ap121.c
20 @@ -58,12 +58,18 @@ static struct gpio_keys_button ap121_gpi
21 }
22 };
23
24 +static struct ath79_spi_controller_data ap121_spi0_data = {
25 + .cs_type = ATH79_SPI_CS_TYPE_INTERNAL,
26 + .cs_line = 0,
27 +};
28 +
29 static struct spi_board_info ap121_spi_info[] = {
30 {
31 .bus_num = 0,
32 .chip_select = 0,
33 .max_speed_hz = 25000000,
34 .modalias = "mx25l1606e",
35 + .controller_data = &ap121_spi0_data,
36 }
37 };
38
39 --- a/arch/mips/ath79/mach-ap136.c
40 +++ b/arch/mips/ath79/mach-ap136.c
41 @@ -98,12 +98,18 @@ static struct gpio_keys_button ap136_gpi
42 },
43 };
44
45 +static struct ath79_spi_controller_data ap136_spi0_data = {
46 + .cs_type = ATH79_SPI_CS_TYPE_INTERNAL,
47 + .cs_line = 0,
48 +};
49 +
50 static struct spi_board_info ap136_spi_info[] = {
51 {
52 .bus_num = 0,
53 .chip_select = 0,
54 .max_speed_hz = 25000000,
55 .modalias = "mx25l6405d",
56 + .controller_data = &ap136_spi0_data,
57 }
58 };
59
60 --- a/arch/mips/ath79/mach-ap81.c
61 +++ b/arch/mips/ath79/mach-ap81.c
62 @@ -67,12 +67,18 @@ static struct gpio_keys_button ap81_gpio
63 }
64 };
65
66 +static struct ath79_spi_controller_data ap81_spi0_data = {
67 + .cs_type = ATH79_SPI_CS_TYPE_INTERNAL,
68 + .cs_line = 0,
69 +};
70 +
71 static struct spi_board_info ap81_spi_info[] = {
72 {
73 .bus_num = 0,
74 .chip_select = 0,
75 .max_speed_hz = 25000000,
76 .modalias = "m25p64",
77 + .controller_data = &ap81_spi0_data,
78 }
79 };
80
81 --- a/arch/mips/ath79/mach-db120.c
82 +++ b/arch/mips/ath79/mach-db120.c
83 @@ -76,12 +76,18 @@ static struct gpio_keys_button db120_gpi
84 },
85 };
86
87 +static struct ath79_spi_controller_data db120_spi0_data = {
88 + .cs_type = ATH79_SPI_CS_TYPE_INTERNAL,
89 + .cs_line = 0,
90 +};
91 +
92 static struct spi_board_info db120_spi_info[] = {
93 {
94 .bus_num = 0,
95 .chip_select = 0,
96 .max_speed_hz = 25000000,
97 .modalias = "s25sl064a",
98 + .controller_data = &db120_spi0_data,
99 }
100 };
101
102 --- a/arch/mips/ath79/mach-pb44.c
103 +++ b/arch/mips/ath79/mach-pb44.c
104 @@ -87,12 +87,18 @@ static struct gpio_keys_button pb44_gpio
105 }
106 };
107
108 +static struct ath79_spi_controller_data pb44_spi0_data = {
109 + .cs_type = ATH79_SPI_CS_TYPE_INTERNAL,
110 + .cs_line = 0,
111 +};
112 +
113 static struct spi_board_info pb44_spi_info[] = {
114 {
115 .bus_num = 0,
116 .chip_select = 0,
117 .max_speed_hz = 25000000,
118 .modalias = "m25p64",
119 + .controller_data = &pb44_spi0_data,
120 },
121 };
122
123 --- a/arch/mips/ath79/mach-ubnt-xm.c
124 +++ b/arch/mips/ath79/mach-ubnt-xm.c
125 @@ -65,12 +65,18 @@ static struct gpio_keys_button ubnt_xm_g
126 }
127 };
128
129 +static struct ath79_spi_controller_data ubnt_xm_spi0_data = {
130 + .cs_type = ATH79_SPI_CS_TYPE_INTERNAL,
131 + .cs_line = 0,
132 +};
133 +
134 static struct spi_board_info ubnt_xm_spi_info[] = {
135 {
136 .bus_num = 0,
137 .chip_select = 0,
138 .max_speed_hz = 25000000,
139 .modalias = "mx25l6405d",
140 + .controller_data = &ubnt_xm_spi0_data,
141 }
142 };
143
144 --- a/arch/mips/include/asm/mach-ath79/ath79_spi_platform.h
145 +++ b/arch/mips/include/asm/mach-ath79/ath79_spi_platform.h
146 @@ -16,8 +16,14 @@ struct ath79_spi_platform_data {
147 unsigned num_chipselect;
148 };
149
150 +enum ath79_spi_cs_type {
151 + ATH79_SPI_CS_TYPE_INTERNAL,
152 + ATH79_SPI_CS_TYPE_GPIO,
153 +};
154 +
155 struct ath79_spi_controller_data {
156 - unsigned gpio;
157 + enum ath79_spi_cs_type cs_type;
158 + unsigned cs_line;
159 };
160
161 #endif /* _ATH79_SPI_PLATFORM_H */
162 --- a/drivers/spi/spi-ath79.c
163 +++ b/drivers/spi/spi-ath79.c
164 @@ -35,6 +35,8 @@
165 #define ATH79_SPI_RRW_DELAY_FACTOR 12000
166 #define MHZ (1000 * 1000)
167
168 +#define ATH79_SPI_CS_LINE_MAX 2
169 +
170 struct ath79_spi {
171 struct spi_bitbang bitbang;
172 u32 ioc_base;
173 @@ -69,6 +71,7 @@ static void ath79_spi_chipselect(struct
174 {
175 struct ath79_spi *sp = ath79_spidev_to_sp(spi);
176 int cs_high = (spi->mode & SPI_CS_HIGH) ? is_active : !is_active;
177 + struct ath79_spi_controller_data *cdata = spi->controller_data;
178
179 if (is_active) {
180 /* set initial clock polarity */
181 @@ -80,20 +83,21 @@ static void ath79_spi_chipselect(struct
182 ath79_spi_wr(sp, AR71XX_SPI_REG_IOC, sp->ioc_base);
183 }
184
185 - if (spi->chip_select) {
186 - struct ath79_spi_controller_data *cdata = spi->controller_data;
187 -
188 - /* SPI is normally active-low */
189 - gpio_set_value(cdata->gpio, cs_high);
190 - } else {
191 + switch (cdata->cs_type) {
192 + case ATH79_SPI_CS_TYPE_INTERNAL:
193 if (cs_high)
194 - sp->ioc_base |= AR71XX_SPI_IOC_CS0;
195 + sp->ioc_base |= AR71XX_SPI_IOC_CS(cdata->cs_line);
196 else
197 - sp->ioc_base &= ~AR71XX_SPI_IOC_CS0;
198 + sp->ioc_base &= ~AR71XX_SPI_IOC_CS(cdata->cs_line);
199
200 ath79_spi_wr(sp, AR71XX_SPI_REG_IOC, sp->ioc_base);
201 - }
202 + break;
203
204 + case ATH79_SPI_CS_TYPE_GPIO:
205 + /* SPI is normally active-low */
206 + gpio_set_value(cdata->cs_line, cs_high);
207 + break;
208 + }
209 }
210
211 static void ath79_spi_enable(struct ath79_spi *sp)
212 @@ -120,24 +124,30 @@ static void ath79_spi_disable(struct ath
213 static int ath79_spi_setup_cs(struct spi_device *spi)
214 {
215 struct ath79_spi_controller_data *cdata;
216 + unsigned long flags;
217 int status;
218
219 cdata = spi->controller_data;
220 - if (spi->chip_select && !cdata)
221 + if (!cdata)
222 return -EINVAL;
223
224 status = 0;
225 - if (spi->chip_select) {
226 - unsigned long flags;
227 + switch (cdata->cs_type) {
228 + case ATH79_SPI_CS_TYPE_INTERNAL:
229 + if (cdata->cs_line > ATH79_SPI_CS_LINE_MAX)
230 + status = -EINVAL;
231 + break;
232
233 + case ATH79_SPI_CS_TYPE_GPIO:
234 flags = GPIOF_DIR_OUT;
235 if (spi->mode & SPI_CS_HIGH)
236 flags |= GPIOF_INIT_HIGH;
237 else
238 flags |= GPIOF_INIT_LOW;
239
240 - status = gpio_request_one(cdata->gpio, flags,
241 + status = gpio_request_one(cdata->cs_line, flags,
242 dev_name(&spi->dev));
243 + break;
244 }
245
246 return status;
247 @@ -145,9 +155,19 @@ static int ath79_spi_setup_cs(struct spi
248
249 static void ath79_spi_cleanup_cs(struct spi_device *spi)
250 {
251 - if (spi->chip_select) {
252 - struct ath79_spi_controller_data *cdata = spi->controller_data;
253 - gpio_free(cdata->gpio);
254 + struct ath79_spi_controller_data *cdata;
255 +
256 + cdata = spi->controller_data;
257 + if (!cdata)
258 + return;
259 +
260 + switch (cdata->cs_type) {
261 + case ATH79_SPI_CS_TYPE_INTERNAL:
262 + /* nothing to do */
263 + break;
264 + case ATH79_SPI_CS_TYPE_GPIO:
265 + gpio_free(cdata->cs_line);
266 + break;
267 }
268 }
269
270 @@ -155,6 +175,9 @@ static int ath79_spi_setup(struct spi_de
271 {
272 int status = 0;
273
274 + if (spi->controller_data == NULL)
275 + return -EINVAL;
276 +
277 if (spi->bits_per_word > 32)
278 return -EINVAL;
279
280 @@ -215,6 +238,10 @@ static __devinit int ath79_spi_probe(str
281 unsigned long rate;
282 int ret;
283
284 + pdata = pdev->dev.platform_data;
285 + if (!pdata)
286 + return -EINVAL;
287 +
288 master = spi_alloc_master(&pdev->dev, sizeof(*sp));
289 if (master == NULL) {
290 dev_err(&pdev->dev, "failed to allocate spi master\n");
291 @@ -224,17 +251,10 @@ static __devinit int ath79_spi_probe(str
292 sp = spi_master_get_devdata(master);
293 platform_set_drvdata(pdev, sp);
294
295 - pdata = pdev->dev.platform_data;
296 -
297 master->setup = ath79_spi_setup;
298 master->cleanup = ath79_spi_cleanup;
299 - if (pdata) {
300 - master->bus_num = pdata->bus_num;
301 - master->num_chipselect = pdata->num_chipselect;
302 - } else {
303 - master->bus_num = -1;
304 - master->num_chipselect = 1;
305 - }
306 + master->bus_num = pdata->bus_num;
307 + master->num_chipselect = pdata->num_chipselect;
308
309 sp->bitbang.master = spi_master_get(master);
310 sp->bitbang.chipselect = ath79_spi_chipselect;